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* clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARMStephen Boyd2013-11-211-0/+1
| | | | | | | | | | | | Pavel Machek reports that this config is exposed on x86 where the ARM architected timers aren't even present. Make it depend on the ARM architected timers being selected so that non-ARM builds aren't asked about it. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sh_tmu: Add clk_prepare/unprepare supportLaurent Pinchart2013-11-201-1/+8
| | | | | | | | | | | Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sh_tmu: Release clock when sh_tmu_register() failsLaurent Pinchart2013-11-201-3/+10
| | | | | | | | | | | Fix the probe error path to release the clock resource when the sh_tmu_register() call fails. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sh_mtu2: Add clk_prepare/unprepare supportLaurent Pinchart2013-11-201-2/+7
| | | | | | | | | | | Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sh_mtu2: Release clock when sh_mtu2_register() failsLaurent Pinchart2013-11-201-2/+9
| | | | | | | | | | | Fix the probe error path to release the clock resource when the sh_mtu2_register() call fails. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sun4i: remove IRQF_DISABLEDMaxime Ripard2013-10-221-1/+1
| | | | | | | IRQF_DISABLED is a no-op nowadays, so we can safely remove it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sun4i: Report the minimum tick that we can programMaxime Ripard2013-10-221-4/+6
| | | | | | | | | | We need to wait for at least 2 clock cycles whenever we reprogram our clockevent timer. Report that the minimum number of ticks we can handle is 3 ticks, and remove 3 ticks to the interval programmed to reflect this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: sun4i: Select CLKSRC_MMIOMaxime Ripard2013-10-221-0/+1
| | | | | | | | The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: Provide timekeeping for efm32 SoCsUwe Kleine-König2013-10-223-0/+284
| | | | | | | | | An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: em_sti: convert to clk_prepare/unprepareShinya Kuribayashi2013-10-221-2/+2
| | | | | | | | | | | | Add calls to clk_prepare and unprepare so that EMMA Mobile EV2 can migrate to the common clock framework. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource: arch_timer: Do not register arch_sys_counter twiceThierry Reding2013-10-161-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit: 65cd4f6 ("arch_timer: Move to generic sched_clock framework") added code to register the arch_sys_counter in arch_timer_register(), but it is already registered in arch_counter_register(). This results in the timer being added to the clocksource list twice, therefore causing an infinite loop in the list. Remove the duplicate registration and register the scheduler clock after the original registration instead. This fixes a hang during boot on Tegra114 (Cortex-A15). [ While I've only tested this on Tegra114, I suspect the same hang during boot happens for all processors that use this clock source. ] Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: John Stultz <john.stultz@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1381843911-31962-1-git-send-email-treding@nvidia.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* Merge branch 'fortglx/3.13/time' of ↵Ingo Molnar2013-10-101-0/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/jstultz/linux into timers/core Pull more timekeeping items for v3.13 from John Stultz: * Small cleanup in the clocksource code. * Fix for rtc-pl031 to let it work with alarmtimers. * Move arm64 to using the generic sched_clock framework & resulting cleanup in the generic sched_clock code. Signed-off-by: Ingo Molnar <mingo@kernel.org>
| * arch_timer: Move to generic sched_clock frameworkStephen Boyd2013-10-101-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register with the generic sched_clock framework now that it supports 64 bits. This fixes two problems with the current sched_clock support for machines using the architected timers. First off, we don't subtract the start value from subsequent sched_clock calls so we can potentially start off with sched_clock returning gigantic numbers. Second, there is no support for suspend/resume handling so problems such as discussed in 6a4dae5 (ARM: 7565/1: sched: stop sched_clock() during suspend, 2012-10-23) can happen without this patch. Finally, it allows us to move the sched_clock setup into drivers clocksource out of the arch ports. Cc: Christopher Covington <cov@codeaurora.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
* | clocksource: tcb_clksrc: Remove IRQF_DISABLEDBoris BREZILLON2013-10-031-1/+1
| | | | | | | | | | | | | | Remove the deprecated IRQF_DISABLED flag. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | clocksource: tcb_clksrc: Improve driver robustnessBoris BREZILLON2013-10-031-5/+28
| | | | | | | | | | | | | | Check function return values to avoid false positive driver init. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | clocksource: tcb_clksrc: Replace clk_enable/disable with ↵Boris BREZILLON2013-10-031-5/+21
| | | | | | | | | | | | | | | | | | | | | | clk_prepare_enable/disable_unprepare Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to avoid common clk framework warnings. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | Merge branch 'timer_evtstrm' of git://linux-arm.org/linux-skn into ↵Daniel Lezcano2013-10-032-0/+64
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clockevents/3.13 Adds support to configure the rate and enable the event stream for architected timer. The event streams can be used to impose a timeout on a wfe, to safeguard against any programming error in case an expected event is not generated or even to implement wfe-based timeouts for userspace locking implementations. This feature can be disabled(enabled by default). Since the timer control register is reset to zero on warm boot, CPU PM notifier is added to save and restore the value. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * | drivers: clocksource: add CPU PM notifier for ARM architected timerSudeep KarkadaNagesha2013-09-261-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Few control settings done in architected timer as part of initialisation can be lost when CPU enters deeper power states. They need to be restored when the CPU is (warm)reset again. This patch adds CPU PM notifiers to save the counter control register when entering low power modes and restore it when CPU exits low power. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
| * | drivers: clocksource: add support for ARM architected timer event streamWill Deacon2013-09-262-0/+30
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Will Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
* | Merge branch 'clockevents/3.13' of ↵Ingo Molnar2013-10-0314-37/+30
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/dlezcano/linux into timers/core Pull (mostly) ARM clocksource driver updates from Daniel Lezcano: " - Soren Brinkmann added FEAT_PERCPU to a clock device when it is local per cpu. This feature prevents the clock framework to choose a per cpu timer as a broadcast timer. This problem arised when the ARM global timer is used when switching to the broadcast timer which is the case now on Xillinx with its cpuidle driver. - Stephen Boyd extended the generic sched_clock code to support 64bit counters and removes the setup_sched_clock deprecation, as that causes lots of warnings since there's still users in the arch/arm tree. He added also the CLOCK_SOURCE_SUSPEND_NONSTOP flag on the architected timer as they continue counting during suspend. - Uwe Kleine-König added some missing __init sections and consolidated the code by moving the of_node_put call from the drivers to the function clocksource_of_init. " Signed-off-by: Ingo Molnar <mingo@kernel.org>
| * | clocksource: arm_arch_timer: Use clocksource for suspend timekeepingStephen Boyd2013-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM architected timers keep counting during suspend so we can mark this clocksource with the CLOCK_SOURCE_SUSPEND_NONSTOP flag. This flag will indicate that this clocksource can be used for calculating suspend time and injecting sleep time into the timekeeping core. This should be more accurate than using an external RTC or architecture specific persistent clock. Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * | clocksource: dw_apb_timer_of: Mark a few more functions as __initUwe Kleine-König2013-10-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | These are all only called by dw_apb_timer_init which is an __init function, too Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * | clocksource: Put nodes passed to CLOCKSOURCE_OF_DECLARE callbacks centrallyUwe Kleine-König2013-10-024-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of letting each driver call of_node_put do it centrally in the loop that also calls the CLOCKSOURCE_OF_DECLARE callbacks. This is less prone to error and also moves getting and putting the references into the same function. Consequently all respective of_node_put calls in drivers are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: David Brown <davidb@codeaurora.org>
| * | clocksource/arm_global_timer: Set FEAT_PERCPU flagSoren Brinkmann2013-10-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The arm_global_timer is a per cpu device. Set the appropriate flag. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | Merge remote-tracking branch 'tip/timers/core' into ↵John Stultz2013-09-2619-390/+994
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fordlezcano/3.13/sched-clock64-conversion Update to tip/timers/core and resolve minor conflict. Conflicts: drivers/clocksource/samsung_pwm_timer.c Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: vf_pit_timer: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Jingchang Lu <b35083@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: sirf: Switch to sched_clock_register() and use 64 bitsStephen Boyd2013-07-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface and use all 64 bits of this timer. Cc: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: time-armada-370-xp: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: tegra: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: samsung_pwm_timer: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: nomadik: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: mxs_timer: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Shawn Guo <shawn.guo@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: dw_apb_timer_of: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: dbx500-prcmu: Switch to sched_clock_register()Stephen Boyd2013-07-301-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
| * | clocksource: bcm2835: Switch to sched_clock_register()Stephen Boyd2013-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
* | | clocksource: em_sti: Set cpu_possible_mask to fix SMP broadcastMagnus Damm2013-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the STI driver by setting cpu_possible_mask to make EMEV2 SMP work as expected together with the ARM broadcast timer. This breakage was introduced by: f7db706 ARM: 7674/1: smp: Avoid dummy clockevent being preferred over real hardware clock-event Without this fix SMP operation is broken on EMEV2 since no broadcast timer interrupts trigger on the secondary CPU cores. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | | clocksource: of: Respect device tree node statusSebastian Hesselbarth2013-09-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Clocksource devices provided by DT can be disabled (status != "okay"). Instead of registering clocksource drivers for disabled nodes, respect the device's status by skiping disabled nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | | clocksource: exynos_mct: Set IRQ affinity when the CPU goes onlineTomasz Figa2013-09-261-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some variants of Exynos MCT, namely exynos4210-mct at the moment, use normal, shared interrupts for local timers. This means that each interrupt must have correct affinity set to fire only on CPU corresponding to given local timer. However after recent conversion of clocksource drivers to not use the local timer API for local timer initialization any more, the point of time when local timers get initialized changed and irq_set_affinity() fails because the CPU is not marked as online yet. This patch fixes this by moving the call to irq_set_affinity() to CPU_ONLINE notification, so the affinity is being set when the CPU goes online. This fixes a regression introduced by commit ee98d27df6 ARM: EXYNOS4: Divorce mct from local timer API which rendered all Exynos4210 based boards unbootable due to failing irq_set_affinity() making local timers inoperatible. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | | arm: clocksource: mvebu: Use the main timer as clock source from DTJean Pihet2013-09-261-0/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit: 573145f08c2b92c45498468afbbba909f6ce6135 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE replaced a call to the driver's timer initialization by a call to clocksource_of_init(). However, it failed to select CONFIG_CLKSRC_OF. Fix this by selecting CONFIG_CLKSRC_OF for Armada370/XP machines. Without this change the kernel is stuck at: 'Calibrating delay loop...'. Signed-off-by: Jean Pihet <jean.pihet@linaro.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | Merge branch 'timers/core' of ↵Linus Torvalds2013-09-164-104/+129
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer code update from Thomas Gleixner: - armada SoC clocksource overhaul with a trivial merge conflict - Minor improvements to various SoC clocksource drivers * 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: armada-370-xp: Add detailed clock requirements in devicetree binding clocksource: armada-370-xp: Get reference fixed-clock by name clocksource: armada-370-xp: Replace WARN_ON with BUG_ON clocksource: armada-370-xp: Fix device-tree binding clocksource: armada-370-xp: Introduce new compatibles clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE clocksource: armada-370-xp: Simplify TIMER_CTRL register access clocksource: armada-370-xp: Use BIT() ARM: timer-sp: Set dynamic irq affinity ARM: nomadik: add dynamic irq flag to the timer clocksource: sh_cmt: 32-bit control register support clocksource: em_sti: Convert to devm_* managed helpers
| * | clocksource: armada-370-xp: Get reference fixed-clock by nameEzequiel Garcia2013-09-021-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada XP timer has two mandatory clock inputs: nbclk and refclk, as specified by the device-tree binding. This commit fixes the clock selection. Instead of hard-coding the clock rate for the 25 MHz reference fixed-clock, obtain the clock by its name. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | clocksource: armada-370-xp: Replace WARN_ON with BUG_ONEzequiel Garcia2013-09-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the clock fails to be obtained and the timer fails to be properly registered, the kernel will freeze real soon. Instead, let's BUG() where the actual problem is located. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | clocksource: armada-370-xp: Introduce new compatiblesEzequiel Garcia2013-09-021-15/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada XP SoC clocksource driver cannot work without the 25 MHz fixed timer. Therefore it's appropriate to introduce a new compatible string and use it to set the 25 MHz fixed timer. The 'marvell,timer-25MHz' property will be marked as deprecated. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
| * | clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLAREEzequiel Garcia2013-09-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is almost cosmetic: we achieve a bit of consistency with other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE macro for the boilerplate code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
| * | clocksource: armada-370-xp: Simplify TIMER_CTRL register accessEzequiel Garcia2013-09-021-39/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit creates two functions to access the TIMER_CTRL register: one for global one for the per-cpu. This makes the code much more readable. In addition, since the TIMER_CTRL register is also used for watchdog, this is preparation work for future thread-safe improvements. Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| * | clocksource: armada-370-xp: Use BIT()Ezequiel Garcia2013-09-021-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a purely cosmetic commit: we replace hardcoded values that representing bits by BIT(), which is slightly more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
| * | ARM: nomadik: add dynamic irq flag to the timerDaniel Lezcano2013-08-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add the dynamic irq affinity feature to the timer clock device. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Vincent Guittot <vincent.guittot@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com>
| * | clocksource: sh_cmt: 32-bit control register supportMagnus Damm2013-08-221-14/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for CMT hardware with 32-bit control and counter registers, as found on r8a73a4 and r8a7790. To use the CMT with 32-bit hardware a second I/O memory resource needs to point out the CMSTR register and it needs to be 32 bit wide. Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | clocksource: em_sti: Convert to devm_* managed helpersLaurent Pinchart2013-08-221-35/+14
| | | | | | | | | | | | | | | | | | | | | | | | Replace kzalloc, clk_get, ioremap and request_irq by their managed counterparts to simplify error paths. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* | | Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-09-101-4/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull clock framework changes from Michael Turquette: "The common clk framework changes for 3.12 are dominated by clock driver patches, both new drivers and fixes to existing. A high percentage of these are for Samsung platforms like Exynos. Core framework fixes and some new features like automagical clock re-parenting round out the patches" * tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits) clk: only call get_parent if there is one clk: samsung: exynos5250: Simplify registration of PLL rate tables clk: samsung: exynos4: Register PLL rate tables for Exynos4x12 clk: samsung: exynos4: Register PLL rate tables for Exynos4210 clk: samsung: exynos4: Reorder registration of mout_vpllsrc clk: samsung: pll: Add support for rate configuration of PLL46xx clk: samsung: pll: Use new registration method for PLL46xx clk: samsung: pll: Add support for rate configuration of PLL45xx clk: samsung: pll: Use new registration method for PLL45xx clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls clk: samsung: exynos4: Remove checks for DT node clk: samsung: exynos4: Remove unused static clkdev aliases clk: samsung: Modify _get_rate() helper to use __clk_lookup() clk: samsung: exynos4: Use separate aliases for cpufreq related clocks clocksource: samsung_pwm_timer: Get clock from device tree ARM: dts: exynos4: Specify PWM clocks in PWM node pwm: samsung: Update DT bindings documentation to cover clocks clk: Move symbol export to proper location clk: fix new_parent dereference before null check clk: wm831x: Initialise wm831x pointer on init ...
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