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* crypto: atmel - switch to SPDX license identifiersTudor Ambarus2018-09-041-4/+1
| | | | | | | | Adopt the SPDX license identifiers to ease license compliance management. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix the keys zeroing on errorsAntoine Tenart2018-03-021-1/+1
| | | | | | | | | | | The Atmel AES driver uses memzero_explicit on the keys on error, but the variable zeroed isn't the right one because of a typo. Fix this by using the right variable. Fixes: 89a82ef87e01 ("crypto: atmel-authenc - add support to authenc(hmac(shaX), Y(aes)) modes") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - Delete error messages for a failed memory allocation in six ↵Markus Elfring2018-02-221-5/+1
| | | | | | | | | | | | functions Omit extra messages for a memory allocation failure in these functions. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - remove empty functionsTudor-Dan Ambarus2017-11-061-20/+0
| | | | | | | | | | Pointer members of an object with static storage duration, if not explicitly initialized, will be initialized to a NULL pointer. The crypto API checks if these pointers are not NULL before using them, therefore we can safely remove these empty functions. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - Reset the controller before each useRomain Izard2017-11-031-7/+3
| | | | | | | | | | | When using the rfc4543(gcm(aes))) mode, the registers of the hardware engine are not empty after use. If the engine is not reset before its next use, the following results will be invalid. Always reset the hardware engine. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - properly set IV after {en,de}cryptRomain Izard2017-11-031-3/+37
| | | | | | | | | | | | | | | Certain cipher modes like CTS expect the IV (req->info) of ablkcipher_request (or equivalently req->iv of skcipher_request) to contain the last ciphertext block when the {en,de}crypt operation is done. Fix this issue for the Atmel AES hardware engine. The tcrypt test case for cts(cbc(aes)) is now correctly passed. In the case of in-place decryption, copy the ciphertext in an intermediate buffer before decryption. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - remove useless irq initTudor-Dan Ambarus2017-11-031-2/+0
| | | | | | | irq would be set to -1 and then unused, if we failed to get IORESOURCE_MEM. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - return appropriate error codeTudor-Dan Ambarus2017-11-031-2/+1
| | | | | | | Return -ENODEV when dma_request_slave_channel_compat() fails. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - Use GCM IV size constantCorentin LABBE2017-09-221-2/+3
| | | | | | | This patch replace GCM IV size value by their constant name. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-authenc - add support to authenc(hmac(shaX), Y(aes)) modesCyrille Pitchen2017-02-031-1/+447
| | | | | | | | | | | | | | | | | | | This patchs allows to combine the AES and SHA hardware accelerators on some Atmel SoCs. Doing so, AES blocks are only written to/read from the AES hardware. Those blocks are also transferred from the AES to the SHA accelerator internally, without additionnal accesses to the system busses. Hence, the AES and SHA accelerators work in parallel to process all the data blocks, instead of serializing the process by (de)crypting those blocks first then authenticating them after like the generic crypto/authenc.c driver does. Of course, both the AES and SHA hardware accelerators need to be available before we can start to process the data blocks. Hence we use their crypto request queue to synchronize both drivers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix atmel_aes_handle_queue()Cyrille Pitchen2017-02-031-2/+5
| | | | | | | | | This patch fixes the value returned by atmel_aes_handle_queue(), which could have been wrong previously when the crypto request was started synchronously but became asynchronous during the ctx->start() call. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - drop pointless static qualifier in atmel_aes_probe()Wei Yongjun2016-11-011-1/+1
| | | | | | | | There is no need to have the 'struct atmel_aes_dev *aes_dd' variable static since new value always be assigned before use it. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add support to the XTS modeCyrille Pitchen2016-10-211-6/+179
| | | | | | | | This patch adds the xts(aes) algorithm, which is supported from hardware version 0x500 and above (sama5d2x). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix compiler error when VERBOSE_DEBUG is definedCyrille Pitchen2016-10-211-1/+1
| | | | | | | | | | This patch fixes a compiler error when VERBOSE_DEBUG is defined. Indeed, in atmel_aes_write(), the 3rd argument of atmel_aes_reg_name() was missing. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reported-by: Levent Demir <levent.demir@inria.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Merge branch 'linus' of ↵Linus Torvalds2016-03-171-8/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto update from Herbert Xu: "Here is the crypto update for 4.6: API: - Convert remaining crypto_hash users to shash or ahash, also convert blkcipher/ablkcipher users to skcipher. - Remove crypto_hash interface. - Remove crypto_pcomp interface. - Add crypto engine for async cipher drivers. - Add akcipher documentation. - Add skcipher documentation. Algorithms: - Rename crypto/crc32 to avoid name clash with lib/crc32. - Fix bug in keywrap where we zero the wrong pointer. Drivers: - Support T5/M5, T7/M7 SPARC CPUs in n2 hwrng driver. - Add PIC32 hwrng driver. - Support BCM6368 in bcm63xx hwrng driver. - Pack structs for 32-bit compat users in qat. - Use crypto engine in omap-aes. - Add support for sama5d2x SoCs in atmel-sha. - Make atmel-sha available again. - Make sahara hashing available again. - Make ccp hashing available again. - Make sha1-mb available again. - Add support for multiple devices in ccp. - Improve DMA performance in caam. - Add hashing support to rockchip" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits) crypto: qat - remove redundant arbiter configuration crypto: ux500 - fix checks of error code returned by devm_ioremap_resource() crypto: atmel - fix checks of error code returned by devm_ioremap_resource() crypto: qat - Change the definition of icp_qat_uof_regtype hwrng: exynos - use __maybe_unused to hide pm functions crypto: ccp - Add abstraction for device-specific calls crypto: ccp - CCP versioning support crypto: ccp - Support for multiple CCPs crypto: ccp - Remove check for x86 family and model crypto: ccp - memset request context to zero during import lib/mpi: use "static inline" instead of "extern inline" lib/mpi: avoid assembler warning hwrng: bcm63xx - fix non device tree compatibility crypto: testmgr - allow rfc3686 aes-ctr variants in fips mode. crypto: qat - The AE id should be less than the maximal AE number lib/mpi: Endianness fix crypto: rockchip - add hash support for crypto engine in rk3288 crypto: xts - fix compile errors crypto: doc - add skcipher API documentation crypto: doc - update AEAD AD handling ...
| * crypto: atmel - fix checks of error code returned by devm_ioremap_resource()Vladimir Zapolskiy2016-03-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The change fixes potential oops while accessing iomem on invalid address, if devm_ioremap_resource() fails due to some reason. The devm_ioremap_resource() function returns ERR_PTR() and never returns NULL, which makes useless a following check for NULL. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Fixes: b0e8b3417a62 ("crypto: atmel - use devm_xxx() managed function") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
| * crypto: aead - move aead_request_cast helper to aead.hTadeusz Struk2016-02-061-6/+0
| | | | | | | | | | | | | | | | | | | | | | Move the helper function to common header for everybody to use. changes in v2: - move the helper to crypto/internal/aead.h instead of crypto/aead.h Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* | crypto: atmel-aes - remove calls of clk_prepare() from atomic contextsCyrille Pitchen2016-01-301-4/+12
|/ | | | | | | | | | | | | | | clk_prepare()/clk_unprepare() must not be called within atomic context. This patch calls clk_prepare() once for all from atmel_aes_probe() and clk_unprepare() from atmel_aes_remove(). Then calls of clk_prepare_enable()/clk_disable_unprepare() were replaced by calls of clk_enable()/clk_disable(). Cc: stable@vger.kernel.org Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reported-by: Matthias Mayr <matthias.mayr@student.kit.edu> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - Add missing break to atmel_aes_reg_nameHerbert Xu2016-01-191-0/+1
| | | | | | | | The debug function atmel_aes_reg_name was missing a break for AES_GCMHR. Reported-by: David Binderman <dcb314@hotmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add debug facilities to monitor register accesses.Cyrille Pitchen2015-12-231-1/+114
| | | | | | | | | | This feature should not be enabled in release but can be usefull for developers who need to monitor register accesses at some specific places. Set the AES_FLAGS_DUMP_REG flag inside dd->flags to start monitoring the I/O accesses, clear it to stop monitoring. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add support to GCM modeCyrille Pitchen2015-12-231-2/+451
| | | | | | | This patch adds support to the GCM mode. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - change the DMA thresholdCyrille Pitchen2015-12-231-1/+1
| | | | | | | | Increase the DMA threshold to 256: PIO accesses offer better performances than the DMA when processing small amounts of data. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix the counter overflow in CTR modeCyrille Pitchen2015-12-231-2/+115
| | | | | | | | | | Depending on its hardware version, the AES IP provides either a 16 or a 32 bit counter. However the CTR mode expects the size of the counter to be the same as the size of the cipher block, ie 128 bits for AES. This patch detects and handles counter overflows. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix atmel-ctr-aes driver for RFC 3686Cyrille Pitchen2015-12-231-1/+1
| | | | | | | | crypto_rfc3686_alloc() in crypto/ctr.c expects to be used with a stream cipher (alg->cra_blocksize == 1). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - create sections to regroup functions by usageCyrille Pitchen2015-12-231-102/+108
| | | | | | | | | | | | | | | | This patch only creates sections to regroup functions by usage. This will help to integrate the GCM support patch later by making the difference between shared/common and specific code. Hence current sections are: - Shared functions: common code which will be reused by the GCM support. - CPU transfer: handles transfers monitored by the CPU (PIO accesses). - DMA transfer: handles transfers monitored by the DMA controller. - AES async block ciphers: dedicated to the already supported block ciphers - Probe functions: used to register all crypto algorithms. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix typo and indentationCyrille Pitchen2015-12-231-31/+25
| | | | | | | Dummy patch to fix typo and indentation. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - use SIZE_IN_WORDS() helper macroCyrille Pitchen2015-12-231-2/+2
| | | | | | | This is a dummy cosmetic patch. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - improve performances of data transferCyrille Pitchen2015-12-231-378/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch totally reworks data transfer. 1 - DMA The new code now fully supports scatter-gather lists hence reducing the number of interrupts in some cases. Also buffer alignments are better managed to avoid useless copies. 2 - CPU The new code allows to use PIO accesses even when transferring more than one AES block, so futher patches could tune the DMA threshold (ATMEL_AES_DMA_THRESHOLD). Moreover, CPU transfers now have a chance to be processed synchronously, hence reducing the latency by avoiding context switches when possible (less interrupts to process, less scheduling of the 'done' task). Indeed the 'DATA READY' bit is polled only one time in the Interrupt Status Register before enabling then waiting for the associated interrupt. In some condition, this single poll is enough as the data have already been processed by the AES hardware and so are ready. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix atmel_aes_remove()Cyrille Pitchen2015-12-231-0/+1
| | | | | | | Add missing call to atmel_aes_buff_cleanup(). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove useless AES_FLAGS_DMA flagCyrille Pitchen2015-12-231-22/+15
| | | | | | | | Since the 'done' task code was split into atmel_aes_cpu_complete() and atmel_aes_dma_complete(), the AES_FLAGS_DMA flag has become useless. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - reduce latency of DMA completionCyrille Pitchen2015-12-231-2/+2
| | | | | | | | | atmel_aes_dma_callback() now directly calls the 'resume' callback instead of scheduling the done task, which in turn only calls the very same 'resume' callback. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove unused 'err' member of struct atmel_aes_devCyrille Pitchen2015-12-231-5/+0
| | | | | | | This 'err' member was initialized to 0 but its value never changed. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - rework crypto request completionCyrille Pitchen2015-12-231-27/+47
| | | | | | | | | | | | | This patch introduces a new callback 'resume' in the struct atmel_aes_dev. This callback is run to resume/complete the processing of the crypto request when woken up by I/O events such as AES interrupts or DMA completion. This callback will help implementing the GCM mode support in further patches. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - simplify the configuration of the AES IPCyrille Pitchen2015-12-231-123/+93
| | | | | | | | This patch reworks the AES_FLAGS_* to simplify the configuration of the AES IP. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove useless write in the Control RegisterCyrille Pitchen2015-12-231-2/+1
| | | | | | | | As claimed by the datasheet, writing 0 into the Control Register has no effet. So we remove this useless register access. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - make crypto request queue management more genericCyrille Pitchen2015-12-231-26/+49
| | | | | | | | | | | | | | | | This patch changes atmel_aes_handle_queue() to make it more generic. The function argument is now a pointer to struct crypto_async_request, which is the common base of struct ablkcipher_request and struct aead_request. Also this patch introduces struct atmel_aes_base_ctx which will be the common base of all the transformation contexts. Hence the very same queue will be used to manage both block cipher and AEAD requests (such as gcm and authenc implemented in further patches). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - change atmel_aes_write_ctrl() signatureCyrille Pitchen2015-12-231-14/+10
| | | | | | | | | | | | | | | | This patch changes the signature of atmel_aes_write_ctrl() to make it more generic. This will be used by future patches when implementing new block cipher modes such as GCM. Especially atmel_aes_hw_init() is now called outside atmel_aes_write_ctrl(): this allows to call atmel_aes_write_ctrl() many times, still initializing the hardware only once. Indeed, the support of GCM will require to update the Mode Register and the IV when processing a single request. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - propagate error from atmel_aes_hw_version_init()Cyrille Pitchen2015-12-231-5/+11
| | | | | | | | | Before this patch atmel_aes_hw_version_init() had no returned value. However it calls atmel_aes_hw_init(), which may fail. So check the returned code of atmel_aes_hw_init() and propagate error if needed. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove unused header includesCyrille Pitchen2015-12-231-3/+0
| | | | | | | Hash headers have nothing to do with AES block ciphers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix unregistration order of crypto algorithmsCyrille Pitchen2015-12-231-2/+3
| | | | | | | | | This dummy patch fixes atmel_aes_unregister_algs() so crypto algorithms are unregistered in the reverse order they were registered by atmel_aes_register_algs(). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - change algorithm prioritiesCyrille Pitchen2015-12-231-9/+11
| | | | | | | | | Increase the algorithm priorities so the hardware acceleration is now preferred to the software computation: the "aes-generice" driver uses 100 as priority. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - constify value argument of atmel_aes_write_n()Cyrille Pitchen2015-12-231-1/+1
| | | | | | | atmel_aes_write_n() should not modify its value argument. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add new versionLeilei Zhao2015-12-231-0/+5
| | | | | | | Add new version of atmel-aes available with SAMA5D2 devices. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - fix 64-bit warningsArnd Bergmann2015-11-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | The atmel AES driver assumes that 'int' and 'size_t' are the same type in multiple locations, which the compiler warns about when building it for 64-bit systems: In file included from ../drivers/crypto/atmel-aes.c:17:0: drivers/crypto/atmel-aes.c: In function 'atmel_aes_sg_copy': include/linux/kernel.h:724:17: warning: comparison of distinct pointer types lacks a cast drivers/crypto/atmel-aes.c:448:11: note: in expansion of macro 'min' drivers/crypto/atmel-aes.c: In function 'atmel_aes_crypt_dma_stop': include/linux/kern_levels.h:4:18: warning: format '%u' expects argument of type 'unsigned int', but argument 2 has type 'size_t {aka long unsigned int}' [-Wformat=] This changes the format strings to use the %z modifier when printing a size_t, and makes sure that we use the correct size_t type where needed. In case of sg_dma_len(), the type of the result depends on CONFIG_NEED_SG_DMA_LENGTH, so we have to use min_t to get it to work in all configurations. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - use devm_xxx() managed functionLABBE Corentin2015-10-141-29/+9
| | | | | | | | Using the devm_xxx() managed function to stripdown the error and remove code. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel - Check for clk_prepare_enable() return valueLABBE Corentin2015-10-081-1/+5
| | | | | | | | clk_prepare_enable() can fail so add a check for this and return the error code if it fails. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - correct usage of dma_sync_* APILeilei Zhao2015-04-081-1/+1
| | | | | | | | | | | The output buffer is used for CPU access, so the API should be dma_sync_single_for_cpu which makes the cache line invalid in order to reload the value in memory. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - sync the buf used in DMA or CPULeilei Zhao2015-04-081-4/+12
| | | | | | | | | | | | | | | | | | The input buffer and output buffer are mapped for DMA transfer in Atmel AES driver. But they are also be used by CPU when the requested crypt length is not bigger than the threshold value 16. The buffers will be cached in cache line when CPU accessed them. When DMA uses the buffers again, the memory can happened to be flushed by cache while DMA starts transfer. So using API dma_sync_single_for_device and dma_sync_single_for_cpu in DMA to ensure DMA coherence and CPU always access the correct value. This fix the issue that the encrypted result periodically goes wrong when doing performance test with OpenSSH. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - initialize spinlock in probeLeilei Zhao2015-04-081-0/+1
| | | | | | | | | | | Kernel will report "BUG: spinlock lockup suspected on CPU#0" when CONFIG_DEBUG_SPINLOCK is enabled in kernel config and the spinlock is used at the first time. It's caused by uninitialized spinlock, so just initialize it in probe. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add new versionLeilei Zhao2015-04-081-0/+5
| | | | | | | | | Add new version of atmel-aes available with SAMA5D4 devices. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 23:38:36 +0100