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path: root/drivers/crypto/ccp/ccp-dev-v3.c (follow)
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* csrypto: ccp - Expand RSA support for a v5 ccpGary R Hook2017-07-281-0/+1
| | | | | | | A version 5 CCP can handle an RSA modulus up to 16k bits. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Update copyright dates for 2017.Gary R Hook2017-07-281-1/+1
| | | | | | | | Some updates this year have not had copyright dates changed in modified files. Correct this for 2017. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Abstract interrupt registerationBrijesh Singh2017-07-181-3/+3
| | | | | | | | | | | The CCP and PSP devices part of AMD Secure Procesor may share the same interrupt. Hence we expand the SP device to register a common interrupt handler and provide functions to CCP and PSP devices to register their interrupt callback which will be invoked upon interrupt. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Introduce the AMD Secure Processor deviceBrijesh Singh2017-07-181-3/+1
| | | | | | | | | | | The CCP device is part of the AMD Secure Processor. In order to expand the usage of the AMD Secure Processor, create a framework that allows functional components of the AMD Secure Processor to be initialized and handled appropriately. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Use devres interface to allocate PCI/iomap and cleanupBrijesh Singh2017-07-181-0/+7
| | | | | | | | | | Update pci and platform files to use devres interface to allocate the PCI and iomap resources. Also add helper functions to consolicate module init, exit and power mangagement code duplication. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Change ISR handler method for a v3 CCPGary R Hook2017-04-241-50/+70
| | | | | | | | | | | | | | | | | | | | | | The CCP has the ability to perform several operations simultaneously, but only one interrupt. When implemented as a PCI device and using MSI-X/MSI interrupts, use a tasklet model to service interrupts. By disabling and enabling interrupts from the CCP, coupled with the queuing that tasklets provide, we can ensure that all events (occurring on the device) are recognized and serviced. This change fixes a problem wherein 2 or more busy queues can cause notification bits to change state while a (CCP) interrupt is being serviced, but after the queue state has been evaluated. This results in the event being 'lost' and the queue hanging, waiting to be serviced. Since the status bits are never fully de-asserted, the CCP never generates another interrupt (all bits zero -> one or more bits one), and no further CCP operations will be executed. Cc: <stable@vger.kernel.org> # 4.9.x+ Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Enable 3DES function on v5 CCPsGary R Hook2017-03-241-0/+1
| | | | | | | Wire up support for Triple DES in ECB mode. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Clean up the LSB slot allocation codeGary R Hook2016-10-251-4/+0
| | | | | | | | | | Fix a few problems revealed by testing: verify consistent units, especially in public slot allocation. Percolate some common initialization code up to a common routine. Add some comments. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Make syslog errors human-readableGary R Hook2016-10-021-0/+3
| | | | | | | Add human-readable strings to log messages about CCP errors Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - clean up data structureGary R Hook2016-10-021-1/+1
| | | | | | | | Change names of data structure instances. Add const keyword where appropriate. Add error handling path. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Add support for the RNG in a version 5 CCPGary R Hook2016-08-091-9/+4
| | | | | Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Let a v5 CCP provide the same function as v3Gary R Hook2016-08-091-12/+16
| | | | | | | | | | Enable equivalent function on a v5 CCP. Add support for a version 5 CCP which enables AES/XTS/SHA services. Also, more work on the data structures to virtualize functionality. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Refactor code to enable checks for queue space.Gary R Hook2016-08-091-1/+7
| | | | | | | | | Available queue space is used to decide (by counting free slots) if we have to put a command on hold or if it can be sent to the engine immediately. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Refactor code supporting the CCP's RNGGary R Hook2016-08-091-40/+11
| | | | | | | | Make the RNG support code common (where possible) in preparation for adding a v5 device. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Refactor the storage block allocation codeGary R Hook2016-08-091-0/+52
| | | | | | | | | | | | Move the KSB access/management functions to the v3 device file, and add function pointers to the actions structure. At the operations layer all of the references to the storage block will be generic (virtual). This is in preparation for a version 5 device, in which the private storage block is managed differently. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Refactoring: symbol cleanupGary R Hook2016-08-091-16/+16
| | | | | | | | | | | | | Form and use of the local storage block in the CCP is particular to the device version. Much of the code that accesses the storage block can treat it as a virtual resource, and will under go some renaming. Device-specific access to the memory will be moved into device file. Service functions will be added to the actions structure. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Shorten the fields of the action structureGary R Hook2016-08-091-6/+6
| | | | | | | Use more concise field names; "perform_" is too verbose. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Abstract PCI info for the CCPGary R Hook2016-08-091-0/+3
| | | | | | | | Device-specific values for the BAR and offset should be found in the version data structure. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - constify ccp_actions structureJulia Lawall2016-05-031-1/+1
| | | | | | | | | | The ccp_actions structure is never modified, so declare it as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Gary Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Register the CCP as a DMA resourceGary R Hook2016-04-201-0/+11
| | | | | | | | | | | | | | | | | | | The CCP has the ability to provide DMA services to the kernel using pass-through mode of the device. Register these services as general purpose DMA channels. Changes since v2: - Add a Signed-off-by Changes since v1: - Allocate memory for a string in ccp_dmaengine_register - Ensure register/unregister calls are properly ordered - Verified all changed files are listed in the diffstat - Undo some superfluous changes - Added a cc: Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Add abstraction for device-specific callsGary R Hook2016-03-111-0/+533
Support for different generations of the coprocessor requires that an abstraction layer be implemented for interacting with the hardware. This patch splits out version-specific functions to a separate file and populates the version structure (acting as a driver) with function pointers. Signed-off-by: Gary R Hook <gary.hook@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>