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path: root/drivers/cxl/mem.c (follow)
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* cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()Li Ming2024-09-041-1/+1
* cxl/port: Use scoped_guard()/guard() to drop device_lock() for cxl_portLi Ming2024-09-031-12/+10
* cxl/port: Use __free() to drop put_device() for cxl_portLi Ming2024-09-031-3/+2
* Merge tag 'cxl-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds2024-07-281-0/+1
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| * cxl: add missing MODULE_DESCRIPTION() macrosJeff Johnson2024-07-021-0/+1
* | cxl/mem: Fix no cxl_nvd during pmem region auto-assemblingLi Ming2024-06-191-8/+9
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* cxl: Fix sysfs export of qos_class for memdevDave Jiang2024-02-171-36/+0
* cxl: Change 'struct cxl_memdev_state' *_perf_list to single 'struct cxl_dpa_p...Dave Jiang2024-02-171-24/+4
* cxl: Export sysfs attributes for memory device QoS classDave Jiang2023-12-231-6/+61
* cxl/pci: Add RCH downstream port AER register discoveryRobert Richter2023-10-281-0/+2
* cxl/hdm: Use stored Component Register mappings to map HDM decoder capabilityRobert Richter2023-10-281-3/+2
* Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams2023-06-261-13/+3
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| * cxl/pci: Early setup RCH dport component registers from RCRBRobert Richter2023-06-251-9/+0
| * cxl/mem: Prepare for early RCH dport component register setupRobert Richter2023-06-251-5/+4
| * cxl: Rename 'uport' to 'uport_dev'Dan Williams2023-06-251-1/+1
| * cxl/acpi: Probe RCRB later during RCH downstream port creationRobert Richter2023-06-251-2/+2
* | cxl/mbox: Move mailbox related driver state to its own data structureDan Williams2023-06-251-3/+7
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* cxl: Move cxl_await_media_ready() to before capacity info retrievalDave Jiang2023-05-191-0/+3
* cxl/mem: Add debugfs attributes for poison inject and clearAlison Schofield2023-04-231-0/+28
* cxl/memdev: Add trigger_poison_list sysfs attributeAlison Schofield2023-04-231-0/+43
* cxl/port: Add RCD endpoint port enumerationDan Williams2022-12-051-8/+25
* cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memDan Williams2022-12-051-0/+38
* cxl/pmem: Refactor nvdimm device registration, delete the workqueueDan Williams2022-12-031-0/+9
* cxl/mem: Enumerate port targets before adding endpointsDan Williams2022-07-221-29/+1
* cxl/port: Record parent dport when adding portsDan Williams2022-07-221-4/+6
* cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'Dan Williams2022-07-101-0/+23
* cxl: Fix cleanup of port devices on failure to probe driver.Jonathan Cameron2022-06-211-1/+6
* cxl/port: Move endpoint HDM Decoder Capability init to port driverDan Williams2022-05-191-11/+0
* cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams2022-05-191-2/+1
* cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams2022-05-191-79/+1
* cxl/mem: Skip range enumeration if mem_enable clearDan Williams2022-05-191-1/+1
* cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams2022-05-191-6/+8
* cxl/pci: Move cxl_await_media_ready() to the coreDan Williams2022-05-191-1/+1
* cxl/mem: Validate port connectivity before dvsec rangesDan Williams2022-05-191-16/+16
* cxl/mem: Fix cxl_mem_probe() error exitDan Williams2022-05-191-2/+4
* cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()Dan Williams2022-05-191-18/+1
* cxl/mem: Drop mem_enabled check from wait_for_media()Dan Williams2022-05-191-4/+0
* cxl: Drop cxl_device_lock()Dan Williams2022-04-281-2/+2
* PM: CXL: Disable suspendDan Williams2022-04-231-1/+21
* cxl/mem: Replace redundant debug message with a commentDan Williams2022-04-131-4/+10
* cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Dan Williams2022-04-131-6/+6
* cxl/mem: Make cxl_dvsec_range() init failure fatalDan Williams2022-04-131-0/+3
* cxl/mem: Drop DVSEC vs EFI Memory Map sanity checkDan Williams2022-04-131-23/+1
* cxl/mem: Add the cxl_mem driverBen Widawsky2022-02-091-0/+228
* cxl: Rename mem to pciBen Widawsky2021-05-261-1525/+0
* cxl/core: Refactor CXL register lookup for bridge reuseDan Williams2021-05-151-44/+6
* cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devicesDan Williams2021-05-151-20/+24
* cxl/mem: Move some definitions to mem.hDan Williams2021-05-151-20/+1
* cxl/mem: Fix memory device capacity probingDan Williams2021-04-171-2/+5
* cxl/mem: Fix register block offset calculationBen Widawsky2021-04-161-1/+1
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