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* cxl/pmem: Fix module reload vs workqueue stateDan Williams2021-11-153-3/+42
* ACPI: NUMA: Add a node and memblk for each CFMWS not in SRATAlison Schofield2021-11-151-1/+2
* cxl/test: Mock acpi_table_parse_cedt()Dan Williams2021-11-151-0/+2
* cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpersDan Williams2021-11-152-147/+88
* cxl/memdev: Remove unused cxlmd fieldIra Weiny2021-11-151-2/+0
* cxl/core: Convert to EXPORT_SYMBOL_NS_GPLDan Williams2021-11-156-29/+29
* cxl/memdev: Change cxl_mem to a more descriptive nameIra Weiny2021-11-155-211/+214
* cxl/mbox: Remove bad commentIra Weiny2021-11-151-2/+0
* cxl/pmem: Fix reference counting for delayed workDan Williams2021-11-151-4/+13
* Merge tag 'cxl-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds2021-11-0812-1311/+1580
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| * cxl/pci: Use pci core's DVSEC functionalityBen Widawsky2021-10-291-24/+2
| * cxl/pci: Split cxl_pci_setup_regs()Ben Widawsky2021-10-291-36/+37
| * cxl/pci: Add @base to cxl_register_mapDan Williams2021-10-292-15/+26
| * cxl/pci: Make more use of cxl_register_mapBen Widawsky2021-10-291-34/+25
| * cxl/pci: Remove pci request/release regionsBen Widawsky2021-10-291-5/+0
| * cxl/pci: Fix NULL vs ERR_PTR confusionDan Williams2021-10-291-1/+1
| * cxl/pci: Remove dev_dbg for unknown register blocksBen Widawsky2021-10-291-3/+0
| * cxl/pci: Convert register block identifiers to an enumBen Widawsky2021-10-291-6/+8
| * cxl/acpi: Do not fail cxl_acpi_probe() based on a missing CHBSAlison Schofield2021-10-081-4/+6
| * cxl/pci: Disambiguate cxl_pci further from cxl_memBen Widawsky2021-09-211-33/+35
| * cxl/core: Split decoder setup into alloc + addDan Williams2021-09-215-126/+114
| * tools/testing/cxl: Introduce a mock memory device + driverDan Williams2021-09-213-5/+5
| * cxl/mbox: Move command definitions to common locationDan Williams2021-09-213-48/+65
| * cxl/bus: Populate the target list at decoder createDan Williams2021-09-213-27/+91
| * tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams2021-09-212-15/+37
| * cxl/pmem: Add support for multiple nvdimm-bridge objectsDan Williams2021-09-213-16/+33
| * cxl/pmem: Translate NVDIMM label commands to CXL label commandsDan Williams2021-09-211-4/+124
| * cxl/mbox: Add exclusive kernel command supportDan Williams2021-09-214-3/+67
| * cxl/mbox: Convert 'enabled_cmds' to DECLARE_BITMAPDan Williams2021-09-212-12/+2
| * cxl/pci: Use module_pci_driverDan Williams2021-09-211-22/+8
| * cxl/mbox: Move mailbox and other non-PCI specific infrastructure to the coreDan Williams2021-09-217-949/+972
| * cxl/pci: Drop idr.hDan Williams2021-09-211-1/+0
| * cxl/mbox: Introduce the mbox_send operationDan Williams2021-09-212-55/+63
| * cxl/pci: Clean up cxl_mem_get_partition_info()Dan Williams2021-09-212-26/+24
| * cxl/pci: Make 'struct cxl_mem' device type genericDan Williams2021-09-213-47/+41
* | cxl/core: Replace unions with struct_group()Kees Cook2021-09-251-43/+18
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* Merge tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds2021-09-0913-723/+988
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| * cxl/registers: Fix Documentation warningDan Williams2021-09-071-1/+14
| * cxl/pmem: Fix Documentation warningDan Williams2021-09-071-2/+28
| * cxl/pci: Fix debug message in cxl_probe_regs()Li Qiang (Johnny Li)2021-09-071-2/+2
| * cxl/pci: Fix lockdown levelDan Williams2021-09-071-1/+1
| * cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge portsAlison Schofield2021-09-071-4/+8
| * cxl/mem: Adjust ram/pmem range to represent DPA rangesIra Weiny2021-08-111-8/+6
| * cxl/mem: Account for partitionable space in ram/pmem rangesIra Weiny2021-08-102-5/+96
| * cxl/pci: Store memory capacity valuesIra Weiny2021-08-072-3/+37
| * cxl/pci: Simplify register setupBen Widawsky2021-08-063-27/+13
| * cxl/pci: Ignore unknown register block typesBen Widawsky2021-08-061-8/+12
| * cxl/core: Move memdev management to coreBen Widawsky2021-08-066-234/+275
| * cxl/pci: Introduce cdevm_file_operationsDan Williams2021-08-062-27/+53
| * cxl/core: Move register mapping infrastructureDan Williams2021-08-063-228/+237