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2020-01-06spi: dw: use "smp_mb()" to avoid sending spi data errorXinwei Kong1-0/+3
2020-01-03spi: Document Octal mode as valid SPI bus widthVignesh Raghavendra1-2/+2
2020-01-03spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent callswuxu.wu2-3/+13
2019-12-31spi: spi-fsl-dspi: Fix 16-bit word order in 32-bit XSPI modeVladimir Oltean1-11/+4
2019-12-28spi: Don't look at TX buffer for PTP system timestampingVladimir Oltean3-19/+16
2019-12-25spi: uniphier: Fix FIFO thresholdKunihiko Hayashi1-12/+19
2019-12-16spi: fsl: use platform_get_irq() instead of of_irq_to_resource()Christophe Leroy1-3/+3
2019-12-16spi: nxp-fspi: Ensure width is respected in spi-mem operationsMichael Walle1-1/+1
2019-12-11spi: spi-ti-qspi: Fix a bug when accessing non default CSVignesh Raghavendra1-1/+5
2019-12-09spi: fsl: don't map irq during probeChristophe Leroy1-3/+2
2019-12-09spi: spi-cavium-thunderx: Add missing pci_release_regions()Chuhong Yuan1-0/+2
2019-12-04spi: sprd: Fix the incorrect SPI registerHuanpeng Xin1-1/+1
2019-12-03gpiolib: of: Make of_gpio_spi_cs_get_count staticYueHaibing1-1/+1
2019-11-28spi: fsl: Handle the single hardwired chipselect caseLinus Walleij1-2/+12
2019-11-28gpio: Handle counting of Freescale chipselectsLinus Walleij1-0/+27
2019-11-28spi: fsl: Fix GPIO descriptor supportLinus Walleij1-0/+1
2019-11-28spi: dw: Correct handling of native chipselectCharles Keepax1-2/+3
2019-11-27spi: cadence: Correct handling of native chipselectCharles Keepax1-3/+3
2019-11-25spi: pxa2xx: Add support for Intel Jasper LakeJarkko Nikula1-0/+4
2019-11-22dt-bindings: spi: Convert stm32 QSPI bindings to json-schemaBenjamin Gaignard2-47/+83
2019-11-22spi: pic32: Retire dma_request_slave_channel_compat()Peter Ujfalusi1-16/+30
2019-11-20spi: Fix Kconfig indentationKrzysztof Kozlowski1-9/+9
2019-11-18spi: mediatek: add SPI_CS_HIGH supportLuhua Xu2-3/+10
2019-11-18spi: st-ssc4: add missed pm_runtime_disableChuhong Yuan1-0/+3
2019-11-15spi: tegra20-slink: add missed clk_unprepareChuhong Yuan1-1/+4
2019-11-15spi: tegra20-slink: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+1
2019-11-15spi: tegra114: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+1
2019-11-15spi: s3c64xx: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-4/+2
2019-11-15spi: qup: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
2019-11-15spi: pl022: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
2019-11-15spi: imx: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
2019-11-15spi: fsl-lpspi: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
2019-11-15spi: atmel: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-1/+1
2019-11-15spi: at91-usart: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
2019-11-12spi: Fix regression to return zero on success instead of positive valueTony Lindgren1-0/+9
2019-11-11spi: pxa2xx: Add missed security checksChuhong Yuan1-0/+6
2019-11-11spi: nxp-fspi: Use devm API to fix missed unregistration of controllerChuhong Yuan1-1/+1
2019-11-11spi: omap2-mcspi: Remove redundant checksVignesh Raghavendra1-58/+47
2019-11-08spi: zynq-qspi: Support two chip selectsMiquel Raynal1-8/+25
2019-11-08spi: zynq-qspi: Do the actual hardware initialization later in the probeMiquel Raynal1-3/+4
2019-11-08spi: zynq-qspi: Clarify the select chip functionMiquel Raynal1-11/+6
2019-11-08spi: zynq-qspi: Enhance the Linear CFG bit definitionsMiquel Raynal1-3/+3
2019-11-08spi: zynq-qspi: Keep the bitfields naming consistentMiquel Raynal1-6/+6
2019-11-08spi: zynq-qspi: Anything else than CS0 is not supported yetMiquel Raynal1-2/+6
2019-11-08spi: zynq-qspi: Keep the naming consistent across the driverMiquel Raynal1-5/+5
2019-11-07spi: spi-mem: fallback to using transfers when CS gpios are usedChris Packham1-1/+1
2019-11-07spi: bcm-qspi: Convert to use CS GPIO descriptorsChris Packham1-2/+5
2019-11-06spi: img-spfi: fix potential double releasePan Bian1-0/+2
2019-10-31spi: add power control when set_csLuhua Xu1-1/+14
2019-10-30spi: zynq-qspi: Drop GPIO headerLinus Walleij1-1/+0
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