summaryrefslogtreecommitdiffstats
path: root/drivers/dma/tegra20-apb-dma.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* dmaengine: tegra20-apb-dma: convert callback to helper functionDave Jiang2016-08-081-6/+4
| | | | | | | | | | | | This is in preperation of moving to a callback that provides results to the callback for the transaction. The conversion will maintain current behavior and the driver must convert to new callback mechanism at a later time in order to receive results. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'topic/tegra' into for-linusVinod Koul2016-07-161-7/+5
|\
| * dmaengine: tegra: Remove some whitespace funkinessThierry Reding2016-06-141-7/+5
| | | | | | | | | | | | | | | | | | There are some places where whitespace is used in very funky ways. Fix the most serious ones to make the code easier on the eye. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: tegra-apb: Return the actual descriptor statusJon Hunter2016-06-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 71f7e6cc5500 ('dmaengine: tegra20-apb-dma: Only calculate residue if txstate exists') changed the tegra_dma_tx_status() function to only calculate the residue if there is a valid 'txstate' pointer for storing the residue. Although this makes sense, this changed the behaviour of the function tegra_dma_tx_status() such that if the pointer 'txstate' is not valid, then we will return whatever state is returned by dma_cookie_status() and no longer return the state by looking up the DMA descriptor and returning it's state. Please note that dma_cookie_status() will either return DMA_COMPLETE or DMA_IN_PROGRESS. However, if dma_cookie_status() returns DMA_IN_PROGRESS the actual status could be DMA_ERROR which will only be seen from checking the descriptor status. Therefore, even if 'txstate' is not valid, still check to see if there is a valid descriptor for the cookie in question and if so return the descriptor state. Finally, ensure the residue is still not calculated if the 'txstate' is not valid. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: tegra-apb: Remove duplicated residue calculationJon Hunter2016-06-301-12/+12
| | | | | | | | | | | | | | | | | | | | The calculation of the DMA residue for the Tegra APB DMA is duplicated in two places in the tegra_dma_tx_status() function. Remove this duplicated code by moving calculation to the end of the function and only calculating if we found a valid descriptor. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: tegra-apb: Correct grammar in TX status debug messageJon Hunter2016-06-301-1/+1
| | | | | | | | | | | | | | Correct the grammar in the debug message when no descriptor is found. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: Remove site specific OOM error messages on kzallocPeter Griffin2016-06-211-8/+3
| | | | | | | | | | | | | | | | | | | | If kzalloc() fails it will issue it's own error message including a dump_stack(). So remove the site specific error messages. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: tegra20-apb-dma: Only calculate residue if txstate exists.Peter Griffin2016-06-211-1/+1
|/ | | | | | | | There is no point calculating the residue if there is no txstate to store the value. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: proper default init of channel slave_idShardar Shariff Md2016-05-021-2/+14
| | | | | | | | | | | | Initialize default channel slave_id(req_sel) to invalid id (i.e max supported slave id + 1) to avoid overwriting of slave_id during tegra_dma_slave_config() with client data if slave_id is not initialized through DT Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra: Move of_device_id table near to its userLaxman Dewangan2016-03-041-19/+18
| | | | | | | | | | After using the function of_device_get_match_data(), the of_device_id table for tegra20 dma is not used by probe() and hence moving it near to place where platform driver is defined as this table used only on this data structure. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra: don't open code of_device_get_match_data()Laxman Dewangan2016-03-031-6/+4
| | | | | | | | | Use of_device_get_match_data() for getting matched data instead of implementing this locally. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Free interrupts before killing taskletsJon Hunter2015-12-051-2/+4
| | | | | | | | | On probe failure or driver removal, before killing any tasklets, ensure that the channel interrupt is freed to ensure that another channel interrupt cannot occur and schedule the tasklet again. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Update driver to use GFP_NOWAITJon Hunter2015-12-051-2/+2
| | | | | | | | | | | The tegra20-apb-dma driver currently uses the flag GFP_ATOMIC when allocating memory for structures used in conjunction with the DMA descriptors. It is preferred that dmaengine drivers use GFP_NOWAIT instead and so the emergency memory pool will not be used by these drivers. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Only save channel state for those in useJon Hunter2015-12-051-0/+8
| | | | | | | | | | Currently the tegra-apb DMA driver suspend/resume helpers, save and restore the registers for all channels regardless of whether they are in use or not. Change this so that only channels that have been allocated and configured are saved and restored. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Save and restore word countJon Hunter2015-12-051-0/+6
| | | | | | | | | | Newer tegra devices have a separate word count register per channel that contains the number of words to be transferred. This register is not saved or restored by the suspend/resume helpers for these newer devices and so ensure that it is. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Use dev_get_drvdata()Jon Hunter2015-12-051-4/+2
| | | | | | | | | In the tegra_dma_runtime_suspend/resume functions, the pdev structure is not needed, and so just call dev_get_drvdata() to get the device data structure. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Correct runtime-pm usageJon Hunter2015-12-051-25/+18
| | | | | | | | | | | | | | | | The tegra-apb DMA driver enables runtime-pm but never calls pm_runtime_get/put and hence the runtime-pm callbacks are never invoked. The driver manages the clocks by directly calling clk_prepare_enable() and clk_unprepare_disable(). Fix this by replacing the clk_prepare_enable() and clk_disable_unprepare() with pm_runtime_get_sync() and pm_runtime_put(), respectively. Note that the consequence of this is that if runtime-pm is disabled, then the clocks will remain on the entire time the driver is loaded. However, if runtime-pm is disabled, then power is not most likely not a concern. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Simplify locking for device using global pauseJon Hunter2015-08-201-4/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sparse reports the following with regard to locking in the tegra_dma_global_pause() and tegra_dma_global_resume() functions: drivers/dma/tegra20-apb-dma.c:362:9: warning: context imbalance in 'tegra_dma_global_pause' - wrong count at exit drivers/dma/tegra20-apb-dma.c:366:13: warning: context imbalance in 'tegra_dma_global_resume' - unexpected unlock The warning is caused because tegra_dma_global_pause() acquires a lock but does not release it. However, the lock is released by tegra_dma_global_resume(). These pause/resume functions are called in pairs and so it does appear to work. This global pause is used on early tegra devices that do not have an individual pause for each channel. The lock appears to be used to ensure that multiple channels do not attempt to assert/de-assert the global pause at the same time which could cause the DMA controller to be in the wrong paused state. Rather than locking around the entire code between the pause and resume, employ a simple counter to keep track of the global pause requests. By using a counter, it is only necessary to hold the lock when pausing and unpausing the DMA controller and hence, fixes the sparse warning. Please note that for devices that support individual channel pausing, the DMA controller lock is not held between pausing and unpausing the channel. Hence, this change will make the devices that use the global pause behave in the same way, with regard to locking, as those that don't. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Remove unnecessary return statements and variablesJon Hunter2015-08-201-12/+4
| | | | | | | | | | Some void functions have unnecessary return statements at the end (reported by sparse) and so remove these. Also remove the return variables from functions tegra_dma_prep_slave_sg() and tegra_dma_prep_slave_cyclic() because the value is not used. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Avoid unnecessary channel base address calculationJon Hunter2015-08-201-5/+6
| | | | | | | | | | Everytime a DMA channel register is accessed, the channel base address is calculated by adding the DMA base address and the channel register offset. Avoid this calculation and simply calculate the channel base address once at probe time for each DMA channel. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra-apb: Remove unused variablesJon Hunter2015-08-201-4/+0
| | | | | | | | | | | | | The callback and callback_param members of the tegra_dma_sg_req structure are never used. The dma-engine structure, dma_async_tx_descriptor, defines the same members and these are the ones used by the driver. Therefore, remove the unused versions from the tegra_dma_sg_req structure. The half_done member of tegra_dma_channel structure is configured but never used and so remove it. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra: add slave capabilities reportingPaul Walmsley2015-01-131-0/+15
| | | | | | | | | | | | | | | | | | After commit ecc19d17868be9c9f8f00ed928791533c420f3e0 ("dmaengine: Add a warning for drivers not using the generic slave caps retrieval"), the Tegra APB DMA driver causes this warning during boot: WARNING: CPU: 0 PID: 1 at drivers/dma/dmaengine.c:830 dma_async_device_register+0x294/0x538() this driver doesn't support generic slave capabilities reporting Fix by setting the appropriate reporting structure fields that are passed to dma_async_device_register(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra: fix incompatible pointer type warnsVinod Koul2014-12-221-2/+3
| | | | | | | | | drivers/dma/tegra20-apb-dma.c:1428:37: warning: assignment from incompatible pointer type [enabled by default] drivers/dma/ste_dma40.c: In function 'd40_terminate_all': The function prototype expects return type 'int' whereas these where void Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra20: Split device_controlMaxime Ripard2014-12-221-20/+2
| | | | | | | | | Split the device_control callback of the NVidia Tegra20 APB DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2014-12-121-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "Main features this time are: - BAM v1.3.0 support form qcom bam dma - support for Allwinner sun8i dma - atmels eXtended DMA Controller driver - chancnt cleanup by Maxime - fixes spread over drivers" * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits) dmaenegine: Delete a check before free_percpu() dmaengine: ioatdma: fix dma mapping errors dma: cppi41: add a delay while setting the TD bit dma: cppi41: wait longer for the HW to return the descriptor dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model dmaengine: fsl-edma: fix calculation of remaining bytes drivers/dma/pch_dma: declare pch_dma_id_table as static dmaengine: ste_dma40: fix error return code dma: imx-sdma: clarify about firmware not found error Documentation: devicetree: Fix Xilinx VDMA specification dmaengine: pl330: update author info dmaengine: clarify the issue_pending expectations dmaengine: at_xdmac: Add DMA_PRIVATE ARM: dts: at_xdmac: fix bad value of dma-cells in documentation dmaengine: at_xdmac: fix missing spin_unlock dmaengine: at_xdmac: fix a bug in transfer residue computation dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status() dmaengine: at_xdmac: remove chancnt affectation dmaengine: at_xdmac: prefer usage of readl/writel_relaxed dmaengine: xdmac: fix print warning on dma_addr_t variable ...
| * dmaengine: Remove .owner field for driverKiran Padwal2014-11-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> [for nvidia] Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PMRafael J. Wysocki2014-12-051-1/+1
|/ | | | | | | | | | | | | After commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM in drivers/dma/nbpfaxi.c and drivers/dma/tegra20-apb-dma.c. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: Remove the context argument to the prep_dma_cyclic operationLaurent Pinchart2014-08-041-1/+1
| | | | | | | The argument is always set to NULL and never used. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2014-01-301-7/+55
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dma updates from Vinod Koul: - new driver for BCM2835 used in R-pi - new driver for MOXA ART - dma_get_any_slave_channel API for DT based systems - minor fixes and updates spread acrooss driver [ The fsl-ssi dual fifo mode support addition clashed badly with the other changes to fsl-ssi that came in through the sound merge. I did a very rough cut at fixing up the conflict, but Nicolin Chen (author of both sides) will need to verify and check things ] * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (36 commits) dmaengine: mmp_pdma: fix mismerge dma: pl08x: Export pl08x_filter_id acpi-dma: align documentation with kernel-doc format dma: fix vchan_cookie_complete() debug print DMA: dmatest: extend the "device" module parameter to 32 characters drivers/dma: fix error return code dma: omap: Set debug level to debugging messages dmaengine: fix kernel-doc style typos for few comments dma: tegra: add support for Tegra148/124 dma: dw: use %pad instead of casting dma_addr_t dma: dw: join split up messages dma: dw: fix style of multiline comment dmaengine: k3dma: fix sparse warnings dma: pl330: Use dma_get_slave_channel() in the of xlate callback dma: pl330: Differentiate between submitted and issued descriptors dmaengine: sirf: Add device_slave_caps interface DMA: Freescale: change BWC from 256 bytes to 1024 bytes dmaengine: Add MOXA ART DMA engine driver dmaengine: Add DMA_PRIVATE to BCM2835 driver dma: imx-sdma: Assign a default script number for ROM firmware cases ...
| * dma: tegra: add support for Tegra148/124Laxman Dewangan2014-01-201-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra148 introduces a few changes to the APB DMA HW registers. Update the driver to cope with them. Tegra124 inherits these changes. * The register address stride between DMA channels increases. * A new per-channel WCOUNT register is introduced. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Kunal Agrawal <kunala@nvidia.com> [swarren, remove .dts file change, rewrote commit description, removed some duplicate/unused code and register IO] Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dma: tegra: register as an OF DMA controllerStephen Warren2013-12-121-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Call of_dma_controller_register() so that DMA clients can look up the Tegra DMA controller using standard APIs. This requires the of_xlate() function to save off the DMA slave ID, and for tegra_dma_slave_config() not to over-write this information; once DMA client drivers are converted to dma_request_slave_channel() and DT-based lookups, they won't set this field of struct dma_slave_config anymore. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Thierry Reding <treding@nvidia.com>
* | dma: tegra: use reset frameworkStephen Warren2013-12-121-3/+10
|/ | | | | | | | | | | Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: tegra: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dma: tegra20-apb-dma: Staticize tegra_dma_prep_dma_cyclicSachin Kamat2013-10-071-1/+1
| | | | | | | | | tegra_dma_prep_dma_cyclic is referenced only in this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* tegra20-apb-dma: remove useless use of lockAndy Shevchenko2013-08-051-5/+3
| | | | | | | | | Accordingly to dma_cookie_status() description locking is not required. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-tegra@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dma: tegra: avoid channel lock up after freeDmitry Osipenko2013-07-051-0/+1
| | | | | | | | | | | | | | | Lock scenario: Channel 1 was allocated and prepared as slave_sg, used and freed. Now preparation of cyclic dma on channel 1 will fail with err "DMA configuration conflict" because tdc->isr_handler still setted to handle_once_dma_done. This happens because tegra_dma_abort_all() won't be called on channel freeing if pending list is empty and channel not busy. We need to clear isr_handler on channel freeing to avoid locking. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dma: tegra20-apbdma: err message correctionDmitry Osipenko2013-07-051-1/+1
| | | | | | | | | Fixed err msg params order on irq request fail. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* drivers/dma: don't check resource with devm_ioremap_resourceWolfram Sang2013-05-181-5/+0
| | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com>
* dma: tegra: implement suspend/resume callbacksLaxman Dewangan2013-05-021-0/+65
| | | | | | | | | Implement suspend/resume callbacks to store APB DMA channel's register on suspend and restore APB DMA channel's register on resume. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dma: tegra: assume CONFIG_OFStephen Warren2013-04-151-15/+7
| | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2013-02-261-6/+49
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine updates from Vinod Koul: "This is fairly big pull by my standards as I had missed last merge window. So we have the support for device tree for slave-dmaengine, large updates to dw_dmac driver from Andy for reusing on different architectures. Along with this we have fixes on bunch of the drivers" Fix up trivial conflicts, usually due to #include line movement next to each other. * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (111 commits) Revert "ARM: SPEAr13xx: Pass DW DMAC platform data from DT" ARM: dts: pl330: Add #dma-cells for generic dma binding support DMA: PL330: Register the DMA controller with the generic DMA helpers DMA: PL330: Add xlate function DMA: PL330: Add new pl330 filter for DT case. dma: tegra20-apb-dma: remove unnecessary assignment edma: do not waste memory for dma_mask dma: coh901318: set residue only if dma is in progress dma: coh901318: avoid unbalanced locking dmaengine.h: remove redundant else keyword dma: of-dma: protect list write operation by spin_lock dmaengine: ste_dma40: do not remove descriptors for cyclic transfers dma: of-dma.c: fix memory leakage dw_dmac: apply default dma_mask if needed dmaengine: ioat - fix spare sparse complain dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.c ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDING dw_dmac: add support for Lynxpoint DMA controllers dw_dmac: return proper residue value dw_dmac: fill individual length of descriptor ...
| * dma: tegra20-apb-dma: remove unnecessary assignmentAndy Shevchenko2013-02-141-1/+0
| | | | | | | | | | | | | | | | | | | | There is no need to assign 0 to residue, because dma_cookie_status() does this for us. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dma: tegra: add support for Tegra114 SoCLaxman Dewangan2013-01-081-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | NVIDIA's Tegra114 has APB DMA controller which has 32 dma channels and support support channel wise pause control. Add support for Tegra114 which uses the channel wise pause control hardware feature. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dma: tegra: add support for channel wise pauseLaxman Dewangan2013-01-081-5/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA's some SoCs like Tegra114 support the channel wise pause control inplace of global pause which pauses all DMA channels. When SoCs support the channel wise pause control then it uses the global pause for clock gating for register access as well as all DMA channel pause. Hence DMA registers are not accessible if DMAs are globally paused on these new SoCs. Add support for channel wise pause feature if SoCs support it. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-02-221-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC-specific updates from Arnd Bergmann: "This is a larger set of new functionality for the existing SoC families, including: - vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850 - prima2 gains support for the "marco" SoC family, its SMP based cousin - tegra gains support for the new Tegra4 (Tegra114) family - socfpga now supports a newer version of the hardware including SMP - i.mx31 and bcm2835 are now using DT probing for their clocks - lots of updates for sh-mobile - OMAP updates for clocks, power management and USB - i.mx6q and tegra now support cpuidle - kirkwood now supports PCIe hot plugging - tegra clock support is updated - tegra USB PHY probing gets implemented diffently" * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits) ARM: prima2: remove duplicate v7_invalidate_l1 ARM: shmobile: r8a7779: Correct TMU clock support again ARM: prima2: fix __init section for cpu hotplug ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3) ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3) arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW ARM: tegra: sort Kconfig selects for Tegra114 ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114 ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC ARM: tegra: Fix build error for gic update ARM: tegra: remove empty tegra_smp_init_cpus() ARM: shmobile: Register ARM architected timer ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move ARM: shmobile: r8a7779: Correct TMU clock support ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ...
| * \ Merge tag 'tegra-for-3.9-soc-ccf' of ↵Olof Johansson2013-02-051-1/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc From Stephen Warren: ARM: tegra: Common Clock Framework rework Tegra already supports the common clock framework, but had issues: 1) The clock driver was located in arch/arm/mach-tegra/ rather than drivers/clk/. 2) A single "Tegra clock" type was implemented, rather than separate clock types for PLL, mux, divider, ... type in HW. 3) Clock lookups by device drivers were still driven by device name and connection ID, rather than through device tree. This pull request solves all three issues. This required some DT changes to add clocks properties, and driver changes to request clocks more "correctly". Finally, this rework allows all AUXDATA to be removed from Tegra board files, and various duplicate clock lookup entries to be removed from the driver. This pull request is based on the previous pull request, with tag tegra-for-3.9-cleanup. * tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits) clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s ARM: tegra30: remove auxdata ARM: tegra20: remove auxdata ASoC: tegra: remove auxdata staging: nvec: remove use of clk_get_sys ARM: tegra: paz00: add clock information to DT ARM: tegra: add clock properties to Tegra30 DT ARM: tegra: add clock properties to Tegra20 DT spi: tegra: do not use clock name to get clock ARM: tegra: remove legacy clock code ARM: tegra: migrate to new clock code clk: tegra: add clock support for Tegra30 clk: tegra: add clock support for Tegra20 clk: tegra: add Tegra specific clocks ARM: tegra: define Tegra30 CAR binding ARM: tegra: define Tegra20 CAR binding ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h ARM: tegra: add function to read chipid ARM: tegra: fix compile error when disable CPU_IDLE ... Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-tegra/common.c arch/arm/mach-tegra/platsmp.c drivers/clocksource/Makefile
| | * | ARM: tegra: migrate to new clock codePrashant Gaikwad2013-01-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | | Merge 3.8-rc5 into driver-core-nextGreg Kroah-Hartman2013-01-261-2/+6
|\| | | | | | | | | | | | | | | | | | | | | | | This resolves a gpio driver merge issue pointed out in linux-next. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | | Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2013-01-241-2/+6
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine fixes from Vinod Koul: "A few fixes on slave dmanengine. There are trivial fixes in imx-dma, tegra-dma & ioat driver" * 'fixes' of git://git.infradead.org/users/vkoul/slave-dma: dma: tegra: implement flags parameters for cyclic transfer dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers. ioat: Fix DMA memory sync direction correct flag
| | * | dma: tegra: implement flags parameters for cyclic transferLaxman Dewangan2013-01-091-2/+6
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flag parameter is added in the cyclic transfer request. Use the flag option of: - DMA_PREP_INTERRUPT for enabling interrupt. - DMA_CTRL_ACK for deciding whether ack is requred or not for descriptor. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> CC: <stable@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 21:01:30 +0100