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| | * | dmaengine: altera: remove DMA_SGVinod Koul2017-08-221-94/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c678fa66341c: ("dmaengine: remove DMA_SG as it is dead code in kernel") removes DMA_SG from dmaengine subsystem but missed the newly added driver, so remove it from here as well Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: Add driver for Altera / Intel mSGDMA IP coreStefan Roese2017-07-183-0/+1038
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver adds support for the Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA) intellectual property (IP) to the Linux DMAengine subsystem. Currently it supports the following op modes: - DMA_MEMCPY - DMA_SG - DMA_SLAVE This implementation has been tested on an Altera Cyclone FPGA connected via PCIe, both on an ARM and an x86 platform. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: sun6i: support V3s SoC variantIcenowy Zheng2017-09-051-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirkIcenowy Zheng2017-09-051-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally we enable a special gate bit when the compatible indicates A23/33. But according to BSP sources and user manuals, more SoCs will need this gate bit. So make it a common quirk configured in the config struct. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: xilinx_dma: Fix error code format specifierLars-Peter Clausen2017-09-051-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'err' is a signed int and error codes are typically negative numbers, so use '%d' instead of '%u' to format the error code in the error message. Fixes: ba16db36b5dd ("dmaengine: vdma: Add clock support") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ti-dma-crossbar: Fix dra7 reserve functionAlexander Smirnov2017-08-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMA crossbar uses 'xbar->dma_inuse' variable to manage allocated routes. Each bit represents respective DMA channel. If the channel is free, bit is set to '0', if channel is allocated, bit should be set to '1'. In reserve function, the bits for requested DMA channels are cleared, so they are not really reserved, but freed and become ready for allocation. Signed-off-by: Alexander Smirnov <asmirnov@ilbers.de> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: pl330: constify amba_idArvind Yadav2017-08-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: pl08x: constify amba_idArvind Yadav2017-08-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: rcar-dmac: initialize all data before registering IRQ handlerKuninori Morimoto2017-08-251-42/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Anton Volkov noticed that engine->dev is NULL before of_dma_controller_register() in probe. Thus there might be a NULL pointer dereference in rcar_dmac_chan_start_xfer while accessing chan->chan.device->dev which is equal to (&dmac->engine)->dev. On same reason, same and similar things will happen if we didn't initialize all necessary data before calling register irq function. To be more safety code, this patch initialize all necessary data before calling register irq function. Reported-by: Anton Volkov <avolkov@ispras.ru> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: at_xdmac: Handle return value of clk_prepare_enable.Arvind Yadav2017-08-211-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: at_xdmac: Fix compilation warning.Arvind Yadav2017-08-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace '%d' by '%zu' to fix the compilation warning:- "format ‘%d’ expects argument of type ‘int’,but argument has type ‘size_t’ [-Wformat=]" Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ste_dma40: make stedma40_chan_cfg constBhumika Goyal2017-08-211-2/+2
| |/ | | | | | | | | | | | | | | | | Make these const as they are only used during a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* / dmaengine: tegra210-adma: fix of_irq_get() error checkSergei Shtylyov2017-08-091-2/+2
|/ | | | | | | | | | | | | | | | of_irq_get() may return 0 as well as negative error number on failure, while the driver only checks for the negative values. The driver would then call request_irq(0, ...) in tegra_adma_alloc_chan_resources() and never get valid channel interrupt. Check for 'tdc->irq <= 0' instead and return -ENXIO from the driver's probe iff of_irq_get() returned 0. Fixes: f46b195799b5 ("dmaengine: tegra-adma: Add support for Tegra210 ADMA") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge tag 'dmaengine-4.13-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2017-07-0821-378/+2824
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: - removal of AVR32 support in dw driver as AVR32 is gone - new driver for Broadcom stream buffer accelerator (SBA) RAID driver - add support for Faraday Technology FTDMAC020 in amba-pl08x driver - IOMMU support in pl330 driver - updates to bunch of drivers * tag 'dmaengine-4.13-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (36 commits) dmaengine: qcom_hidma: correct API violation for submit dmaengine: zynqmp_dma: Remove max len check in zynqmp_dma_prep_memcpy dmaengine: tegra-apb: Really fix runtime-pm usage dmaengine: fsl_raid: make of_device_ids const. dmaengine: qcom_hidma: allow ACPI/DT parameters to be overridden dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctly dmaengine: Kconfig: Simplify the help text for MXS_DMA dmaengine: pl330: Delete unused functions dmaengine: Replace WARN_TAINT_ONCE() with pr_warn_once() dmaengine: Kconfig: Extend the dependency for MXS_DMA dmaengine: mxs: Use %zu for printing a size_t variable dmaengine: ste_dma40: Cleanup scatterlist layering violations dmaengine: imx-dma: cleanup scatterlist layering violations dmaengine: use proper name for the R-Car SoC dmaengine: imx-sdma: Fix compilation warning. dmaengine: imx-sdma: Handle return value of clk_prepare_enable dmaengine: pl330: Add IOMMU support to slave tranfers dmaengine: DW DMAC: Handle return value of clk_prepare_enable dmaengine: pl08x: use GENMASK() to create bitmasks dmaengine: pl08x: Add support for Faraday Technology FTDMAC020 ...
| * Merge branch 'topic/rcar' into for-linusVinod Koul2017-07-041-6/+21
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| | * dmaengine: rcar-dmac: wait for ISR to finish before freeing resourcesNiklas Söderlund2017-05-191-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a race condition where the channel resources could be freed before the ISR had finished running resulting in a NULL pointer reference from the ISR. [ 167.148934] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 167.157051] pgd = ffff80003c641000 [ 167.160449] [00000000] *pgd=000000007c507003, *pud=000000007c4ff003, *pmd=0000000000000000 [ 167.168719] Internal error: Oops: 96000046 [#1] PREEMPT SMP [ 167.174289] Modules linked in: [ 167.177348] CPU: 3 PID: 10547 Comm: dma_ioctl Not tainted 4.11.0-rc1-00001-g8d92afddc2f6633a #73 [ 167.186131] Hardware name: Renesas Salvator-X board based on r8a7795 (DT) [ 167.192917] task: ffff80003a411a00 task.stack: ffff80003bcd4000 [ 167.198850] PC is at rcar_dmac_chan_prep_sg+0xe0/0x400 [ 167.203985] LR is at rcar_dmac_chan_prep_sg+0x48/0x400 Based of previous work by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: rcar-dmac: implement device_synchronize()Niklas Söderlund2017-05-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the device_synchronize() callback which wait until a dma channel is stopped to provide a synchronization point. This protects the driver from multiple race conditions when terminating and freeing resources. E.g. the completion callback still running after device_terminate_all() has completed. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: rcar-dmac: store channel IRQ in struct rcar_dmac_chanNiklas Söderlund2017-05-191-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ number is needed after probe to be able to add synchronisation points in other places in the driver when freeing resources and to implement a device_synchronize() callback. Store the IRQ number in the struct rcar_dmac_chan so that it can be used later. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/pl330' into for-linusVinod Koul2017-07-041-76/+66
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| | * | dmaengine: pl330: Delete unused functionsMatthias Kaehlcke2017-06-171-67/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions _queue_empty(), _emit_ADDH(), _emit_NOP(), _emit_STZ() and _emit_WFE() are not used. Delete them. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: pl330: Add IOMMU support to slave tranfersRobin Murphy2017-05-301-9/+66
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Wire up dma_map_resource() for slave transfers, so that we can let the PL330 use IOMMU-backed DMA mapping ops on systems with an appropriate IOMMU and RAM above 4GB, to avoid CPU bounce buffering. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/pl08x' into for-linusVinod Koul2017-07-042-217/+759
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| | * | dmaengine: pl08x: Add support for Faraday Technology FTDMAC020Linus Walleij2017-05-242-157/+616
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After reading the specs for the Faraday Technology FTDMAC020 found in the Gemini platform, it becomes pretty evident that this is just another PL08x derivative, and should be handled like such by simply extending the existing PL08x driver to handle the quirks in this hardware. This patch makes memcpy work and has been tested on the Gemini and also regression-tested on the Nomadik NHK15 using dmatest with 10 threads per channel without a hinch for hours. I have not implemented slave DMA in those codepaths, because this device (Gemini) does not use slave DMA, and it seems like devices using FTDMAC020 for device DMA have a slightly different register layout so some real hardware is needed to proceed with this. I left some FIXME etc in the code for this. I had to do some refactorings of some helper functions, but I have not split those into separate patches because these refactorings do not make much sense without the increased complexity of handling the FTDMAC020. The DMA test would hang the platform on me on the Gemini after a few thousand iterations, however after turning of the caches the problem immediately disappeared and I could run the DMA engine with 10 threads pers physical channel for days in a row without a crash. I think there is no problem with the DMA driver: instead it is something fishy in the FA526 cache handling code that get pretty heavily exercised by the DMA engine and we need to go and fix that instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: pl08x: Make slave engine optionalLinus Walleij2017-05-241-50/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the vendor data does not specify any signals, we do not have to support slave DMA. Make the registration of the slave DMA engine optional, so we can use this for the FTDMAC020 in the Gemini that only has memcpy support. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | ARM/dmaengine: pl08x: pass reasonable memcpy settingsLinus Walleij2017-05-241-38/+93
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cannot use bits from configuration registers as API between platforms and driver like this, abstract it out to two enums and mimic the stuff passed as device tree data. This is done to make it possible for the driver to generate the ccfg word on-the-fly so we can support more PL08x derivatives. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/mxs' into for-linusVinod Koul2017-07-042-4/+3
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| | * | dmaengine: Kconfig: Simplify the help text for MXS_DMAFabio Estevam2017-06-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the help text for the MXS_DMA option is incomplete as it does not mention MX6SX, MX6ULL and MX7D, for example. Instead of extending this list everytime a new SoC comes out, let's keep the text more generic. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: Kconfig: Extend the dependency for MXS_DMAFabio Estevam2017-06-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not possible to select the mxs dma driver when only mx6sx or mx7 are selected. Extend the dependency to allow the mxs dma driver to be built whenever ARCH_MXS or ARCH_MXC is selected. This has the benefit to avoid having to add new entries in the MXS_DMA Kconfig everytime a new i.MX SoC shows up and it also makes it consistent with the other i.MX DMA engines, such as IMX_DMA and IMX_SDMA. While at it, also pass COMPILE_TEST for increasing the build coverage. Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: mxs: Use %zu for printing a size_t variableFabio Estevam2017-06-151-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use %zu for printing a size_t variable in order to fix the following build warning: drivers/dma/mxs-dma.c: In function 'mxs_dma_prep_dma_cyclic': drivers/dma/mxs-dma.c:621:5: warning: format '%d' expects argument of type 'int', but argument 3 has type 'size_t' [-Wformat] Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/mv_xor' into for-linusVinod Koul2017-07-041-56/+91
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| | * | dmaengine: mv_xor_v2: add support for suspend/resumeHanna Hawa2017-05-141-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds the support for suspend/resume in the mv_xor_v2 driver. The suspend suspend function disables the XOR engine after the DMA stack has handled all pending descriptors in the queue. The resume function re-configures the XOR engine and re-enables the engine. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: mv_xor_v2: remove unnecessary write to DESQ_STOP registerHanna Hawa2017-05-141-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary write to DESQ_STOP register, this register is used to enable or disable the XOR engine, and not to issue all pending descriptors in the queue. mv_xor_v2 driver already writes to this register and enable XOR engine in the mv_xor_v2_descq_init() function, called during initialization. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: mv_xor_v2: implement proper interrupt coalescingHanna Hawa2017-05-141-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now, the driver was not using interrupt coalescing: one interrupt was generated for each descriptor processed by the XOR engine. This commit changes that by using the interrupt coalescing features of the hardware, by setting both a number of descriptors processed before an interrupt is generated and a timeout before an interrupt is generated. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | Merge branch 'topic/dw' into for-linusVinod Koul2017-07-044-376/+19
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| | * | | dmaengine: DW DMAC: Handle return value of clk_prepare_enableArvind Yadav2017-05-241-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | Merge branch 'topic/bcm' into for-linusVinod Koul2017-07-043-0/+1801
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| | * | | | dmaengine: bcm-scm-raid: remove redundant null check on reqColin Ian King2017-05-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Req is never null on at the point of the null check, so remove this redundant check and just return &req->tx. Detected by CoverityScan, CID#1436147 ("Logically dead code") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | | dmaengine: bcm-sba-raid: fix Kconfig dependenciesArnd Bergmann2017-05-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new driver requires both mailbox and raid support for compile testing: drivers/dma/built-in.o: In function `sba_remove': edma.c:(.text+0x4414): undefined reference to `mbox_free_channel' drivers/dma/built-in.o: In function `sba_issue_pending': edma.c:(.text+0x46cc): undefined reference to `mbox_send_message' drivers/dma/built-in.o: In function `sba_probe': edma.c:(.text+0x4e60): undefined reference to `mbox_request_channel' edma.c:(.text+0x5038): undefined reference to `mbox_free_channel' drivers/dma/built-in.o: In function `sba_tx_status': edma.c:(.text+0x5210): undefined reference to `mbox_client_peek_data' drivers/dma/built-in.o: In function `sba_prep_dma_pq_req': edma.c:(.text+0x5784): undefined reference to `raid6_gflog' edma.c:(.text+0x5798): undefined reference to `raid6_gflog' This rearranges the Kconfig dependencies accordingly. Fixes: 743e1c8ffe4e ("dmaengine: Add Broadcom SBA RAID driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | | dmaengine: Add Broadcom SBA RAID driverAnup Patel2017-05-163-0/+1800
| | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Broadcom stream buffer accelerator (SBA) provides offloading capabilities for RAID operations. This SBA offload engine is accessible via Broadcom SoC specific ring manager. This patch adds Broadcom SBA RAID driver which provides one DMA device with RAID capabilities using one or more Broadcom SoC specific ring manager channels. The SBA RAID driver in its current shape implements memcpy, xor, and pq operations. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: qcom_hidma: correct API violation for submitSinan Kaya2017-07-032-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code is violating the DMA Engine API by putting the submitted requests directly into the HW queue. This causes queued transactions to be started by another thread as soon as the first one finishes. The DMA Engine document clearly states this. "dmaengine_submit() will not start the DMA operation". Move HW queuing of the requests into the issue_pending() routine to comply with API requirements also create a new queued state for temporarily holding the requests. A descriptor goes through these transitions now. free->prepared->queued->active->completed->free as opposed to free->prepared->active->completed->free Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: zynqmp_dma: Remove max len check in zynqmp_dma_prep_memcpyStefan Roese2017-07-031-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove check for "len > ZYNQMP_DMA_MAX_TRANS_LEN" as its not needed. If the length is larger, the transfer is split up into multiple parts with the max descriptor length already. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kedareswara rao Appana <appanad@xilinx.com> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: tegra-apb: Really fix runtime-pm usageJon Hunter2017-06-301-40/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit edd3bdbe9db1 ("dmaengine: tegra-apb: Correct runtime-pm usage") added pm_runtime_get/put() calls to the tegra-apb DMA system suspend callbacks. Runtime PM is disabled during system suspend and so these APIs cannot be used. Fix the suspend handling for the tegra-apb DMA by moving the save and restore of the DMA register context into the runtime PM suspend and resume callbacks, and then use the pm_runtime_force_suspend/resume() APIs to invoke the runtime PM callbacks during system suspend. Fixes: edd3bdbe9db1 ("dmaengine: tegra-apb: Correct runtime-pm usage") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: fsl_raid: make of_device_ids const.Arvind Yadav2017-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. File size before: text data bss dec hex filename 3981 608 0 4589 11ed drivers/dma/fsl_raid.o File size after constify: text data bss dec hex filename 4381 192 0 4573 11dd drivers/dma/fsl_raid.o Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: qcom_hidma: allow ACPI/DT parameters to be overriddenSinan Kaya2017-06-262-3/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parameters like maximum read/write request size and the maximum number of active transactions are currently configured in DT/ACPI. This patch allows a user to override these to fine tune performance for their application. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: fsldma: set BWC, DAHTS and SAHTS values correctlyThomas Breitung2017-06-222-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared before a new value can be or-ed in. Signed-off-by: Thomas Breitung <thomas.breitung@izt-labs.de> Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: Replace WARN_TAINT_ONCE() with pr_warn_once()Prarit Bhargava2017-06-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The WARN_TAINT_ONCE() prints out a loud stack trace on broken BIOSes. The systems that have this problem are several years out of support and no longer have BIOS updates available. The stack trace isn't necessary and a pr_warn_once() will do. Change WARN_TAINT_ONCE() to pr_warn_once() and taint. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Duyck, Alexander H <alexander.h.duyck@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: ste_dma40: Cleanup scatterlist layering violationsLogan Gunthorpe2017-06-011-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This dma engine driver directly accesses page_link assuming knowledge that should be contained only in scatterlist.h. We replace this access with a call to sg_chain which is equivalent. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Stephen Bates <sbates@raithlin.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Per Förlin <per.forlin@axis.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: imx-dma: cleanup scatterlist layering violationsLogan Gunthorpe2017-06-011-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This dma engine driver directly accesses page_link assuming knowledge that should be contained only in scatterlist.h. We replace these with calls to sg_chain and sg_assign_page. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Stephen Bates <sbates@raithlin.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Per Förlin <per.forlin@axis.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: imx-sdma: Fix compilation warning.Arvind Yadav2017-05-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace '%d' by '%zu' to fix the following compilation warning:- drivers/dma/imx-sdma.c: In function ‘sdma_prep_dma_cyclic’: drivers/dma/imx-sdma.c:1327:5: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t’ [-Wformat=] channel, period_len, 0xffff); ^ drivers/dma/imx-sdma.c:1350:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t’ [-Wformat=] dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n", Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | dmaengine: imx-sdma: Handle return value of clk_prepare_enableArvind Yadav2017-05-301-5/+18
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-15 14:35:41 +0100