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* DMAENGINE: DMA40 fix for allocation of logical channel 0Marcin Mielczarczyk2010-05-181-7/+8
| | | | | | | | | Fix for allocation failure of logical channel when event line happens to be number 0. Signed-off-by: Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: DMA40 support paused channel statusJonas Aaberg2010-05-181-8/+67
| | | | | | | | | Support determining whether a channel is paused or not using the status function. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* dmaengine: mpc512x: Use resource_sizeTobias Klauser2010-05-171-1/+1
| | | | | | | | | Use the resource_size function instead of manually calculating the resource size. This reduces the chance of introducing off-by-one errors. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMA ENGINE: Do not reset 'private' of channelJassi Brar2010-05-171-2/+0
| | | | | | | | | | | | | | | | | | | | The member 'private' of 'struct dma_chan' is meant for passing data between client and the controller driver. The DMA client driver may point it to platform specific stuff after acquiring the channel. So, it is the responsiblity of the same code to reset it, if it must. The DMA engine doesn't set it and hence, shouldn't reset it either. This reseting of private by DMA Engine comes in the way of implementing default channel settings during DMAC probe. That capability is useful for not having the clients to always provide platform specific data, like Rx/Tx FIFO addresses, which usually doesn't change across channel requests. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: Support for ST-Ericssons DMA40 block v3Linus Walleij2010-04-145-0/+3412
| | | | | | | | | | | | | This is a straightforward driver for the ST-Ericsson DMA40 DMA controller found in U8500, implemented akin to the existing COH 901 318 driver. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidh Kasagar <srinidhi.kasagar@stericsson.com> Cc: STEricsson_nomadik_linux@list.st.com Cc: Alessandro Rubini <rubini@unipv.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* async_tx: use of kzalloc/kfree requires the include of slab.hStephen Rothwell2010-03-301-0/+1
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* dmaengine: provide helper for setting txstateDan Williams2010-03-2713-88/+17
| | | | | | Simple conditional struct filler to cut out some duplicated code. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: generic channel status v2Linus Walleij2010-03-2717-160/+170
| | | | | | | | | | | | | | | | | | | | | | | | Convert the device_is_tx_complete() operation on the DMA engine to a generic device_tx_status()operation which can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE, DMA_TX_PAUSED. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: generic slave control v2Linus Walleij2010-03-279-35/+94
| | | | | | | | | | | | | | | | | | | | | | | | | Convert the device_terminate_all() operation on the DMA engine to a generic device_control() operation which can now optionally support also pausing and resuming DMA on a certain channel. Implemented for the COH 901 318 DMAC as an example. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* dma: timb-dma: Update comment and fix compiler warningRichard Röjfors2010-03-271-2/+5
| | | | | | | | An incremental patch which clarifies what the spinlock is used for and fixes a compiler warning. Signed-off-by: Richard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* dma: Add timb-dmaRichard Röjfors2010-03-263-0/+861
| | | | | | | | | | Adds the support for the DMA engine withing the timberdale FPGA. The DMA channels are strict device to host, or host to device and can not be used for generic memcpy. Signed-off-by: Richard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: COH 901 318 fix bytesleftLinus Walleij2010-03-241-8/+88
| | | | | | | | | | This makes the function to get the number of bytes left in the ongoing DMA transaction actually work: the old code did not take neither lli:s nor queued jobs into account. Also fix a missing spinlock while we're at it. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* DMAENGINE: COH 901 318 rename confusing varsLinus Walleij2010-03-241-38/+65
| | | | | | | | | This fixes up the code with a lot of comments that make it readable, rename things with opaque names like "data" into something more appropriate, and remove some very confusing BUG() statements. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2010-03-131-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (56 commits) doc: fix typo in comment explaining rb_tree usage Remove fs/ntfs/ChangeLog doc: fix console doc typo doc: cpuset: Update the cpuset flag file Fix of spelling in arch/sparc/kernel/leon_kernel.c no longer needed Remove drivers/parport/ChangeLog Remove drivers/char/ChangeLog doc: typo - Table 1-2 should refer to "status", not "statm" tree-wide: fix typos "ass?o[sc]iac?te" -> "associate" in comments No need to patch AMD-provided drivers/gpu/drm/radeon/atombios.h devres/irq: Fix devm_irq_match comment Remove reference to kthread_create_on_cpu tree-wide: Assorted spelling fixes tree-wide: fix 'lenght' typo in comments and code drm/kms: fix spelling in error message doc: capitalization and other minor fixes in pnp doc devres: typo fix s/dev/devm/ Remove redundant trailing semicolons from macros fix typo "definetly" -> "definitely" in comment tree-wide: s/widht/width/g typo in comments ... Fix trivial conflict in Documentation/laptops/00-INDEX
| * Merge branch 'for-next' into for-linusJiri Kosina2010-03-081-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: Documentation/filesystems/proc.txt arch/arm/mach-u300/include/mach/debug-macro.S drivers/net/qlge/qlge_ethtool.c drivers/net/qlge/qlge_main.c drivers/net/typhoon.c
| | * tree-wide: Assorted spelling fixesDaniel Mack2010-02-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In particular, several occurances of funny versions of 'success', 'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address', 'beginning', 'desirable', 'separate' and 'necessary' are fixed. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Joe Perches <joe@perches.com> Cc: Junio C Hamano <gitster@pobox.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | Driver core: Constify struct sysfs_ops in struct kobj_typeEmese Revfy2010-03-082-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Constify struct sysfs_ops. This is part of the ops structure constification effort started by Arjan van de Ven et al. Benefits of this constification: * prevents modification of data that is shared (referenced) by many other structure instances at runtime * detects/prevents accidental (but not intentional) modification attempts on archs that enforce read-only kernel data at runtime * potentially better optimized code as the compiler can assume that the const data cannot be changed * the compiler/linker move const data into .rodata and therefore exclude them from false sharing Signed-off-by: Emese Revfy <re.emese@gmail.com> Acked-by: David Teigland <teigland@redhat.com> Acked-by: Matt Domsch <Matt_Domsch@dell.com> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: Hans J. Koch <hjk@linutronix.de> Acked-by: Pekka Enberg <penberg@cs.helsinki.fi> Acked-by: Jens Axboe <jens.axboe@oracle.com> Acked-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds2010-03-082-202/+324
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (26 commits) sh: Convert sh to use read/update_persistent_clock sh: Move PMB debugfs entry initialization to later stage sh: Fix up flush_cache_vmap() on SMP. sh: fix up MMU reset with variable PMB mapping sizes. sh: establish PMB mappings for NUMA nodes. sh: check for existing mappings for bolted PMB entries. sh: fixed virt/phys mapping helpers for PMB. sh: make pmb iomapping configurable. sh: reworked dynamic PMB mapping. sh: Fix up cpumask_of_pcibus() for the NUMA build. serial: sh-sci: Tidy up build warnings. sh: Fix up ctrl_read/write stragglers in migor setup. serial: sh-sci: Add DMA support. dmaengine: shdma: extend .device_terminate_all() to record partial transfer sh: merge sh7722 and sh7724 DMA register definitions sh: activate runtime PM for dmaengine on sh7722 and sh7724 dmaengine: shdma: add runtime PM support. dmaengine: shdma: separate DMA headers. dmaengine: shdma: convert to platform device resources dmaengine: shdma: fix DMA error handling. ...
| * | dmaengine: shdma: extend .device_terminate_all() to record partial transferGuennadi Liakhovetski2010-03-022-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | This patch extends the .device_terminate_all() method of the shdma driver to return number of bytes transfered in the current descriptor. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | dmaengine: shdma: add runtime PM support.Guennadi Liakhovetski2010-03-021-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | Provided platforms implement runtime PM, this disables the controller, when not in use. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski2010-03-022-31/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | dmaengine: shdma: convert to platform device resourcesGuennadi Liakhovetski2010-03-022-130/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | dmaengine: shdma: fix DMA error handling.Guennadi Liakhovetski2010-03-021-36/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Present DMA error ISR in shdma.c is bogus, it locks the system hard in multiple ways. Fix it to abort all queued transactions on all channels on the affected controller and giving submitters a chance to get a DMA_ERROR status for aborted transactions. Afterwards further functionality is again possible without the need to re-load the driver. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | bitops: rename for_each_bit() to for_each_set_bit()Akinobu Mita2010-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename for_each_bit to for_each_set_bit in the kernel source tree. To permit for_each_clear_bit(), should that ever be added. The patch includes a macro to map the old for_each_bit() onto the new for_each_set_bit(). This is a (very) temporary thing to ease the migration. [akpm@linux-foundation.org: add temporary for_each_bit()] Suggested-by: Alexey Dobriyan <adobriyan@gmail.com> Suggested-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Russell King <rmk@arm.linux.org.uk> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Artem Bityutskiy <dedekind@infradead.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge branch 'next' of ↵Linus Torvalds2010-03-0416-770/+1702
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (28 commits) ioat: cleanup ->timer_fn() and ->cleanup_fn() prototypes ioat3: interrupt coalescing ioat: close potential BUG_ON race in the descriptor cleanup path ioat2: kill pending flag ioat3: use ioat2_quiesce() ioat3: cleanup, don't enable DCA completion writes DMAENGINE: COH 901 318 lli sg offset fix DMAENGINE: COH 901 318 configure channel direction DMAENGINE: COH 901 318 remove irq counting DMAENGINE: COH 901 318 descriptor pool refactoring DMAENGINE: COH 901 318 cleanups dma: Add MPC512x DMA driver Debugging options for the DMA engine subsystem iop-adma: redundant/wrong tests in iop_*_count()? dmatest: fix handling of an even number of xor_sources dmatest: correct raid6 PQ test fsldma: Fix cookie issues fsldma: Fix cookie issues dma: cases IPU_PIX_FMT_BGRA32, BGR32 and ABGR32 are the same in ipu_ch_param_set_size() dma: make Open Firmware device id constant ...
| * \ \ Merge branch 'coh' into dmaengineDan Williams2010-03-046-122/+115
| |\ \ \
| | * | | DMAENGINE: COH 901 318 lli sg offset fixLinus Walleij2010-03-021-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the COH 901 318 respect the scatter offset field by using the sg_phys() rather than the sg_dma_address() so we get a pointer to the actual data we want to send rather than the beginning of the buffer. Also initialize the lli:s a bit more thoroughly. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | | DMAENGINE: COH 901 318 configure channel directionLinus Walleij2010-03-021-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the COH 901 318 configure channel direction (to or from device) dynamically, instead of being passed in from the platform data. This was necessary in order to get the MMC/SD-card channel bidirectional (all other channels on the U300 were either RX or TX but this one was both). This also sets memcpy() alignent to even 2^2 (32bit) boundaries, which makes the memcpy() stress tests start working. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | | DMAENGINE: COH 901 318 remove irq countingLinus Walleij2010-03-022-55/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes the pointless irq counting for the COH 901 318, as it turns out the hardware will only ever fire one IRQ for a linked list anyway. In the process also a missing spinlock was introduced. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | | DMAENGINE: COH 901 318 descriptor pool refactoringLinus Walleij2010-03-021-29/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This centralize some spread-out initialization of descriptors into one function and cleans up the error paths. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | | DMAENGINE: COH 901 318 cleanupsLinus Walleij2010-03-021-14/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleans up the some debug code that was not working in the COH 901 318 driver, adds some helpful comments and rearrange the code a bit. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat: cleanup ->timer_fn() and ->cleanup_fn() prototypesDan Williams2010-03-045-67/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the calling convention of ->timer_fn() and ->cleanup_fn() are unified across hardware versions we can drop parameters to ioat_init_channel() and unify ioat_is_dma_complete() implementations. Both ->timer_fn() and ->cleanup_fn() are modified to expect a struct dma_chan pointer. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat3: interrupt coalescingDan Williams2010-03-042-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware automatically disables further interrupts after each event until rearmed. This allows a delay to be injected between the occurence of the interrupt and the running of the cleanup routine. The delay is scaled by the descriptor backlog and then written to the INTRDELAY register which specifies the number of microseconds to hold off interrupt delivery after an interrupt event occurs. According to powertop this reduces the interrupt rate from ~5000 intr/s to ~150 intr/s per without affecting throughput (simple dd to a raid6 array). Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat: close potential BUG_ON race in the descriptor cleanup pathDan Williams2010-03-042-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since ioat_cleanup_preamble() and the update of the last completed descriptor are not synchronized there is a chance that two cleanup threads can see descriptors to clean. If the first cleans up all pending descriptors then the second will trigger the BUG_ON. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat2: kill pending flagDan Williams2010-03-032-24/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pending == 2 case no longer exists in the driver so, we can use ioat2_ring_pending() outside the lock to determine if there might be any descriptors in the ring that the hardware has not seen. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat3: use ioat2_quiesce()Dan Williams2010-03-031-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace open coded ioat2_quiesce() call in ioat3_restart_channel Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | ioat3: cleanup, don't enable DCA completion writesDan Williams2010-03-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already disallow raid operations while DCA is globally enabled, so having it locally enabled is a nop and confusing when reading the code. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | dma: Add MPC512x DMA driverPiotr Ziecik2010-03-023-0/+808
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds initial version of MPC512x DMA driver. Only memory to memory transfers are currenly supported. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: John Rigby <jcrigby@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | Debugging options for the DMA engine subsystemLinus Walleij2010-03-022-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds Kconfig options for DEBUG and VERBOSE_DEBUG to the DMA engine subsystem, I got tired of editing the Makefile manually each time I want to debug things in here, modelled this on the debug switches for other subsystems and works like a charm when working on our DMA engines. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | dmatest: fix handling of an even number of xor_sourcesDan Williams2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like commit ac5d73fc, we need to be careful to use 'src_cnt' as it contains the fixed up number of xor sources (forced odd) to meet dmatest's data verification scheme. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | dmatest: correct raid6 PQ testAnatolij Gustschin2010-03-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of PQ sources specified by module parameter "pq_sources" is always forced odd to fit into dmatest's destination verificaton scheme. But number of PQ sources and coefficients as passed to the driver's prep_dma_pq() is not adjusted accordingly. Fix it now to get correct PQ testing results in the case passed "pq_sources" parameter is even. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: Fix cookie issuesSteven J. Magnani2010-03-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fsl_dma_update_completed_cookie() appears to calculate the last completed cookie incorrectly in the corner case where DMA on cookie 1 is in progress just following a cookie wrap. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Acked-by: Ira W. Snyder <iws@ovro.caltech.edu> [dan.j.williams@intel.com: fix an integer overflow warning with INT_MAX] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: Fix cookie issuesSteven J. Magnani2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fsl_dma_tx_submit() only sets the cookie on the first descriptor of a transaction. It should set the cookie on all. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Acked-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | dma: cases IPU_PIX_FMT_BGRA32, BGR32 and ABGR32 are the same in ↵Roel Kluin2010-02-031-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ipu_ch_param_set_size() In these cases the same statements are executed. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | dma: make Open Firmware device id constantMárton Németh2010-02-032-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The match_table field of the struct of_device_id is constant in <linux/of_platform.h> so it is worth to make the initialization data also constant. The semantic match that finds this kind of pattern is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ disable decl_init,const_decl_init; identifier I1, I2, x; @@ struct I1 { ... const struct I2 *x; ... }; @s@ identifier r.I1, y; identifier r.x, E; @@ struct I1 y = { .x = E, }; @c@ identifier r.I2; identifier s.E; @@ const struct I2 E[] = ... ; @depends on !c@ identifier r.I2; identifier s.E; @@ + const struct I2 E[] = ...; // </smpl> Signed-off-by: Márton Németh <nm127@freemail.hu> Cc: Julia Lawall <julia@diku.dk> Cc: cocci@diku.dk [dan.j.williams@intel.com: resolved conflict with recent fsldma updates] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: major cleanups and fixesIra Snyder2010-02-022-182/+207
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix locking. Use two queues in the driver, one for pending transacions, and one for transactions which are actually running on the hardware. Call dma_run_dependencies() on descriptor cleanup so that the async_tx API works correctly. There are a number of places throughout the code where lists of descriptors are freed in a loop. Create functions to handle this, and use them instead of open-coding the loop each time. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: rename fsl_chan to chanIra Snyder2010-02-021-275/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name fsl_chan seems too long, so it has been shortened to chan. There are only a few places where the higher level "struct dma_chan *chan" name conflicts. These have been changed to "struct dma_chan *dchan" instead. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: simplify IRQ probing and handlingIra Snyder2010-02-021-44/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ probing is needlessly complex. All off the 83xx device trees in arch/powerpc/boot/dts/ specify 5 interrupts per DMA controller: one for the controller, and one for each channel. These interrupts are all attached to the same IRQ line. This causes an interesting situation if two channels interrupt at the same time. The per-controller handler will handle the first channel, and the per-channel handler will handle the remaining channels. Instead of this mess, we fix the bug in the per-controller handler, and make it handle all channels that generated an interrupt. When a per-controller handler is specified in the device tree, we prefer to use the shared handler instead of the per-channel handler. The 85xx/86xx controllers do not have a per-controller interrupt, and instead use a per-channel interrupt. This behavior has not been changed. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: clean up the OF subsystem routinesIra Snyder2010-02-022-129/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes some errors in the cleanup paths of the OF subsystem, including missing checks for ioremap failing. Also, some variables were renamed for brevity. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | | fsldma: rename dest to dst for uniformityIra Snyder2010-02-022-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most functions in the standard library use "dst" as a parameter, rather than "dest". This renames all use of "dest" to "dst" to match the usual convention. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-10 04:18:46 +0100