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path: root/drivers/gpio/gpio-zynq.c (follow)
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* gpio: zynq: Setup chip->base based on alias IDMichal Simek2018-05-231-1/+1
| | | | | | | | | | | | | | | | In past Xilinx gpio-zynq driver was setting up gpio chip->base as 0 which was chagned to autodetection when driver was upstreamed. Older systems, which were using this old version, setup SW stack which expects zynq gpio base as 0 and right now there is no way how to set this up. The patch is adding an option to setup chip->base based on aliases which is something what some other drivers are doing too. It means when gpio0 alias is setup then chip->base is 0. When gpio alias is not setup gpiochip_find_base() set it up properly which is current behavior. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: simplifly getting drvdataShubhrajyoti Datta2018-05-231-4/+2
| | | | | | | | Get the driver data directly by dev_get_drvdata. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Remove call to platform_get_irqShubhrajyoti Datta2018-05-231-4/+2
| | | | | | | | | Remove the call to platform_get_irq use the cached one instead. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Move irqdomain into struct gpio_irq_chipThierry Reding2017-11-081-1/+1
| | | | | | | | | In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix driver function parameters alignmentMichal Simek2017-08-141-8/+9
| | | | | | | Fix function parameters alignment reported by checkpatch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix warnings in the driverNava kishore Manne2017-08-141-6/+6
| | | | | | | | | | | This patch fixes the below warning -->Block comments should align the * on each line. -->suspect code indent for conditional statements. -->Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix empty lines in driverMichal Simek2017-08-141-1/+2
| | | | | | | Remove one additional line and add two new. All are reported by checkpatch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix kernel doc warningsNava kishore Manne2017-08-141-2/+3
| | | | | | | | This patch fixes the kernel doc warnings in the driver. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Provided workaround for GPIOSwapna Manupati2017-08-141-4/+37
| | | | | | | | | | | This patch provides workaround in the gpio driver for Zynq and ZynqMP Platforms by reading pin value of EMIO banks through DATA register as it was unable to read the value of it from DATA_RO register. Signed-off-by: Swapna Manupati <swapnam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Add support for suspend resumeShubhrajyoti Datta2017-08-141-3/+79
| | | | | | | | | Add support for suspend resume. Now that we can lose context across a suspend/ resume cycle. Add support for the context restore. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Clarify quirk and provide helper functionSoren Brinkmann2017-06-161-6/+15
| | | | | | | | | | | The one quirk used in the zynq GPIO driver was called FOO which is not very descriptive. Rename the quirk to IS_ZYNQ as it indicates whether the HW is a zynq or zynqmp device to allow handling of device-specific differences of the HW. Also provide a helper function to test whether the HW is zynq or zynqmp. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: remove unneeded (void *) casts in of_match_tableMasahiro Yamada2017-05-221-3/+2
| | | | | | | | of_device_id::data is an opaque pointer. No explicit cast is needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Added zynq specific check for special pins on bank zeroNava kishore Manne2016-09-231-2/+13
| | | | | | | | | | | This patch adds zynq specific check for bank 0 pins 7 and 8 are special and cannot be used as inputs Signed-off-by: Nava kishore Manne <navam@xilinx.com> Reported-by: Jonas Karlsson <Jonas.d.karlsson@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: initialize clock even without CONFIG_PMHelmut Grohne2016-06-081-0/+7
| | | | | | | | | | | | | | | | When the PM initialization was moved in the commit referenced below, the code enabling the clock was removed from the probe function. On CONFIG_PM=y kernels, this is not a problem as the pm resume hook enables the clock, but when power management is disabled, all those pm_* functions are noops and the clock is never enabled resulting in a dysfunctional gpio controller. Put the clock initialization back to support CONFIG_PM=n. Cc: stable@vger.kernel.org Signed-off-by: Helmut Grohne <h.grohne@intenta.de> Fixes: 3773c195d387 ("gpio: zynq: Do PM initialization earlier to support gpio hogs") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix the error pathShubhrajyoti Datta2016-04-091-1/+3
| | | | | | | | | pm_runtime_disable is called only in remove it is missed out in the error path. Fix the same. Signed-off-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: use gpiochip data pointerLinus Walleij2016-01-051-16/+11
| | | | | | | | | | This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Do PM initialization earlier to support gpio hogsMichal Simek2015-12-141-10/+9
| | | | | | | | | | | | | | | GPIO hogs registration is call at the end of gpiochip_add() function. Calling sequence is: gpiochip_add -> of_gpiochip_add -> of_gpiochip_scan_hogs -> gpiod_hog -> gpiochip_request_own_desc -> __gpiod_request -> chip->request -> zynq_gpio_request which calls pm_runtime_get_sync() which returns -13 because PM is not initialized yet. Initialize PM before gpiochip_add is called to fix this issue. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: change member .dev to .parentLinus Walleij2015-11-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: use container_of() to get state containerLinus Walleij2015-10-021-10/+22
| | | | | | | | | | | | | | | | | | | | | | The state container of the Zynq GPIO driver is sometimes extracted from the gpio_chip exploiting the fact that offsetof() the struct gpio_chip inside the struct zynq_gpio is 0, so the container_of() is in practice a noop. However if a member is added to struct zynq_gpio in front of struct gpio_chip, things will break. Using proper container_of() avoids this problem. Semantically this is a noop, the compiler will optimize it away, but syntactically it makes me happier. Also replace some explicit container_of() calls with the helper function. Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Ezra Savard <ezra.savard@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-1/+1
| | | | | | | | | | | | | | Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* Merge tag 'v4.2-rc4' into develLinus Walleij2015-08-131-0/+1
|\ | | | | | | Linux 4.2-rc4
| * gpio: zynq: Fix problem with unbalanced pm_runtime_enableMichal Simek2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing pm_runtime_disabled to remove(). Error log: root@zynqmp:~# modprobe gpio_zynq root@zynqmp:~# lsmod Not tainted gpio_zynq 7086 0 - Live 0xffffffbffc00a000 root@zynqmp:~# rmmod gpio_zynq root@zynqmp:~# lsmod Not tainted root@zynqmp:~# modprobe gpio_zynq [ 246.924438] zynq-gpio ff0a0000.gpio: Unbalanced pm_runtime_enable! root@zynqmp:~# rmmod gpio_zynq root@zynqmp:~# lsmod Not tainted Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'queue/irq/gpio' of ↵Linus Walleij2015-07-171-3/+3
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into devel
| * | gpio: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu2015-07-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. Preparatory patch for the removal of the 'irq' argument from irq flow handlers. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | gpio/zynq: Use irq_set_chip_handler_name_locked()Thomas Gleixner2015-07-141-2/+2
| |/ | | | | | | | | | | | | Hand in irq_data and avoid the redundant lookup of irq_desc. Originally-from: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* / gpio: zynq: add missing module_exit functionMasahiro Yamada2015-07-161-0/+6
|/ | | | | | | | This driver is tristate, so it should be cleanable. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Added support to Zynq Ultrascale+ MPSoCAnurag Kumar Vulisha2015-06-101-66/+125
| | | | | | | | | Added support to Zynq Ultrascale+ MPSoC on the existing zynq gpio driver. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Drivers: gpio: Fix spelling errorsColin Cronin2015-05-191-1/+1
| | | | | | | | Fixed several spelling errors in gpio-lynxpoint, gpio-pca953x, gpio-tegra, gpio-zynq, gpiolib-of, gpiolib. Signed-off-by: Colin Cronin <colinpatrickcronin@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* PM: Merge the SET*_RUNTIME_PM_OPS() macrosRafael J. Wysocki2014-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | The SET_PM_RUNTIME_PM_OPS() and SET_RUNTIME_PM_OPS() macros are identical except that one of them is not empty for CONFIG_PM set, while the other one is not empty for CONFIG_PM_RUNTIME set, respectively. However, after commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so one of these macros is now redundant. For this reason, replace SET_PM_RUNTIME_PM_OPS() with SET_RUNTIME_PM_OPS() everywhere and redefine the SET_PM_RUNTIME_PM_OPS symbol as SET_RUNTIME_PM_OPS in case new code is starting to use the macro being removed here. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* gpio: remove remaining users of gpiochip_remove() retvalLinus Walleij2014-09-231-7/+1
| | | | | | | | | | | Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* driver:gpio remove all usage of gpio_remove retval in driverabdoulaye berthe2014-09-181-2/+1
| | | | | | | | | | | | | this remove all reference to gpio_remove retval in all driver except pinctrl and gpio. the same thing is done for gpio and pinctrl in two different patches. Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Michael Büsch <m@bues.ch> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fixed broken wakeup implementationEzra Savard2014-09-041-14/+20
| | | | | | | | | | Use of unmask/mask in set_wake was an incorrect implementation. The new implementation correctly sets wakeup for the gpio chip's IRQ so the gpio chip will not sleep while wakeup-enabled gpio are in use. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Mask non-wakeup GPIO interrupts on suspendEzra Savard2014-09-041-1/+3
| | | | | | | | | Added flag to the GPIO chip so that IRQ from non-wakeup GPIO will not wake the system. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Take bank offset into account when reporting a IRQLars-Peter Clausen2014-09-031-1/+9
| | | | | | | | | | When looking up the IRQ the bank offset needs to be taken into account. Otherwise interrupts for banks other than bank 0 get incorrectly reported as interrupts for bank 0. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Reduce level of indention in zynq_gpio_irqhandler()Lars-Peter Clausen2014-08-291-12/+19
| | | | | | | | | zynq_gpio_irqhandler() uses up to 7 tabs of indention in some parts. Refactor things to use a helper function for the inner loop to reduce the indention to a sane level. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Remove .owner field for driverMichal Simek2014-08-291-1/+0
| | | | | | | | | | | | | | There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fix IRQ handlersLars-Peter Clausen2014-08-171-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq GPIO interrupt handling code as two main issues: 1) It does not support IRQF_ONESHOT interrupt since it uses handle_simple_irq() for the interrupt handler. handle_simple_irq() does not do masking and unmasking of the IRQ that is required for this chip to be able to support IRQF_ONESHOT IRQs, causing the CPU to lock up in a interrupt storm if such a interrupt is requested. 2) Interrupts are acked after the primary interrupt handlers for all asserted interrupts in a bank have been called. For edge triggered interrupt this is to late and may cause a interrupt to be missed. For level triggered oneshot interrupts this is to early and causes the interrupt handler to run twice per interrupt. This patch addresses the issue by updating the driver to use the correct IRQ chip handler functions that are appropriate for this kind of IRQ controller. The following diagram gives an overview of how the interrupt detection circuit works, it is not necessarily a accurate depiction of the real hardware though. INT_POL/INT_ON_ANY | | +---+ INT_STATUS `-| | | | E |-. | ,---| | \ |\ +----+ | +---+ | +---+ `----| | ,-------|S | ,*--| | GPIO_IN -* | |- | Q|- | & |-- IRQ_OUT | +---+ ,-----| | ,-|R | ,o| | `---| | / |/ | +----+ | +---+ | = |- | | | ,-| | INT_TYPE ACK INT_MASK | +---+ | INT_POL GPIO_IN is the raw signal level connected to the hardware pin. This signal is routed to a edge detector and to a level detector. The edge detector can be configured to either detect a rising or falling edge or both edges. The level detector can detect either a level high or level low event. Depending on the setting of the INT_TYPE register either the edge or level event will be propagated to the INT_STATUS register. As long as a interrupt condition is detected the INT_STATUS register will be set to 1. It can be cleared to 0 if (and only if) the interrupt condition is no longer detected and software acknowledges the interrupt by writing a 1 to the address of the INT_STATUS register. There is also the INT_MASK register which can be used to disable the propagation of the INT_STATUS signal to the upstream IRQ controller. What is important to note is that the interrupt detection logic itself can not be disabled, only the propagation of the INT_STATUS register can be delayed. This means that for level type interrupts the interrupt must only be acknowledged after the interrupt source has been cleared otherwise it will stay asserted and the interrupt handler will be run a second time. For IRQF_ONESHOT interrupts this means that the IRQ must only be acknowledged after the threaded interrupt has finished running. If a second interrupt comes in between handling the first interrupt and acknowledging it the external interrupt will be asserted, which means trying to acknowledge the first interrupt will not clear the INT_STATUS register and the interrupt handler will be run a second time when the IRQ is unmasked, so no interrupts will be lost. The handle_fasteoi_irq() handler in combination with the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED flags will have the desired behavior. For edge triggered interrupts a slightly different strategy is necessary. For edge triggered interrupts the interrupt condition is only true when the edge itself is detected, this means this is the only time the INT_STATUS register is set, acknowledging the interrupt any time after that will clear the INT_STATUS register until the next interrupt happens. This means in order to not loose any interrupts the interrupt needs to be acknowledged before running the interrupt handler. If a second interrupt occurs after the first interrupt handler has finished but before the interrupt is unmasked the INT_STATUS register will be re-asserted and the interrupt handler runs a second time once the interrupt is unmasked. This means with this flow handling strategy no interrupts are lost for edge triggered interrupts. The handle_level_irq() handler will have the desired behavior. (Note: The handle_edge_irq() only needs to be used for edge triggered interrupts where the controller stops detecting the interrupt event when the interrupt is masked, for this controller the detection logic still works, while only the propagation is delayed when the interrupt is masked.) Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Clear pending interrupt when enabling a IRQLars-Peter Clausen2014-07-231-0/+43
| | | | | | | | | | | | | | | | | | | | The Zynq GPIO controller does not disable the interrupt detection when the interrupt is masked and only disables the propagation of the interrupt. This means when the controller detects an interrupt condition while the interrupt is logically disabled (and masked) it will propagate the recorded interrupt event once the interrupt is enabled. This will cause the interrupt consumer to see spurious interrupts to prevent this first make sure that the interrupt is not asserted and then enable it. E.g. when a interrupt is requested with request_irq() it will be configured according to the requested type (edge/level triggered, etc.) after that it will be enabled. But the detection circuit might have already registered a false interrupt before the interrupt type was correctly configured and once the interrupt is unmasked this false interrupt will be propagated and the interrupt handler for the just request interrupt will called. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add driver for Zynq GPIO controllerHarini Katakam2014-07-101-0/+649
Add support for GPIO controller used by Xilinx Zynq. v3 changes: - Use linux/gpio/driver.h instead of linux/gpio.h - Make irq a local variable in probe v2 changes: - convert to pm_runtime_force_(suspend|resume) - add pm_runtime_set_active in probe() - also (un)prepare clocks when they are dis-/enabled - add some missing calls to pm_runtime_get() - use pm_runtime_put() instead of sync variant - remove gpio chip in driver remove() - remove redundant type casts - directly use IO helpers - use BIT macro to set/clear bits - migrate to GPIOLIB_IRQCHIP Signed-off-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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