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* Merge tag 'gpio-updates-for-v5.12' of ↵Linus Torvalds2021-02-2220-640/+1015
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "It's been a relatively calm release cycle and we're actually removing more code than we're adding. Summary: - new driver for the Toshiba Visconti platform - rework of interrupt handling in gpio-tegra - updates for GPIO selftests: we're now using the character device to perform the subsystem checks - support for a new rcar variant + some code refactoring - refactoring of gpio-ep93xx - SPDX License identifier has been updated in the uapi header so that userspace programs bundling it can become fully REUSE-compliant - improvements to pwm handling in gpio-mvebu - support for interrupt handling and power management for gpio-xilinx as well as some code refactoring - support for a new chip variant in gpio-pca953x - removal of drivers: zte xs & intel-mid and removal of leftovers from intel-msic - impovements to intel drivers pulled from Andy Shevchenko - improvements to the gpio-aggregator virtual GPIO driver - and several minor tweaks and fixes to code and documentation all over the place" * tag 'gpio-updates-for-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (71 commits) gpio: pcf857x: Fix missing first interrupt gpio: ep93xx: refactor base IRQ number gpio: ep93xx: refactor ep93xx_gpio_add_bank gpio: ep93xx: Fix typo s/hierarchial/hierarchical gpio: ep93xx: drop to_irq binding gpio: ep93xx: Fix wrong irq numbers in port F gpio: uapi: use the preferred SPDX license identifier gpio: gpio-xilinx: Add check if width exceeds 32 gpio: gpio-xilinx: Add support for suspend and resume gpio: gpio-xilinx: Add interrupt support gpio: gpio-xilinx: Reduce spinlock array to array gpio: gpio-xilinx: Simplify with dev_err_probe() gpio: msic: Drop driver from Makefile gpio: wcove: Split out to_ireg() helper and deduplicate the code gpio: wcove: Switch to use regmap_set_bits(), regmap_clear_bits() gpio: wcove: Get rid of error prone casting in IRQ handler gpio: intel-mid: Remove driver for deprecated platform gpio: msic: Remove driver for deprecated platform gpio: aggregator: Remove trailing comma in terminator entries gpio: aggregator: Use compound literal from the header ...
| * gpio: pcf857x: Fix missing first interruptMaxim Kiselev2021-02-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If no n_latch value will be provided at driver probe then all pins will be used as an input: gpio->out = ~n_latch; In that case initial state for all pins is "one": gpio->status = gpio->out; So if pcf857x IRQ happens with change pin value from "zero" to "one" then we miss it, because of "one" from IRQ and "one" from initial state leaves corresponding pin unchanged: change = (gpio->status ^ status) & gpio->irq_enabled; The right solution will be to read actual state at driver probe. Cc: stable@vger.kernel.org Fixes: 6e20a0a429bd ("gpio: pcf857x: enable gpio_to_irq() support") Signed-off-by: Maxim Kiselev <bigunclemax@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: ep93xx: refactor base IRQ numberNikita Shubin2021-02-151-5/+7
| | | | | | | | | | | | | | | | | | | | | | - use predefined constants instead of plain numbers - use provided bank IRQ number instead of defined constant for port F Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: ep93xx: refactor ep93xx_gpio_add_bankNikita Shubin2021-02-151-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | - replace plain numbers with girq->num_parents in devm_kcalloc - replace plain numbers with girq->num_parents for port F - refactor i - 1 to i + 1 to make loop more readable - combine getting IRQ's loop and setting handler's into single loop Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: ep93xx: Fix typo s/hierarchial/hierarchicalNikita Shubin2021-02-151-1/+1
| | | | | | | | | | | | | | | | | | Fix typo in comment. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: ep93xx: drop to_irq bindingNikita Shubin2021-02-151-6/+0
| | | | | | | | | | | | | | | | | | | | As ->to_irq is redefined in gpiochip_add_irqchip, having it defined in driver is useless, so let's drop it. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: ep93xx: Fix wrong irq numbers in port FNikita Shubin2021-02-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port F IRQ's should be statically mapped to EP93XX_GPIO_F_IRQ_BASE. So we need to specify girq->first otherwise: "If device tree is used, then first_irq will be 0 and IRQ's get mapped dynamically on the fly" And that's not the thing we want. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: gpio-xilinx: Add check if width exceeds 32Srinivas Neeli2021-02-151-0/+5
| | | | | | | | | | | | | | | | | | | | Add check to see if gpio-width property does not exceed 32. If it exceeds then return -EINVAL. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: gpio-xilinx: Add support for suspend and resumeSrinivas Neeli2021-02-151-3/+89
| | | | | | | | | | | | | | | | | | Add support for suspend and resume, pm runtime suspend and resume. Added free and request calls. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: gpio-xilinx: Add interrupt supportSrinivas Neeli2021-02-152-4/+244
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds interrupt support to the Xilinx GPIO driver so that rising and falling edge line events can be supported. Since interrupt support is an optional feature in the Xilinx IP, the driver continues to support devices which have no interrupt provided. Depends on OF_GPIO framework for of_xlate function to translate gpiospec to the GPIO number and flags. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: gpio-xilinx: Reduce spinlock array to arraySrinivas Neeli2021-02-151-13/+12
| | | | | | | | | | | | | | | | | | Changed spinlock array to single. It is preparation for irq support which is shared between two channels that's why spinlock should be only one. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: gpio-xilinx: Simplify with dev_err_probe()Srinivas Neeli2021-02-151-5/+2
| | | | | | | | | | | | | | | | | | Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: msic: Drop driver from MakefileAndy Shevchenko2021-02-151-1/+0
| | | | | | | | | | | | | | Driver is gone, no need to keep a Makefile entry for it. Remove. Reported-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * gpio: wcove: Split out to_ireg() helper and deduplicate the codeAndy Shevchenko2021-02-151-20/+24
| | | | | | | | | | | | | | | | | | | | There are a few places in the code where IRQ status and mask register values are being updated. Use a new exctracted helper to deduplicate the code. While at it, get rid of unnecessary divisions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * gpio: wcove: Switch to use regmap_set_bits(), regmap_clear_bits()Andy Shevchenko2021-02-151-10/+7
| | | | | | | | | | | | | | the regmap_set_bits(), regmap_clear_bits() API makes code better to understand. Switch the driver to use them, Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * gpio: wcove: Get rid of error prone casting in IRQ handlerAndy Shevchenko2021-02-151-3/+3
| | | | | | | | | | | | | | The casting from int to long on 64-bit platform is error prone. Replace it with proper type of the variable on stack. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * gpio: intel-mid: Remove driver for deprecated platformAndy Shevchenko2021-02-154-423/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Moorestown and Medfield are quite old Intel Atom based 32-bit platforms, which were in limited use in some Android phones, tablets and consumer electronics more than eight years ago. There are no bugs or problems ever reported outside from Intel for breaking any of that platforms for years. It seems no real users exists who run more or less fresh kernel on it. The commit 05f4434bc130 ("ASoC: Intel: remove mfld_machine") also in align with this theory. Due to above and to reduce a burden of supporting outdated drivers we remove the support of outdated platforms completely. Moreover this code duplicates gpio-pxa since the IP has been derived from XScale implementation. If anybody wants to resurrect this it has to be part of gpio-pxa.c. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: msic: Remove driver for deprecated platformAndy Shevchenko2021-02-152-321/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Moorestown and Medfield are quite old Intel Atom based 32-bit platforms, which were in limited use in some Android phones, tablets and consumer electronics more than eight years ago. There are no bugs or problems ever reported outside from Intel for breaking any of that platforms for years. It seems no real users exists who run more or less fresh kernel on it. The commit 05f4434bc130 ("ASoC: Intel: remove mfld_machine") also in align with this theory. Due to above and to reduce a burden of supporting outdated drivers we remove the support of outdated platforms completely. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: aggregator: Remove trailing comma in terminator entriesAndy Shevchenko2021-02-151-2/+2
| | | | | | | | | | | | | | | | | | | | Remove trailing comma in terminator entries to avoid potential expanding an array behind it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * gpio: aggregator: Use compound literal from the headerAndy Shevchenko2021-02-151-2/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of doing it in place, convert GPIO_LOOKUP_IDX() and GPIO_HOG() to be compund literals that's allow to use them as rvalue in assignments. Due to above conversion, use compound literal from the header in the gpio-aggregator.c. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * gpio: aggregator: Replace isrange() by using get_options()Andy Shevchenko2021-02-151-30/+3
| | | | | | | | | | | | | | | | | | | | We already have a nice helper called get_options() which can be used to validate the input format. Replace isrange() by using it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * gpio: merrifield: Make bias configuration available for GPIOsAndy Shevchenko2021-02-151-0/+5
| | | | | | | | | | | | | | If we get bias set request, for example, from GpioIo() resource, we silently ignore it. Make bias configuration available for GPIOs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * gpio: mvebu: add pwm support for Armada 8K/7KBaruch Siach2021-02-151-33/+68
| | | | | | | | | | | | | | | | | | | | | | Use the marvell,pwm-offset DT property to store the location of PWM signal duration registers. Since we have more than two GPIO chips per system, we can't use the alias id to differentiate between them. Use the offset value for that. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Fix irq_set_affinityDmitry Osipenko2021-02-151-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq_set_affinity callback should not be set if parent IRQ domain doesn't present because gpio-tegra driver callback fails in this case, causing a noisy error messages on system suspend: Disabling non-boot CPUs ... IRQ 26: no longer affine to CPU1 IRQ128: set affinity failed(-22). IRQ130: set affinity failed(-22). IRQ131: set affinity failed(-22). IRQ 27: no longer affine to CPU2 IRQ128: set affinity failed(-22). IRQ130: set affinity failed(-22). IRQ131: set affinity failed(-22). IRQ 28: no longer affine to CPU3 IRQ128: set affinity failed(-22). IRQ130: set affinity failed(-22). IRQ131: set affinity failed(-22). Entering suspend state LP1 Hence just don't specify the irq_set_affinity callback if parent PMC IRQ domain is missing. Tegra isn't capable of setting affinity per GPIO, affinity could be set only per GPIO bank, thus there is nothing to do for gpio-tegra in regards to CPU affinity without the parent IRQ domain. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30 Fixes: efcdca286eef ("gpio: tegra: Convert to gpio_irq_chip") Reported-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Support building driver as a loadable moduleDmitry Osipenko2021-02-152-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support building driver as a loadable kernel module. This allows to reduce size of a kernel zImage, which is important for some devices since size of kernel partition may be limited and since some bootloader variants have known problems in regards to the initrd placement if kernel image is too big. $ lsmod Module Size Used by gpio_tegra 16384 27 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Clean up whitespaces in tegra_gpio_driverDmitry Osipenko2021-02-151-4/+4
| | | | | | | | | | | | | | | | | | Clean up inconsistent whitespaces and tabs in the definition of tegra_gpio_driver to make code look better a tad. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Use debugfs_create_devm_seqfile()Dmitry Osipenko2021-02-151-5/+3
| | | | | | | | | | | | | | | | | | Use resource-managed variant of debugfs_create_file(0444) to prepare code for the modularization of the driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Improve formatting of the codeDmitry Osipenko2021-02-151-5/+10
| | | | | | | | | | | | | | | | | | Don't cross 80 chars of line length in order to keep formatting of the code consistent. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: mvebu: improve handling of pwm zero on/off valuesBaruch Siach2021-02-151-16/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware appears to treat zero value as 2^32. Take advantage of this fact to support on/off values of up to UINT_MAX+1 == 2^32. Adjust both .apply and .get_state to handle zero as a special case. Rounded up division result in .get_state can't be zero, since the dividend is now larger than 0. Remove check for this case. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Analyzed-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: mvebu: don't limit pwm period/duty_cycle to UINT_MAXBaruch Siach2021-02-151-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | PWM on/off registers are limited to UINT_MAX. However the state period and duty_cycle fields are ns values of type u64. There is no reason to limit them to UINT_MAX. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: mvebu: make pwm .get_state closer to idempotentBaruch Siach2021-02-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | Round up the divisions in .get_state() to make applying the read out configuration idempotent in most cases as .apply rounds down. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: mvebu: improve pwm period calculation accuracyBaruch Siach2021-02-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 'off' register value calculation from $off = (period - duty_cycle) * clkrate / NSEC_PER_SEC to $off = (period * clkrate / NSEC_PER_SEC) - $on That is, divide the full period value to reduce rounding error. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: mockup: tweak the Kconfig help textBartosz Golaszewski2021-02-151-2/+1
| | | | | | | | | | | | | | | | gpio-mockup doesn't require SYSFS to be selected so drop that bit from the Kconfig text. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: wcove: convert comma to semicolonZheng Yongjun2021-02-151-1/+1
| | | | | | | | | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: vx855: convert comma to semicolonZheng Yongjun2021-02-151-1/+1
| | | | | | | | | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra186: convert comma to semicolonZheng Yongjun2021-02-151-1/+1
| | | | | | | | | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: max77620: convert comma to semicolonZheng Yongjun2021-02-151-1/+1
| | | | | | | | | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: remove zte zx driverArnd Bergmann2021-02-153-297/+0
| | | | | | | | | | | | | | | | | | | | | | The zte zx platform is getting removed, so this driver is no longer needed. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: tegra: Fix wake interruptDmitry Osipenko2021-02-151-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO bank wake interrupt setting was erroneously removed after conversion to gpio_irq_chip, thus the wake interrupt programming is broken now. Secondly, the wake_enb of the GPIO driver should be changed only after the successful toggling of the IRQ wake-state. Restore the wake interrupt setting and the programming order. Fixes: efcdca286eef ("gpio: tegra: Convert to gpio_irq_chip") Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: pca953x: Add support for pca9506Uwe Kleine-König2021-02-151-0/+2
| | | | | | | | | | | | | | | | | | | | According to the reference manual "The PCA9505 is identical to the PCA9506 except that it includes 100 kΩ internal pull-up resistors on all the I/Os." So the pca9506 device can be considered identical to the pca9505 for the gpio driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: rcar: Add R-Car V3U (R8A779A0) supportGeert Uytterhoeven2021-02-151-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the GPIO controller block in the R-Car V3U (R8A779A0) SoC, which is very similar to the block found on other R-Car Gen3 SoCs. However, this block has a new General Input Enable Register (INEN), whose reset state is to have all inputs disabled. Enable input for all available pins in probe and resume, to support the use of the General Input Register (INDT) for reading pin state at all times. This preserves backwards compatibility with other R-Car Gen3 SoCs, as recommended by the Hardware Manual. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: rcar: Optimize GPIO pin state read on R-Car Gen3Geert Uytterhoeven2021-02-151-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the R-Car GPIO driver treats R-Car Gen2 and R-Car Gen3 GPIO controllers the same. However, there exist small differences, like the behavior of the General Input Register (INDT): - On R-Car Gen1, R-Car Gen2, and RZ/G1, INDT only reflects the state of an input pin if the GPIO is configured for input, - On R-Car Gen3 and RZ/G2, INDT always reflects the state of the input pins. Hence to accommodate all variants, the driver does not use the INDT register to read the status of a GPIO line when configured for output, at the expense of doing 2 or 3 register reads instead of 1. Given register accesses are slow, change the .get() and .get_multiple() callbacks to always use INDT to read pin state on SoCs where this is supported. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: bd7xxxx: use helper variable for pdev->devBartosz Golaszewski2021-02-152-17/+15
| | | | | | | | | | | | | | | | Using a helper local variable to store the address of &pdev->dev adds to readability and allows us to avoid unnecessary line breaks. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
| * gpio: tegra: Convert to gpio_irq_chipThierry Reding2021-02-151-72/+146
| | | | | | | | | | | | | | | | | | | | Convert the Tegra GPIO driver to use the gpio_irq_chip infrastructure. This allows a bit of boiler plate to be removed and while at it enables support for hierarchical domains, which is useful to support PMC wake events on Tegra210 and earlier. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: visconti: Add Toshiba Visconti GPIO supportNobuhiro Iwamatsu2021-02-153-0/+229
| | | | | | | | | | | | | | | | | | Add the GPIO driver for Toshiba Visconti ARM SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: bd7xxxx: Do not depend on parent driver dataMatti Vaittinen2021-02-152-41/+33
| | | | | | | | | | | | | | | | | | The ROHM BD70528 and BD71828 GPIO drivers only need the regmap pointer from parent. Regmap can be obtained via dev_get_regmap() so do not require parent to populate driver data for that. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: Kconfig: Update help description for GPIO_RCAR configLad Prabhakar2021-02-151-2/+2
| | | | | | | | | | | | | | | | | | The gpio-rcar driver also supports RZ/G SoC's, update the description to reflect this. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: sl28cpld: convert comma to semicolonZheng Yongjun2021-02-151-2/+2
| | | | | | | | | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: rcar: Remove redundant compatible valuesLad Prabhakar2021-02-151-27/+0
| | | | | | | | | | | | | | | | | | | | The mandatory compatible values 'renesas,rcar-gen{1,2,3}-gpio' have been already added to all the respective R-Car Gen{1,2,3} SoC DTSI files, remove the redundant device specific values from the driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
| * gpio: fix spelling mistake in Kconfig "supprot" -> "support"Colin Ian King2021-02-151-1/+1
| | | | | | | | | | | | | | There is a spelling mistake in the Kconfig help text. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-02 22:55:51 +0100