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* Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-01-31116-5946/+4706
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next This is the main feature pull for radeon and amdgpu for 4.11. Highlights: - Power and clockgating improvements - Preliminary SR-IOV support - ttm buffer priority support - ttm eviction fixes - Removal of the ttm lru callbacks - Remove SI DPM quirks due to MC firmware issues - Handle VFCT with multiple vbioses - Powerplay improvements - Lots of driver cleanups * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (120 commits) drm/amdgpu: fix amdgpu_bo_va_mapping flags drm/amdgpu: access stolen VRAM directly on CZ (v2) drm/amdgpu: access stolen VRAM directly on KV/KB (v2) drm/amdgpu: fix kernel panic when dpm disabled on Kv. drm/amdgpu: fix dpm bug on Kv. drm/amd/powerplay: fix regresstion issue can't set manual dpm mode. drm/amdgpu: handle vfct with multiple vbios images drm/radeon: handle vfct with multiple vbios images drm/amdgpu: move misc si headers into amdgpu drm/amdgpu: remove unused header si_reg.h drm/radeon: drop pitcairn dpm quirks drm/amdgpu: drop pitcairn dpm quirks drm: radeon: radeon_ttm: Handle return NULL error from ioremap_nocache drm/amd/amdgpu/amdgpu_ttm: Handle return NULL error from ioremap_nocache drm/amdgpu: add new virtual display ID drm/amd/amdgpu: remove the uncessary parameter for ib scheduler drm/amdgpu: Bring bo creation in line with radeon driver (v2) drm/amd/powerplay: fix misspelling in header guard drm/ttm: revert "add optional LRU removal callback v2" drm/ttm: revert "implement LRU add callbacks v2" ...
| * drm/amdgpu: fix amdgpu_bo_va_mapping flagsChristian König2017-01-273-3/+3
| | | | | | | | | | | | | | | | | | They are 64bit not 32 for a while now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: access stolen VRAM directly on CZ (v2)Christian König2017-01-271-1/+8
| | | | | | | | | | | | | | | | | | | | | | We don't need to use the PCI BAR on APUs. This allows us to access the full VRAM directly without being limited by the BAR size. v2: squash in 64bit shift fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: access stolen VRAM directly on KV/KB (v2)Christian König2017-01-271-1/+8
| | | | | | | | | | | | | | | | | | | | | | We don't need to use the PCI BAR on APUs. This allows us to access the full VRAM directly without being limited by the BAR size. v2: squash in 64bit shift fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix kernel panic when dpm disabled on Kv.Rex Zhu2017-01-271-0/+3
| | | | | | | | | | | | | | | | Return early if it's disabled. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix dpm bug on Kv.Rex Zhu2017-01-271-3/+41
| | | | | | | | | | | | | | | | | | | | 1. current_ps/request_ps not update. 2. compare crrent_ps and request_ps, if same, don't re-set power state. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: fix regresstion issue can't set manual dpm mode.Rex Zhu2017-01-271-0/+3
| | | | | | | | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: handle vfct with multiple vbios imagesAlex Deucher2017-01-271-32/+34
| | | | | | | | | | | | | | | | | | The vfct table can contain multiple vbios images if the platform contains multiple GPUs. Noticed by netkas on phoronix forums. This patch fixes those platforms. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: move misc si headers into amdgpuAlex Deucher2017-01-278-6/+6
| | | | | | | | | | | | | | | | Move these to the amdgpu directory to match what we do for other asics. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove unused header si_reg.hAlex Deucher2017-01-271-105/+0
| | | | | | | | | | | | | | All of these are available elsewhere. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: drop pitcairn dpm quirksAlex Deucher2017-01-271-46/+1
| | | | | | | | | | | | | | No longer necessary with the new 58 mc ucode. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu/amdgpu_ttm: Handle return NULL error from ioremap_nocacheArvind Yadav2017-01-271-0/+2
| | | | | | | | | | | | | | | | | | | | Here, If ioremap_nocache will fail. It will return NULL. Kernel can run into a NULL-pointer dereference. This error check will avoid NULL pointer dereference. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add new virtual display IDYintian Tao2017-01-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | In the case of pass-through, amdgpu.ko may be included into a image with the hard code ID therefore loading driver with specified virtual display ID will lose efficacy when the BDF of GPU modifies.So add the new ID string "all" for it as same as vf case what does. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Yintian Tao <yttao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: remove the uncessary parameter for ib schedulerJunwei Zhang2017-01-2713-18/+17
| | | | | | | | | | | | Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Bring bo creation in line with radeon driver (v2)Nils Holland2017-01-271-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the bo creation changes that have been done to the radeon driver in recent times, e.g. disable GTT WC on 32 bit because it is broken there, and also disable it generally (and print a warning message) when CONFIG_X86_PAT is not set. v2: agd: fix warning in defined(CONFIG_X86) && !defined(CONFIG_X86_PAT) case Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Holland <nholland@tisys.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: fix misspelling in header guardNicolas Iooss2017-01-271-1/+1
| | | | | | | | | | | | | | | | | | In smu7_clockpowergating.h, the #ifndef statement which prevents multiple inclusions of the header file uses _SMU7_CLOCK_POWER_GATING_H_ but the following #define statement uses _SMU7_CLOCK__POWER_GATING_H_. Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: revert "implement LRU add callbacks v2"Christian König2017-01-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | The additional housekeeping had too much CPU overhead, let's use the BO priorities instead. agd: also revert hibmc changes Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: double the priority of kernel allocationsChristian König2017-01-271-0/+2
| | | | | | | | | | | | | | | | | | Give kernel allocations a higher priority cause it is often more work to swap them back in. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: user BO priority instead of self coding it (v2)Christian König2017-01-273-79/+5
| | | | | | | | | | | | | | | | | | | | | | | | Keeping groups of BOs on the LRU is to time consuming on command submission. Instead use the newly added BO priority to give a certain eviction order. v2: agd: trivial warning fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: add BO priorities for the LRUsChristian König2017-01-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | This way the driver can specify a priority for a BO which has the effect that a BO is only evicted when all other BOs with a lower priority are evicted first. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger.He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/vi: fix mailbox irq mistakeXiangliang Yu2017-01-271-3/+3
| | | | | | | | | | | | | | | | | | | | For virt, freed mailbox irq should be handled in hw fini, not hw init. Correct it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix reboot failure issue for virtualizationXiangliang Yu2017-01-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | Reboot process will call HW fini functions of IP blocks. For virt, need to send event three before hw fini and send event four after hw fini. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Add PCI info to gca_config debugfsTom St Denis2017-01-271-1/+7
| | | | | | | | | | | | | | | | | | So we can determine which device the entry is before connecting a display. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:insert switch buffer only for VM submitMonk Liu2017-01-271-1/+1
| | | | | | | | | | | | | | | | | | for non-VM submit which is from kernel side, no need to switch buffer at all. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:Preamble is forbid to be ignored in SRIOVMonk Liu2017-01-271-1/+2
| | | | | | | | | | | | | | | | SR-IOV requires the preamble. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:set cond_exec polling value to 1 in ring_initMonk Liu2017-01-272-4/+3
| | | | | | | | | | | | | | | | | | no need to set it per ib_schedule(), hw won't override this polling address. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)Monk Liu2017-01-271-1/+9
| | | | | | | | | | | | | | | | | | | | | | to support SRIOV preemption. v2: fix emit_frame_size Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrlMonk Liu2017-01-272-0/+4
| | | | | | | | | | | | | | | | To determine whether the context uses GPUVM or not. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:implement CE/DE meta-init routinesMonk Liu2017-01-271-0/+61
| | | | | | | | | | | | | | | | | | those package need to insert into ring buffer for SRIOV case. they are used to let CP do preemption. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:implement ring_write_multipleMonk Liu2017-01-271-0/+31
| | | | | | | | | | | | | | | | Write multiple dwords to the ring. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:add META_DATA struct for CSA/SRIOV v2Monk Liu2017-01-273-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | META-DATA is used in GFX cmd submit, we have two format suit for META-DATA-init, one is legacy and another is for chained-ib preempt, which is used in vulkan UMD. v2: drop use CP version number to judge if chain-ib supports or not, we wait for it mature Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: refine ci uvd dpm code.Rex Zhu2017-01-271-1/+10
| | | | | | | | | | | | | | | | | | Fix up the powergating logic. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Ack-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: simplify allocation of scratch regsNils Wallménius2017-01-275-34/+11
| | | | | | | | | | | | | | | | | | | | | | The scratch regs are sequential so there's no need to keep them in an array, we can just return the index of the first free register + the base register. Also change the array of bools for keeping track of the free regs to a bitfield. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Refactor flip into prepare submit and submit. (v3)Andrey Grodzovsky2017-01-272-28/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make pflip atomic friendly. Split the fuinction into whatever can fail part and the actual flip submit part. Call the pre-submit function before atomic states are swapped so in case of error we can fail the IOCTL. v2: Update due to target_vblank code change. Fix identetation. Change return type for amdgpu_crtc_submit_flip to void v3: agd: fix formatting Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Switch error code when bo pin fails. (v3)Andrey Grodzovsky2017-01-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switching to -ENOMEM resolves a hang in case the driver uses this function in atomic code path. v2: Update commit message. v3: Remove forcing -EINVAL in case of amdgpu_bo_pin fail since there is no apparent reason for not just passing through the the return value. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gfx8: fix bugon.cocci warningsJulia Lawall2017-01-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Use BUG_ON instead of a if condition followed by BUG. Generated by: scripts/coccinelle/misc/bugon.cocci Reviewed-by: Christian König <christian.koenig@amd.com> Reviewd-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> CC: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: use the num_rings variable for checking vce ringsAlex Deucher2017-01-271-2/+2
| | | | | | | | | | | | | | | | Difference families may have different numbers of rings. Use the variable rather than a hardcoded number. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: fix locking in bo creation error pathNicolai Hähnle2017-01-271-1/+2
| | | | | | | | | | | | | | | | | | | | Unlock the resv lock only if we were the ones to lock it in the first place. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: lock reservation object while creating shadow boNicolai Hähnle2017-01-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ttm_bo_init checks that the reservation object is locked. This is the caller's responsibility when resv != NULL. Otherwise, the inline reservation object of the newly allocated buffer is used and must explicitly be locked. Uninterruptible w/w locks without an acquire context are always successful. v2: use ww_mutex_lock Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix typo of CGTSHuang Rui2017-01-271-1/+1
| | | | | | | | | | | | | | | | | | Fixes: 9e8590861e9 ('drm/amdgpu: add parse clock gating state') Reported-by: Tom StDenis <Tom.StDenis@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: do not reset gpu for virtualizationXiangliang Yu2017-01-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Current amdgpu reset process only works on bare-metal and for SRIOV many inside it need re-work to adapt to vf device. This is a temporary workaround to skip gpu reset. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virt: enable virtual displayXiangliang Yu2017-01-271-0/+4
| | | | | | | | | | | | | | | | | | | | Virtual display is default setting for virtualization, enable it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/vi: add support virtualizationXiangliang Yu2017-01-271-2/+32
| | | | | | | | | | | | | | | | | | | | Call VI virtualization functions if device is Vf. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: request/release full gpu access if device is vfXiangliang Yu2017-01-272-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | For gpu vf device, first need to request full gpu access before accessing gpu registers, and release full gpu access after the access is done. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virt: implement VI virt operation interfacesXiangliang Yu2017-01-274-1/+651
| | | | | | | | | | | | | | | | | | | | | | | | VI has asic specific virt support, which including mailbox and golden registers init. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virt: add high level interfaces for virtXiangliang Yu2017-01-272-5/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | Add high level interfaces that is not relate to specific asic. So asic files just need to implement the interfaces to support virtualization. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virt: use kiq to access registers (v2)Xiangliang Yu2017-01-274-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | For virtualization, it is must for driver to use KIQ to access registers when it is out of GPU full access mode. v2: agd: rebase Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virt: add runtime flagXiangliang Yu2017-01-271-0/+4
| | | | | | | | | | | | | | | | | | | | Add new flag to define gpu runtime that is out of full gpu access. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gfx8: implement emit_rreg/wreg functionXiangliang Yu2017-01-272-0/+38
| | | | | | | | | | | | | | | | | | | | Implement emit_rreg/wreg function for kiq ring. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/ring: add two interfaces to support r/w registers with kiqXiangliang Yu2017-01-272-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | During virtual runtime, need to send command to kiq ring to read/write GPU registers. Add two interface to support the two actions. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Linu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-03 18:41:54 +0100