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path: root/drivers/gpu/drm/i915/i915_pci.c (follow)
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* drm/i915/display/cnl+: Handle fused off DSCJosé Roberto de Souza2019-10-291-0/+1
* drm/i915/display: Handle fused off HDCPJosé Roberto de Souza2019-10-291-0/+2
* drm/i915: add new gen12 dgfx platform macroStuart Summers2019-10-251-0/+4
* drm/i915: treat stolen as a regionMatthew Auld2019-10-181-1/+1
* drm/i915: treat shmem as a regionMatthew Auld2019-10-181-8/+21
* drm/i915/display: abstract all vgaarb access to intel_vga.[ch]Jani Nikula2019-10-021-1/+0
* drm/i915/tgl: Swap engines for no rps (gpu reclocking)Chris Wilson2019-09-241-1/+1
* drm/i915: Add Pipe D cursor ctrl register for Gen12Ankit Nautiyal2019-09-241-0/+9
* drm/i915/dsb: Enable DSB for gen12.Animesh Manna2019-09-231-1/+2
* drm/i915/tgl: Extend MI_SEMAPHORE_WAITChris Wilson2019-09-171-1/+0
* drm/i915/tgl: Re-enable rc6Mika Kuoppala2019-09-131-1/+0
* drm/i915/tgl: Limit ourselves to just rcs0Chris Wilson2019-09-131-0/+1
* drm/i915/tgl: Disable preemption while being debuggedChris Wilson2019-09-121-0/+1
* drm/i915: convert device info num_pipes to pipe_maskJani Nikula2019-09-121-12/+12
* drm/i915/tgl: Disable rc6 for debuggingChris Wilson2019-09-101-0/+1
* drm/i915/gtt: Downgrade Cherryview back to aliasing-ppgttChris Wilson2019-08-301-1/+1
* drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgttChris Wilson2019-08-301-2/+2
* drm/i915/gtt: disable 2M pages for pre-gen11Matthew Auld2019-08-101-4/+7
* drm/i915: Use drm_i915_private directly from drv_get_drvdata()Chris Wilson2019-08-061-7/+7
* drm/i915: Add i915 to i915_inject_probe_failureMichal Wajdeczko2019-08-021-1/+1
* drm/i915/tgl: Tigerlake only has global MOCS registersMichel Thierry2019-07-311-1/+2
* drm/i915/uc: Unify uC platform checkDaniele Ceraolo Spurio2019-07-251-2/+2
* drm/i915/tgl: add modular FIA to device infoLucas De Marchi2019-07-121-0/+1
* drm/i915: Replace "_load" with "_probe" consequentlyJanusz Krzysztofik2019-07-121-1/+1
* drm/i915: Rename "_load"/"_unload" to match PCI entry pointsJanusz Krzysztofik2019-07-121-2/+2
* drm/i915/tgl: Add TGL PCI IDsLucas De Marchi2019-07-121-0/+1
* drm/i915/tgl: add initial Tiger Lake definitionsDaniele Ceraolo Spurio2019-07-121-0/+29
* drm/i915/ehl: Add missing VECS engineJosé Roberto de Souza2019-06-251-1/+1
* drm/i915: move modesetting core code under display/Jani Nikula2019-06-171-1/+2
* drm/i915/icl: Add Multi-segmented gamma supportShashank Sharma2019-06-171-1/+1
* drm/i915/guc: always use Command Transport BuffersDaniele Ceraolo Spurio2019-06-091-1/+0
* drm/i915: add force_probe module parameter to replace alpha_supportJani Nikula2019-05-311-5/+46
* drm/i915/guc: Enable GuC CTB communication on Gen11Michal Wajdeczko2019-05-281-0/+1
* drm/i915: Move w/a 0477/WaDisableIPC:skl into intel_init_ipc()Ville Syrjälä2019-05-061-2/+0
* drm/i915: Track HAS_RPS alongside HAS_RC6 in the device infoChris Wilson2019-04-191-0/+5
* drm/i915: extract intel_fbdev.h from intel_drv.hJani Nikula2019-04-081-0/+1
* drm/i915: Expose full 1024 LUT entries on ivb+Ville Syrjälä2019-04-031-1/+1
* drm/i915: Expose the legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props on gen2/3Ville Syrjälä2019-04-031-0/+5
* drm/i915: Add "10.6" LUT mode for i965+Ville Syrjälä2019-04-031-0/+6
* drm/i915: Add 10bit LUT for ilk/snbVille Syrjälä2019-04-031-0/+4
* drm/i915: Implement split/10bit gamma for ivb/hswVille Syrjälä2019-04-031-3/+3
* drm/i915: Introduce concept of a sub-platformTvrtko Ursulin2019-04-011-1/+1
* drm/i915: Split Pineview device info into desktop and mobileTvrtko Ursulin2019-04-011-2/+10
* drm/i915/ehl: Add ElkhartLake platformBob Paauwe2019-03-221-1/+1
* drm/i915/ehl: Add EHL platform info and PCI IDsJames Ausmus2019-03-221-0/+9
* drm/i915/cml: Add CML PCI IDSAnusha Srivatsa2019-03-201-0/+2
* drm/i915: Drop address size from ppgtt_typeChris Wilson2019-03-151-2/+2
* drm/i915: Record platform specific ppGTT size in intel_device_infoChris Wilson2019-03-151-6/+12
* drm/i915/icl: Remove alpha support protectionJosé Roberto de Souza2019-03-071-1/+0
* drm/i915: Populate pipe_offsets[] & co. accuratelyVille Syrjälä2019-03-061-42/+104
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