summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_reg.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa2020-03-201-0/+2
* drm/i915: Add Wa_1406306137:icl,ehlMatt Roper2020-03-131-0/+1
* drm/i915: Add Wa_1604278689:icl,ehlMatt Roper2020-03-131-0/+1
* drm/i915: Add missing HDMI audio pixel clocks for gen12Kai Vehmanen2020-03-111-0/+4
* drm/i915: Fix readout of PIPEGCMAXVille Syrjälä2020-03-091-1/+0
* drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood2020-03-021-0/+3
* drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza2020-03-021-2/+3
* drm/i915: Set up PIPE_MISC truncate bit on tgl+Ville Syrjälä2020-02-271-0/+1
* drm/i915: remove ICP_PP_CONTROLLucas De Marchi2020-02-271-10/+0
* drm/i915/tgl: Add Wa_22010178259:tglMatt Roper2020-02-211-0/+1
* drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display initMatt Roper2020-02-201-0/+2
* drm/i915: Parametrize PFIT_PIPEVille Syrjälä2020-02-201-0/+1
* drm/i915/debugfs: Remove i915_energy_uJTvrtko Ursulin2020-02-081-2/+0
* drm/i915: Implement Wa_1607090982Mika Kuoppala2020-02-071-0/+2
* drm/i915: Disable tesselation clock gating on tgl A0Mika Kuoppala2020-02-071-0/+1
* drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy2020-02-051-3/+3
* drm/i915: Polish WM_LINETIME register stuffVille Syrjälä2020-01-311-7/+7
* drm/i915: add extra slice common debug registersLionel Landwerlin2020-01-301-0/+2
* drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPTChris Wilson2020-01-291-1/+4
* drm/i915: add Wa_14010594013: icl,ehlMatt Atwood2020-01-161-0/+1
* drm/i915/tgl: Add Wa_1409825376 to tglRadhakrishna Sripada2020-01-151-0/+3
* drm/i915/gen11: Add additional pcode status valuesMatt Roper2020-01-141-0/+2
* drm/i915/display/icl+: Do not program clockgatingJosé Roberto de Souza2020-01-081-20/+0
* drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media ...Dhinakaran Pandiyan2020-01-071-0/+1
* drm/i915: Add Wa_1407352427:icl,ehlMatt Roper2020-01-011-0/+1
* drm/i915/tgl: Extend Wa_1408615072 to tglMatt Roper2019-12-271-0/+3
* drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehlMatt Roper2019-12-271-1/+3
* drm/i915/tgl: Gen-12 render decompressionDhinakaran Pandiyan2019-12-231-0/+1
* drm/i915/tgl: Drop Wa#1178Matt Roper2019-12-131-3/+1
* drm/i915/dsb: Fix in mmio offset calculation of DSB instanceAnimesh Manna2019-12-111-1/+1
* drm/i915/tgl: Program BW_BUDDY registers during display initMatt Roper2019-12-101-0/+8
* drm/i915: Program SHPD_FILTER_CNT on CNP+Matt Roper2019-12-021-0/+4
* drm/i915/tgl: Implement Wa_1604555607Michel Thierry2019-11-291-0/+4
* drm/i915: Fix frame start delay programmingVille Syrjälä2019-11-151-5/+7
* Merge drm/drm-next into drm-intel-next-queuedJani Nikula2019-11-151-0/+10
|\
| * Backmerge i915 security patches from commit 'ea0b163b13ff' into drm-nextDave Airlie2019-11-141-0/+8
| |\
| | * drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak2019-11-051-0/+2
| | * drm/i915: Lower RM timeout to avoid DSI hard hangsUma Shankar2019-11-051-0/+4
| | * drm/i915: Add gen9 BCS cmdparsingJon Bloomfield2019-11-051-0/+4
| * | drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak2019-11-141-0/+2
* | | drm/i915/gt: Refactor mocs loops into single control macroChris Wilson2019-11-141-7/+12
* | | drm/i915/display/dsi: Add support to pipe DJosé Roberto de Souza2019-11-131-0/+1
* | | drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definitionJosé Roberto de Souza2019-11-131-1/+1
* | | drm/i915/dsi: Define command mode registersVandita Kulkarni2019-11-121-8/+70
* | | drm/i915: Expose C8 on VLV/CHV sprite planesVille Syrjälä2019-11-041-0/+1
* | | drm/i915: Add missing 10bpc formats for pipe B sprites on CHVVille Syrjälä2019-11-041-6/+8
* | | drm/i915: Expose alpha formats on VLV/CHV primary planesVille Syrjälä2019-11-041-0/+1
|/ /
* | drm/i915/tgl: Add gam instdoneMika Kuoppala2019-10-301-0/+1
* | drm/i915/tgl: Add SFC instdone to error stateMika Kuoppala2019-10-301-0/+3
* | drm/i915/tgl: add support to one DP-MST streamLucas De Marchi2019-10-301-0/+3
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-17 21:22:41 +0100