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path: root/drivers/gpu/drm/i915/intel_cdclk.c (follow)
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* drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/Ville Syrjälä2019-02-131-7/+7
* drm/i915/cdclk: switch to kernel typesJani Nikula2019-01-171-20/+20
* drm/i915: Markup paired operations on display power domainsChris Wilson2019-01-141-4/+6
* drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi2018-12-131-5/+5
* drm/i915: add ICP support to cnp_rawclk() and kill icp_rawclk()Paulo Zanoni2018-11-141-29/+8
* drm/i915: rename CNP_RAWCLK_FRAC to CNP_RAWCLK_DENPaulo Zanoni2018-11-141-3/+3
* drm/i915/cnp+: update to the new RAWCLK_FREQ recommendationsPaulo Zanoni2018-11-141-3/+3
* drm/i915/glk: Remove 99% limitation.Rodrigo Vivi2018-10-291-16/+2
* drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva2018-07-051-0/+5
* drm/i915/icl: implement DVFS for ICLPaulo Zanoni2018-06-161-3/+43
* drm/i915/skl: Add warn about unsupported CDCLK ratesImre Deak2018-06-111-0/+10
* drm/i915: Adjust eDP's logical vco in a reliable place.Rodrigo Vivi2018-05-031-4/+37
* drm/i915/audio: set minimum CD clock to twice the BCLKAbhay Kumar2018-04-231-2/+14
* Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jik...Linus Torvalds2018-04-051-2/+2
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| * treewide: Fix typos in printkMasanari Iida2018-03-271-2/+2
| * drm/i915/vlv: Add cdclk workaround for DSIHans de Goede2018-02-141-0/+8
| * drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changingImre Deak2018-02-061-5/+17
| * BackMerge tag 'v4.15-rc8' into drm-nextDave Airlie2018-01-181-9/+26
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| | * drm/i915: Apply Display WA #1183 on skl, kbl, and cflLucas De Marchi2018-01-041-9/+26
* | | drm/i915/icl: add the main CDCLK functionsPaulo Zanoni2018-02-131-2/+235
* | | drm/i915: Use INTEL_GEN everywhereTvrtko Ursulin2018-02-091-1/+1
* | | drm/i915/bxt, glk: Avoid long atomic poll during CDCLK changeImre Deak2018-02-011-2/+2
* | | drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changingImre Deak2018-02-011-5/+17
* | | drm/i915/icp: Get/set proper Raw clock frequency on ICPAnusha Srivatsa2018-01-191-2/+27
* | | drm/i915: Add tracking for CDCLK bypass frequencyImre Deak2018-01-181-17/+18
* | | drm/i915/vlv: Add cdclk workaround for DSIHans de Goede2017-12-231-0/+8
* | | drm/i915: Apply Display WA #1183 on skl, kbl, and cflLucas De Marchi2017-12-221-9/+26
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* | drm/i915: Make ips_enabled a property depending on whether IPS is enabled, v3.Maarten Lankhorst2017-11-301-1/+1
* | drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.Rodrigo Vivi2017-10-251-12/+2
* | drm/i915: Perform a central cdclk state sanity checkVille Syrjälä2017-10-251-11/+19
* | drm/i915: Sanity check cdclk in vlv_set_cdclk()Ville Syrjälä2017-10-251-0/+12
* | drm/i915: Adjust system agent voltage on CNL if required by DDI portsVille Syrjälä2017-10-251-1/+45
* | drm/i915: Use cdclk_state->voltage on CNLVille Syrjälä2017-10-251-16/+31
* | drm/i915: Use cdclk_state->voltage on BXT/GLKVille Syrjälä2017-10-251-2/+21
* | drm/i915: Use cdclk_state->voltage on SKL/KBL/CFLVille Syrjälä2017-10-251-7/+36
* | drm/i915: Use cdclk_state->voltage on BDWVille Syrjälä2017-10-251-6/+29
* | drm/i915: Use cdclk_state->voltage on VLV/CHVVille Syrjälä2017-10-251-16/+38
* | drm/i915: Start tracking voltage level in the cdclk stateVille Syrjälä2017-10-251-7/+24
* | drm/i915: Clean up some cdclk switch statementsVille Syrjälä2017-10-251-34/+34
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* drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lockSagar Arun Kamble2017-10-111-20/+20
* drm/i915: Increase poll time for BDW FCLK_DONEMarta Lofstedt2017-09-121-1/+5
* drm/i915: Consolidate max_cdclk_freq check in intel_crtc_compute_min_cdclk()Ville Syrjälä2017-08-311-52/+44
* drm/i915: Track minimum acceptable cdclk instead of "minimum dotclock"Ville Syrjälä2017-08-311-98/+104
* drm/i915: reintroduce VLV/CHV PFI programming power domain workaroundGabriel Krisman Bertazi2017-06-291-0/+20
* drm/i915/cnl: Allow dynamic cdclk changes on CNLRodrigo Vivi2017-06-121-4/+56
* drm/i915/cnl: Implement CNL display init/unit sequenceVille Syrjälä2017-06-121-1/+107
* drm/i915/cnl: Implement .set_cdclk() for CNLVille Syrjälä2017-06-121-0/+106
* drm/i915/cnl: Implement .get_display_clock_speed() for CNLVille Syrjälä2017-06-121-1/+55
* drm/i915/cnp: Get/set proper Raw clock frequency on CNP.Rodrigo Vivi2017-06-021-1/+28
* drm/i915: Fix rawclk readout for g4xVille Syrjälä2017-05-051-4/+2
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