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* drm/msm/dsi: Introduce DSI configuration moduleHai Li2015-08-164-146/+177
| | | | | | | | | With more platforms supported, the DSI host configuration array keeps expanding. This change moves those to a separate dsi_cfg module. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Make each PHY type compilation independentHai Li2015-08-164-4/+33
| | | | | | | | | On a certain platform, only one type of DSI PHY is used. This change allows the user to only compile the PHY type which is being used. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Split PHY drivers to separate filesHai Li2015-08-166-758/+857
| | | | | | | | This change moves each PHY type specific code into separate files. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Return void from msm_dsi_phy_disable()Hai Li2015-08-162-12/+6
| | | | | | | | We are not checking the return value from msm_dsi_phy_disable(). Change the return type to void. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Specify bitmask to set source PLLHai Li2015-08-161-5/+11
| | | | | | | | | The bit position to configure source PLL will change on new types of PHYs. The caller should pass down this information. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp: Clear pending interrupt status before enable interruptjilai wang2015-08-166-10/+23
| | | | | | | | | Pending interrupt status needs to be cleared before enable the interrupt. Otherwise it's possible to get a pending interrupt instead of an incoming interrupt. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Add rotation (hflip/vflip) support to MDP5 planes (v2)jilai wang2015-08-161-8/+41
| | | | | | | | | | | | | | MDP5 SSPPs can flip the input source horizontally or vertically. This change is to add this support to MDP5 planes. v1: Initial change v2: Use existing "rotation" property instead of creating msm specific properties. In order to be compatiable with legacy non-atomic set_property, switch to drm_atomic_helper_plane_set_property helper function. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: add calls to prepare and unprepare panelSrinivas Kandagatla2015-08-161-2/+6
| | | | | | | | | | Prepare the panel before it's enabled and un-prepare after disable, this will make sure that the regulators are switched on and off correctly. Tested it on APQ8064 based IFC6410 with panel. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Modify dsi manager bridge ops to work with external bridgesArchit Taneja2015-08-161-15/+28
| | | | | | | | | The dsi bridge ops call drm_panel functions to set up the connected drm_panel. Add checks to make sure these aren't called when we're connected to an external bridge. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Allow dsi to connect to an external bridgeArchit Taneja2015-08-164-8/+90
| | | | | | | | | | | | | | | | | | | | | | | There are platforms where the DSI output can be connected to another encoder bridge chip (DSI to HDMI, DSI to LVDS etc). Add support for external bridge support to the dsi driver. We assume that the external bridge chip would be of the type drm_bridge. The dsi driver's internal drm_bridge (msm_dsi->bridge) is linked to the external bridge's drm_bridge struct. In the case we're connected to an external bridge, we don't need to create and manage a connector within our driver, it's the bridge driver's responsibility to create one. v2: - Move the external bridge attaching stuff to dsi manager to make things cleaner. - Force the bridge to connect to a video mode encoder for now (the dsi mode flags may have not been populated by modeset_init) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Create a helper to check if there is a connected deviceArchit Taneja2015-08-163-3/+10
| | | | | | | | | | | | | | | | Create a helper msm_dsi_device_connected() which checks whether we have a device connected to the dsi host or not. This check gets messy when we have support external bridges too. Having an inline function makes it more legible. For now, the check only consists of msm_dsi->panel being non-NULL. Later, this will check if we have an external bridge or not. This helper isn't used in dsi_connector related code as that's specific to only when a drm_panel is connected. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'Archit Taneja2015-08-164-16/+16
| | | | | | | | | | | | We currently support only panels connected to dsi output. We're going to also support external bridge chips now. Change 'panel_node' to 'device_node' in the struct msm_dsi_host and 'panel_flags' to 'device_flags' in msm_dsi. This makes things sound a bit more generic. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Make TE gpio optionalArchit Taneja2015-08-161-1/+2
| | | | | | | | Platforms containing only DSI video mode devices don't need a TE gpio. Make TE gpio optional. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: mdp4 lvds: get panel node via of graph parsingArchit Taneja2015-08-162-9/+25
| | | | | | | | | | | | | | | We currently get the output connected to LVDS by looking for a phandle called 'qcom,lvds-panel' under the mdp DT node. Use the more standard of_graph approach to create an lvds output port, and retrieve the panel node from the port's endpoint data. v3 - Fix return value checks of of_graph_* calls. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: dsi host: Use device graph parsing to parse connected panelArchit Taneja2015-08-161-19/+53
| | | | | | | | | | | | | | | | | | | | | | | | | The dsi host looks for the connected panel node by parsing for a child named 'panel'. This hierarchy isn't very flexible. The connected panel is forced to be a child to the dsi host, and hence, a mipi dsi device. This isn't suitable for dsi devices that don't use mipi dsi as their control bus. Follow the of_graph approach of creating ports and endpoints to represent the connections between the dsi host and the panel connected to it. In our case, the dsi host will only have one output port, linked to the panel's input port. Update DT binding documentation with device graph usage info. v3: - Fix return value checks of of_graph_* calls. - Don't make port a mandatory DT property - Fix defer check when no panel node specified - Rename parse_dt func to align with other dsi_host funcs Reviewed-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: dsi host: add missing of_node_put()Archit Taneja2015-08-161-1/+5
| | | | | | | | Decrement device node refcount if of_get_child_by_name is successfully called. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Enable clocks during enable/disable_vblank() callbacksHai Li2015-08-164-2/+102
| | | | | | | | | | | | | AHB clock should be enabled before accessing registers during enable/disable_vblank(). Since these 2 callbacks are called in atomic context while clk_prepare may cause thread sleep, a work is scheduled to control vblanks. v2: fixup spinlock initialization Signed-off-by: Hai Li <hali@codeaurora.org> [add comment about cancel_work_sync() before drm_irq_uninstall()] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Add support for msm8x74v1jilai wang2015-08-161-4/+73
| | | | | | | | msm8x74v1 has different MDP5 version (v1.0) from msm8x74v2 (v1.2). Add a separate config data to support msm8x74v1. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Add DMA pipe planes for MDP5jilai wang2015-08-161-4/+21
| | | | | | | | | | This change is to add planes which use DMA pipes for MDP5. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> [slight comment adjust to s/Construct public planes/Construct video planes/ since DMA planes are public planes too, they just can't scale or CSC] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp: Add capabilities to MDP planes (v2)jilai wang2015-08-168-63/+114
| | | | | | | | | | | | | | MDP planes can be implemented using different type of HW pipes, RGB/VIG/DMA pipes for MDP5 and RGB/VG/DMA pipes for MDP4. Each type of pipe has different HW capabilities such as scaling, color space conversion, decimation... Add a variable in plane data structure to specify the difference of each plane which comes from mdp5_cfg data and use it to differenciate the plane operation. V1: Initial change V2: Fix a typo in mdp4_kms.h Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: add more YUV formats for MDP5Stephane Viau2015-08-162-47/+77
| | | | | | | | Add packed YUV422 and planar YUV420 formats to MDP supported formats. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: use 2 memory clients for YUV formats on newer mdp5Wentao Xu2015-08-163-6/+25
| | | | | | | | | | Newer MDP5 uses 2 shared memory pool clients for certain YUV formats. For example, if VIG0 is used to fetch data in YUYV format, it will use VIG0_Y for Y component, and VIG0_Cr for UV packed. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> [rebase] Signed-off-by: Stephane Viau <sviau@codeaurora.org>
* drm/msm/mdp: mark if a MDP format is YUV at definitionWentao Xu2015-08-162-14/+16
| | | | | | | | | | | This makes it easy to determine if a format is YUV. The old method of using chroma sample type incorrectly marks YUV444 as RGB format. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> [rebase] Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dp: use flags argument of devm_gpiod_get to set directionUwe Kleine-König2015-08-161-15/+2
| | | | | | | | | | | | | | Since 39b2bbe3d715 (gpio: add flags argument to gpiod_get*() functions) which appeared in v3.17-rc1, the gpiod_get* functions take an additional parameter that allows to specify direction and initial value for output. Use this to simplify the driver. Furthermore this is one caller less that stops us making the flags argument to gpiod_get*() mandatory. Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Save/Restore PLL status across PHY resetHai Li2015-08-165-36/+68
| | | | | | | | | | | | Reset DSI PHY silently changes its PLL registers to reset status, which will make cached status in clock driver invalid and result in wrong output rate of link clocks. The current restore mechanism in DSI PLL does not cover all the cases. This change is to recover PLL status after PHY reset to match HW status with cached status in clock driver. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: One function call less in dsi_init() after error detectionMarkus Elfring2015-08-161-13/+9
| | | | | | | | | | | | | | The dsi_destroy() function was called in two cases by the dsi_init() function during error handling even if the passed variable contained a null pointer. * This implementation detail could be improved by adjustments for jump targets according to the Linux coding style convention. * Drop an unnecessary initialisation for the variable "msm_dsi" then. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> [add couple missing ERR_PTR()'s] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Delete an unnecessary check before the function call "dsi_destroy"Markus Elfring2015-08-161-3/+1
| | | | | | | | | | The dsi_destroy() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSHHai Li2015-08-164-23/+129
| | | | | | | | | This change takes advantage of a HW feature that synchronize flush operation on CTL1 to CTL0, to keep dual DSI pipes in sync. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Allocate CTL for each display interfaceHai Li2015-08-167-79/+80
| | | | | | | | | | | | | In MDP5, CTL contains information of the whole pipeline whose output goes down to a display interface. In various cases, one interface may require 2 CRTCs, but only one CTL. Some interfaces also require to use certain CTLs. Instead of allocating CTL for each active CRTC, this change is to associate a CTL with each interface. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Add plane blending operation support for MDP5 (v2)jilai wang2015-08-166-85/+262
| | | | | | | | | | | | This change is to add properties alpha/zpos/blend_mode to mdp5 plane for alpha blending operation to generate the blended output. v1: Initial change v2: Change "premultilied" property to enum (Rob's comment) Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> [Don't actually expose alpha/premultiplied props to userspace yet pending a chance for discussion and some userspace to exercise it] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: don't install plane properties on crtcRob Clark2015-08-166-10/+2
| | | | | | | | | This was a hold-over from the pre-atomic days and legacy userspace that only understood CRTCs. Fortunately we don't have any properties, so this doesn't change anything. But before we start growing some plane properties, we should fix this. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Report PHY errors only when they really occurArchit Taneja2015-08-161-1/+5
| | | | | | | | | | | | DSI PHY errors are falsely reported whenever a dsi error occurs. This is because DSI_DLN0_PHY_ERR isn't only used as a status register, but also used to mask PHY errors. Currently, we end up reading the mask bits too and therefore always report errors. Ignore the register mask bits and check for only the status/clear bits. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Set different display size limitation on each targetHai Li2015-08-165-4/+20
| | | | | | | | | | | | | The maximum output width of one pipeline depends on the LayerMixer's capability. It may be different on each target. Also, MDP5 doesn't have vertical limitation in one frame, as long as the pixel clock can be supported. This change obtains the maximum LM resolution from configuration table and treat it as the whole pipe's limitation for MDP5. The size limit on MDP4 is not changed. Signed-off-by: Hai Li <hali@codeaurora.org>
* drm/msm/hdmi: standardize on lead chip for compatible namesRob Clark2015-08-161-4/+4
| | | | | | | | For all of these devices, msm89xy was the lead chip, so standardize the compatible names to align with convention used by rest of the qcom/msm drivers. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Add support for msm8x94Stephane Viau2015-08-165-32/+129
| | | | | | | | | | | | | | This change adds the MDP and HDMI support for msm8x94. Note that HDMI PHY registers are not being accessed anymore from the driver. Signed-off-by: Stephane Viau <sviau@codeaurora.org> [rename compatible s/8x94/8994/ since preference is to not trust the marketing folks who invent chip #'s but instead name things after the lead chip.. we should rename some 80XY to 89XY to standardize on the lead chip but leave that for another patch. Also, update dt bindings doc] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: remove ->reset() from HDMI PHYStephane Viau2015-08-165-144/+50
| | | | | | | | | | | | | | | | | | | | | ->reset() currently only accesses HDMI core registers, and yet it is located in hdmi_phy*. Since no PHY registers are being accessed during ->reset(), it would be better to bring that function in hdmi core module where HDMI core registers are usually being accessed. This will also help for msm8x94 for which no PHY registers accesses are done (->phy_init == NULL) but the HDMI PHY reset from HDMI core still needs to be done. Note: SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this write should not affect anything if the corresponding field is not writable. Signed-off-by: Stephane Viau <sviau@codeaurora.org> [fixed warning about unused 'phy' in hpd_enable() while merging] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Add support for msm8x94Hai Li2015-08-163-0/+150
| | | | | | | | | DSI controller on msm8x94 is version 1.3, which requires different power supplies and works with 20nm DSI PHY. This change is to add the basic support for this version. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Use pinctrl in DSI driverHai Li2015-08-161-0/+12
| | | | | | | | | Some targets use pinctrl framework to configure some pins. This change allows DSI driver to set default and sleep pinctrl status. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Rename *dual panel* to *dual DSI*Hai Li2015-08-161-42/+42
| | | | | | | | | The current term of *dual panel* in DSI driver code causes confusion. It is supposed to indicate the panel using two DSI links. Rename it to *dual DSI*. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Update source PLL selection in DSI PHYHai Li2015-08-163-22/+41
| | | | | | | | | | | | | | The source PLL to be used by each DSI PHY should be decided by DSI manager based on dual DSI information, while the register programming to select PLL is different from one type of PHY to another. This change adds the H/W difference to PHY configuration and updates the interface between DSI manager and PHY. With this change, PLL selection can be supported on different targets. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: add hdmi hdcp support (V3)jilai wang2015-08-168-8/+1523
| | | | | | | | | | | | Add HDMI HDCP support including HDCP PartI/II/III authentication. V1: Initial Change V2: Address Bjorn&Rob's comments Refactor the authentication process to use single work instead of multiple work for different authentication stages. V3: Update to align with qcom SCM api. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: update generated headersRob Clark2015-08-1617-220/+680
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: release SMB (shared memory blocks) in various casesWentao Xu2015-08-145-32/+104
| | | | | | | | | | | | | Release all blocks after the pipe is disabled, even when vsync didn't happen in some error cases. Allow requesting SMB multiple times before configuring to hardware, by releasing blocks not programmed to hardware yet for shrinking case. This fixes a potential leak of shared memory pool blocks. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Tested-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: change to uninterruptible wait in atomic commitWentao Xu2015-08-144-13/+14
| | | | | | | | | The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: mdp4: Fix drm_framebuffer dereference crashArchit Taneja2015-08-141-1/+3
| | | | | | | | mdp4_get_frame_format() can dereference a drm_framebuffer when it's NULL. Call it in mdp4_plane_mode_set only when we know fb is non-NULL. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix msm_gem_prime_get_sg_table()Rob Clark2015-08-141-2/+6
| | | | | | | We need to return a new sgt, since the caller takes ownership of it. Reported-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Use new drm_fb_helper functionsArchit Taneja2015-08-061-24/+10
| | | | | | | | | | | | Use the newly created wrapper drm_fb_helper functions instead of calling core fbdev functions directly. They also simplify the fb_info creation. Cc: Rob Clark <robdclark@gmail.com> Cc: Stephane Viau <sviau@codeaurora.org> Cc: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic: pass old crtc state to atomic_begin/flush.Maarten Lankhorst2015-07-272-4/+8
| | | | | | | | | | | | In intel it's useful to keep track of some state changes with old crtc state vs new state, for example to disable initial planes or when a modeset's prevented during fastboot. Cc: dri-devel@lists.freedesktop.org Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> [danvet: squash in fixup for exynos provided by Maarten.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/msm: restart queued submits after hangRob Clark2015-06-114-4/+49
| | | | | | | | | | Track the list of in-flight submits. If the gpu hangs, retire up to an including the offending submit, and then re-submit the remainder. This way, for concurrently running piglit tests (for example), one failing test doesn't cause unrelated tests to fail simply because it's submit was queued up after one that triggered a hang. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix timeout calculationRob Clark2015-06-114-16/+21
| | | | | | | | | | | | | | | | | | The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but converting this directly to jiffies doesn't take into account the initial jiffies count at boot, which may differ from the base time of CLOCK_MONOTONIC. TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as suggested by Arnd) v2: switch over from 'struct timespec' to ktime_t throughout, since 'struct timespec' will be deprecated (as suggested by Arnd) v3: minor cosmetic tweaks Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
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