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* drm/nouveau/iccsense: fix memory leakBen Skeggs2016-06-151-7/+9
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/ltc/gm107-: fix typo in the address of NV_PLTCG_LTC0_LTS0_INTRBen Skeggs2016-06-022-4/+4
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau/bios/disp: fix handling of "match any protocol" entriesBen Skeggs2016-06-021-3/+5
| | | | | | | As it turns out, a value of 0xff means "any protocol" and not "VGA". Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau/bios/pll: check BIT table version before trying to parse itBen Skeggs2016-05-201-4/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios/pll: prevent oops when limits table can't be parsedBen Skeggs2016-05-201-2/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt/gk104: round up in gk104_volt_setKarol Herbst2016-05-201-1/+1
| | | | | | | | We always want a equal or higher voltage than the requested ones, otherwise nouveau undervolts. Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()Ben Skeggs2016-05-202-0/+61
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()Ben Skeggs2016-05-201-0/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gf100-: allocate mmu debug buffersBen Skeggs2016-05-206-0/+34
| | | | | | | Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb: allow chipset-specific actions for oneinit()Ben Skeggs2016-05-202-0/+9
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: remove pmc_enable argument from subdev ctorBen Skeggs2016-05-2028-33/+28
| | | | | | These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv04: define reset masks + intr cleanupBen Skeggs2016-05-202-10/+5
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv11: define reset masks + intr cleanupBen Skeggs2016-05-204-0/+59
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv17: define reset masks + intr cleanupBen Skeggs2016-05-204-1/+31
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv50: define reset masks + intr cleanupBen Skeggs2016-05-204-13/+43
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/g84: define reset masks + intr cleanupBen Skeggs2016-05-202-0/+69
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/g98: define reset masks + intr cleanupBen Skeggs2016-05-201-14/+22
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gt215: define reset masks + intr cleanupBen Skeggs2016-05-202-0/+71
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gf100: define reset masks + intr cleanupBen Skeggs2016-05-202-20/+30
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gk104: define reset masks + intr cleanupBen Skeggs2016-05-204-1/+70
| | | | | | Engine fields have been removed, as they're specified by PTOP. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: implement support for PTOP interrupt routingBen Skeggs2016-05-201-2/+11
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: implement support for PTOP reset infoBen Skeggs2016-05-201-6/+9
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: allow for local definition of reset bitsBen Skeggs2016-05-202-2/+16
| | | | | | | | With the addition of PTOP-specified reset bits, it makes more sense to move the definitions here rather than in individual subdev implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: add helper function to handle device resetBen Skeggs2016-05-201-0/+20
| | | | | | | This will be later extended to handle PTOP-specified reset masks as well as the hardcoded ones. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: rename struct nvkm_mc_intr to nvkm_mc_mapBen Skeggs2016-05-206-10/+10
| | | | | | | This will also be used to define NV_PMC_ENABLE <-> subdev mappings in an upcoming commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top/gk104: initial implementationBen Skeggs2016-05-202-0/+111
| | | | | | Ported from the code currently in engine/fifo/gk104.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top: initial implementationBen Skeggs2016-05-203-1/+169
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: add top plumbingBen Skeggs2016-05-203-0/+7
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: configure sensors like nvidia doesKarol Herbst2016-05-201-0/+68
| | | | | | | | v2: rename ina209/ina219 read function Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: split sensor into own structKarol Herbst2016-05-202-45/+112
| | | | | | | | v2: add list_del call, reword error message Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: convert to linked listKarol Herbst2016-05-202-18/+17
| | | | | | | | v2: add list_del calls Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: remove read functionKarol Herbst2016-05-201-13/+10
| | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu: be more strict about lockingKarol Herbst2016-05-201-3/+5
| | | | | | | | | When we start communicating with the pmu a bit more, the current code is a real issue. I encountered a dead lock here, while testing my dynamic reclocking code Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/devinit/gf100: make devinit on resume saferAlexandre Courbot2016-05-202-4/+12
| | | | | | | | | | | | | | | | | | In case of successful suspend, devinit will have to be run and this is the behavior currently hardcoded. However, as FD bug 94725 suggests, there might be cases where runtime suspend leaves the GPU powered, and in such cases devinit should not be run on resume. On GF100+ we have a reliable way to know whether we need to run devinit. Use it instead of blindly trusting the flag set by nvkm_devinit_fini(). The code around the NvForcePost also needs to be slightly reworked in order to keep working. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Suggested-by: Dave Airlie <airlied@redhat.com> Suggested-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gm20b: add basic driverAlexandre Courbot2016-03-142-0/+199
| | | | | | | Add a basic clock driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: share reusable structures/functionsAlexandre Courbot2016-03-142-36/+73
| | | | | | | Make functions/structures that the GM20B driver will reuse public. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: set lowest frequency during init()Alexandre Courbot2016-03-141-2/+5
| | | | | | | | Err on the safe side by setting the lowest frequency (and thus voltage) during device init. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: split gk20a_clk_new()Alexandre Courbot2016-03-141-12/+31
| | | | | | | | | | | This allows to instanciate drivers that use the same logic as gk20a with different parameters. Add a constructor function to allow other chips that inherit from this clock to easily initialize its members Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: abstract pl_to_divAlexandre Courbot2016-03-141-21/+36
| | | | | | | | pl_to_div may be done differently depending on the chip. Abstract this operation so the same logic can be reused for them as well. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: put mnp values into their own structAlexandre Courbot2016-03-141-31/+36
| | | | | | | | This allows us to read them using one single function and will be handy to the GM20B driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: emit parent rate as debug messageAlexandre Courbot2016-03-141-2/+2
| | | | | | | Most users are probably not interested in this information. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: only restore divider to 1:1 if neededAlexandre Courbot2016-03-141-3/+10
| | | | | | | | | Only restore the 1:1 divider if it is not set already. Also use the proper masks for this operation and add a second write as done in the Android code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: only compute n_lo if neededAlexandre Courbot2016-03-141-3/+5
| | | | | | | | n_lo is used if we are going to slide. Compute it only if that condition succeeds to avoid confusion about future usage of this computation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: fix VCO bit maskAlexandre Courbot2016-03-141-1/+2
| | | | | | | | | Fix the mask specified to switch to VCO mode was given as an (incorrect) immediate value. Although the side-effect happens to be the same, this is clearly incorrect. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: rename enable/disable functionsAlexandre Courbot2016-03-141-28/+24
| | | | | | | | | gk20a_pllg_disable() is only used in the context of gk20a_clk_fini(). Move its body there and rename _gk20a_pllg_enable() and _gk20a_pllg_disable() to non-underscored versions. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp()Alexandre Courbot2016-03-141-4/+8
| | | | | | | | Move some variables declarations to the scope where they are actually used to make the code easier to follow. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gk20a: convert parameters to KhzAlexandre Courbot2016-03-141-15/+17
| | | | | | | Perform computations in Khz instead of Mhz for better precision. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt: add GM20B driverAlexandre Courbot2016-03-142-0/+57
| | | | | | | Add basic GM20B volt driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt/gk20a: split constructorAlexandre Courbot2016-03-142-12/+25
| | | | | | | | Split the constructor function so we can reuse the same logic in other chips. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt/gk20a: share reusable members & functionsVince Hsu2016-03-142-18/+51
| | | | | | | | | The CVB calculation and voltage setting functions can be reused for the future chips. So move the declaration to gk20a.h. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>