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path: root/drivers/gpu/drm (follow)
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* drm/i915: Add pipe crc tracepointVille Syrjälä2019-02-152-6/+28
* drm/i915/selftests: Drop unnecessary struct_mutex around i915_reset()Chris Wilson2019-02-151-2/+0
* drm/i915: Defer application of request banning to submissionChris Wilson2019-02-152-14/+8
* drm/i915/selftests: Always use an active engine while resettingChris Wilson2019-02-151-19/+8
* drm/i915: Only try to park engines after a failed resetChris Wilson2019-02-142-5/+10
* snd/hda, drm/i915: Track the display_power_status using a cookieChris Wilson2019-02-141-9/+14
* drm/i915: Implement new w/a for underruns with wm1+ disabledVille Syrjälä2019-02-141-0/+7
* drm/i915: Include "ignore lines" in skl+ wm stateVille Syrjälä2019-02-143-16/+30
* Revert "drm/i915: W/A for underruns with WM1+ disabled on icl"Ville Syrjälä2019-02-142-7/+0
* drm/i915: Make MG PHY macros semantically consistentAditya Swarup2019-02-142-47/+47
* drm/i915: Make combo PHY DDI macro definitions consistent for ICL and CNLAditya Swarup2019-02-143-15/+15
* drm/i915: Assert that VED and ISP are power gatedVille Syrjälä2019-02-132-0/+61
* drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/Ville Syrjälä2019-02-134-17/+17
* drm/i915: Apply rps waitboosting for dma_fence_wait_timeout()Chris Wilson2019-02-137-98/+44
* drm/i915/icl: Add degamma and gamma lut size to gen11 capsUma Shankar2019-02-131-1/+2
* drm/i915/icl: Enable pipe output cscUma Shankar2019-02-133-19/+126
* drm/i915/icl: Enable ICL Pipe CSC blockUma Shankar2019-02-132-4/+10
* drm/i915/icl: Add icl pipe degamma and gamma supportUma Shankar2019-02-132-7/+26
* drm/i915/glk: Fix degamma lut programmingUma Shankar2019-02-132-29/+35
* drm/i915: Detect potential i915_reset_trylock() lockupsChris Wilson2019-02-121-0/+3
* drm/i915: Recursive i915_reset_trylock() verbotenChris Wilson2019-02-121-8/+8
* drm/i915: Dump skl+ watermark changesVille Syrjälä2019-02-121-3/+83
* drm/i915: Reacquire priolist cache after dropping the engine lockChris Wilson2019-02-111-10/+17
* drm/i915: Include the current timeline seqno for debugging execlistsChris Wilson2019-02-111-2/+3
* drm/i915: Use synchronize_srcu_expedited() for resetsChris Wilson2019-02-111-1/+1
* drm/i915: Pull sync_scru for device reset outside of wedge_mutexChris Wilson2019-02-111-3/+3
* drm/i915/opregion: rvda is relative from opregion base in opregion 2.1+Jani Nikula2019-02-111-3/+21
* drm/i915/opregion: fix version checkJani Nikula2019-02-111-2/+12
* drm/i915: Protect i915_active iterators from the shrinkerChris Wilson2019-02-111-11/+25
* drm/i915/execlists: Refactor out can_merge_rq()Chris Wilson2019-02-091-11/+24
* drm/i915: Don't claim an unstarted request was guiltyChris Wilson2019-02-083-3/+52
* drm/i915: Serialise resets with wedgingChris Wilson2019-02-081-28/+40
* drm/i915: Wait for old resets before applying debugfs/i915_wedgedChris Wilson2019-02-081-7/+3
* drm/i915: Uninterruptibly drain the timelines on unwedgingChris Wilson2019-02-081-20/+8
* drm/i915: Force the GPU reset upon wedgingChris Wilson2019-02-081-4/+4
* drm/i915: Revoke mmaps and prevent access to fence registers across resetChris Wilson2019-02-0810-167/+117
* drm/i915: Defer removing fence register tracking to rpm wakeupChris Wilson2019-02-081-30/+32
* drm/i915: Update DSPCNTR gamma/csc bits during crtc_enable()Ville Syrjälä2019-02-082-0/+21
* drm/i915: Disable pipe gamma when C8 pixel format is usedVille Syrjälä2019-02-083-1/+13
* drm/i915: Turn off pipe CSC when it's not neededVille Syrjälä2019-02-081-2/+8
* drm/i915: Turn off pipe gamma when it's not neededVille Syrjälä2019-02-081-2/+53
* drm/i915: Track pipe csc enable in crtc stateVille Syrjälä2019-02-085-9/+29
* drm/i915: Track pipe gamma enable/disable in crtc stateVille Syrjälä2019-02-084-25/+88
* drm/i915: Populate gamma_mode for all platformsVille Syrjälä2019-02-083-18/+66
* drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debugJosé Roberto de Souza2019-02-075-93/+113
* drm/i915: HDCP state handling in ddi_update_pipeRamalingam C2019-02-071-0/+7
* drm/i915: Update DRIVER_DATE to 20190207Rodrigo Vivi2019-02-071-2/+2
* drm/i915: Move LUT programming to happen after vblank waitsVille Syrjälä2019-02-072-30/+42
* drm/i915: Split color mgmt based on single vs. double buffered registersVille Syrjälä2019-02-074-35/+46
* drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()Ville Syrjälä2019-02-071-16/+20
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