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2018-03-06drm/i915/gvt: Fix check error on hws_pga_write() fail messageZhenyu Wang1-4/+4
2018-03-06drm/i915/gvt: Fix one indent errorZhenyu Wang1-1/+1
2018-03-06drm/i915/gvt: Fix check error on fence mmio handlerZhenyu Wang1-2/+4
2018-03-06drm/i915/gvt: Fix check error of vgpu create failure messageZhenyu Wang1-1/+1
2018-03-06drm/i915/gvt: Fix vGPU sched timeslice calculation warningZhenyu Wang1-3/+2
2018-03-06drm/i915/gvt: remove gvt max port definitionZhenyu Wang1-3/+1
2018-03-06drm/i915/gvt: Fix one gvt_vgpu_error() use in dmabuf.cZhenyu Wang1-1/+1
2018-03-06drm/i915/gvt: init mmio by lri command in vgpu inhibit contextWeinan Li4-4/+181
2018-03-06drm/i915/gvt: add interface to check if context is inhibitWeinan Li2-10/+16
2018-03-06drm/i915/gvt: add define GEN9_MOCS_SIZEWeinan Li1-6/+8
2018-03-06drm/i915/gvt: Define PTE addr mask with GENMASK_ULLChangbin Du1-3/+3
2018-03-06drm/i915/gvt: Manage shadow pages with radix treeChangbin Du2-27/+27
2018-03-06drm/i915/gvt: Provide generic page_track infrastructure for write-protected pageChangbin Du8-111/+266
2018-03-06drm/i915/gvt: Don't extend page_track to mpt layerChangbin Du2-52/+36
2018-03-06drm/i915/gvt: Rename mpt api {set, unset}_wp_page to {enable, disable}_page_t...Changbin Du3-11/+10
2018-03-06drm/i915/gvt: Rename shadow_page to short name sptChangbin Du2-29/+29
2018-03-06drm/i915/gvt: Rework shadow page management codeChangbin Du3-320/+203
2018-03-06drm/i915/gvt: Refine pte shadowing processChangbin Du1-79/+94
2018-03-06drm/i915/gvt: Use standard pte bit definitionChangbin Du1-11/+11
2018-03-06drm/i915/gvt: Factor out intel_vgpu_{get, put}_ppgtt_mm interfaceChangbin Du4-44/+22
2018-03-06drm/i915/gvt: Rename ggtt related functions to be more specificChangbin Du3-15/+15
2018-03-06drm/i915/gvt: Add verbose gtt shadow logsChangbin Du1-0/+18
2018-03-06drm/i915/gvt: Refine ggtt_set_shadow_entryChangbin Du1-11/+8
2018-03-06drm/i915/gvt: Refine ggtt and ppgtt root entry opsChangbin Du2-56/+75
2018-03-06drm/i915/gvt: Refine the intel_vgpu_mm reference managementChangbin Du3-19/+25
2018-03-06drm/i915/gvt: Rework shadow graphic memory management codeChangbin Du6-356/+299
2018-03-05drm/i915: Update DRIVER_DATE to 20180305Joonas Lahtinen1-2/+2
2018-03-03drm/i915/huc: Mark firmware as failed on auth failureMichal Wajdeczko1-10/+18
2018-03-03drm/i915/uc: Introduce intel_uc_suspend|resumeMichal Wajdeczko6-35/+68
2018-03-03drm/i915/execlists: Split spinlock from its irq disabling side-effectChris Wilson1-6/+29
2018-03-03drm/i915/execlists: Move irq state manipulation inside irq disabled regionChris Wilson1-4/+4
2018-03-03drm/i915: Suspend submission tasklets around wedgingChris Wilson2-1/+10
2018-03-02drm/i915: Deduplicate the code to fill the aux message headerVille Syrjälä1-12/+20
2018-03-02drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()Ville Syrjälä1-29/+13
2018-03-02drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/Ville Syrjälä1-9/+9
2018-03-02drm/i915/gen9, gen10: Disable FBC on planes with a misaligned Y-offsetImre Deak1-0/+11
2018-03-02drm/i915: Wedged engine mask makes more sense in hexTvrtko Ursulin1-1/+2
2018-03-02drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure symme...Sagar Arun Kamble7-161/+191
2018-03-02drm/i915: Check for I915_MODE_FLAG_INHERITED before drm_atomic_helper_check_m...Maarten Lankhorst1-15/+8
2018-03-01drm/i915: Replace open-coded wait-for loopChris Wilson1-12/+9
2018-03-01drm/i915/perf: fix perf stream opening lockLionel Landwerlin1-27/+13
2018-03-01drm/i915/icl: Interrupt handlingMika Kuoppala2-1/+241
2018-03-01drm/i915/icl: Prepare for more ringsTvrtko Ursulin6-4/+22
2018-03-01drm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates arrayManasi Navare1-1/+1
2018-02-28drm/i915/dp: move link rate arrays where they're usedJani Nikula1-17/+27
2018-02-28drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()Ville Syrjälä1-8/+5
2018-02-28drm/i915: Don't deref request->ctx inside unlocked print_request()Chris Wilson1-2/+2
2018-02-28drm/i915: Don't mangle the CTM on pre-HSWVille Syrjälä1-4/+12
2018-02-28drm/i915: Rename pipe CSC to use ilk_ prefixVille Syrjälä1-20/+19
2018-02-28drm/i915: Remove the pointless 1:1 matrix copyVille Syrjälä1-8/+9
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