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* hwspinlock: add sun6i hardware spinlock supportWilken Gottwalt2021-05-281-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in most of the sun6i compatible SoCs. This unit provides at least 32 spinlocks in hardware. The implementation supports 32, 64, 128 or 256 32bit registers. A lock can be taken by reading a register and released by writing a 0 to it. This driver supports all 4 spinlock setups, but for now only the first setup (32 locks) seem to exist in available devices. This spinlock unit is shared between all ARM cores and the embedded companion core. All of them can take/release a lock with a single cycle operation. It can be used to sync access to devices shared by the ARM cores and the companion core. There are two ways to check if a lock is taken. The first way is to read a lock. If a 0 is returned, the lock was free and is taken now. If an 1 is returned, the caller has to try again. Which means the lock is taken. The second way is to read a 32bit wide status register where every bit represents one of the 32 first locks. According to the datasheets this status register supports only the 32 first locks. This is the reason the first way (lock read/write) approach is used to be able to cover all 256 locks in future devices. The driver also reports the amount of supported locks via debugfs. Reviewed-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net> Link: https://lore.kernel.org/r/bfd2b97307c2321b15c09683f4bd5e1fcc792f13.1615713499.git.wilken.gottwalt@posteo.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: remove sirf driverArnd Bergmann2021-03-181-11/+0
| | | | | | | | | | | The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210120132537.2285157-1-arnd@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: Simplify KconfigEzequiel Garcia2020-06-211-6/+4
| | | | | | | | | | | Every hwspinlock driver is expected to depend on the hwspinlock core, so it's possible to simplify the Kconfig, factoring out the HWSPINLOCK dependency. Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20200414220943.6203-1-ezequiel@collabora.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: Allow drivers to be built with COMPILE_TESTBaolin Wang2020-03-261-6/+6
| | | | | | | | Allow drivers to be built with COMPILE_TEST. Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/5a95c3de07ef020a4e2f2776fa5adb00637ee387.1581324976.git.baolin.wang7@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock/omap: Add support for TI K3 SoCsSuman Anna2019-06-291-1/+1
| | | | | | | | | | | A HwSpinlock IP is also present on the newer TI K3 AM65x and J721E family of SoCs within the Main NavSS sub-module. Reuse the existing OMAP Hwspinlock driver to extend the support for this IP on K3 AM65x SoCs as well. The IP has slightly different bit-fields in the SYSCONFIG and SYSSTATUS registers. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: add STM32 hwspinlock deviceBenjamin Gaignard2018-12-051-0/+9
| | | | | | | | | This patch adds support of hardware semaphores for stm32mp1 SoC. The hardware block provides 32 semaphores. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock/core: Switch to SPDX license identifierSuman Anna2018-05-241-0/+1
| | | | | | | | Use the appropriate SPDX license identifier in the Hwspinlock core driver source files and drop the previous boilerplate license text. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: Change hwspinlock to a boolBaolin Wang2017-11-071-1/+1
| | | | | | | | Change hwspinlock to a bool in case some drivers will meet dependency issue when hwspinlock is built as a module. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: sprd: Add hardware spinlock driverBaolin Wang2017-05-171-0/+9
| | | | | | | | The Spreadtrum hardware spinlock device can provide hardware assistance for synchronization between the multiple subsystems. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* Make HWSPINLOCK a menuconfig to ease disablingVincent Legoll2017-05-171-11/+6
| | | | | | | | So that there's no need to get into the submenu to disable all related config entries. Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* hwspinlock: add a CSR atlas7 driverWei Chen2015-06-121-0/+12
| | | | | | | | | | | | | | Add hwspinlock support for the CSR atlas7 SoC. The Hardware Spinlock device on atlas7 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A7, CAN bus Cortex-M3 and audio DSP). Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wei Chen <wei.chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock: qcom: Add support for Qualcomm HW Mutex blockBjorn Andersson2015-05-021-0/+12
| | | | | | | | | | | | Add driver for Qualcomm Hardware Mutex block found in many Qualcomm SoCs. Based on initial effort by Kumar Gala <galak@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock: enable OMAP build for AM33xx, AM43xx & DRA7xxSuman Anna2014-07-291-1/+1
| | | | | | | | | | | | | | HwSpinlocks are supported on TI's AM33xx, AM43xx and DRA7xx SoC device families as well. The IPs are identical to that of OMAP4/OMAP5, except for the number of locks. Add a depends on to the above family of SoCs to enable the build support for OMAP hwspinlock driver for any of the above SoC configs. Signed-off-by: Suman Anna <s-anna@ti.com> [small commit log changes] Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock/omap: support OMAP5 as wellVincent Stehlé2013-04-051-1/+1
| | | | | | | | OMAP5 has spinlocks, too. Signed-off-by: Vincent Stehlé <v-stehle@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock/u8500: add hwspinlock driverMathieu J. Poirier2011-09-211-0/+11
| | | | | | | | | | | | | | | Add hwspinlock driver for U8500's Hsem hardware. At this point only HSem's protocol 1 is used (i.e. no interrupts). Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> [ohad@wizery.com: adopt recent hwspin_lock_{un}register API changes] [ohad@wizery.com: set the owner member of the driver] [ohad@wizery.com: mark ->remove() function as __devexit] [ohad@wizery.com: write commit log] [ohad@wizery.com: small cleanups] Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock/core: simplify KconfigOhad Ben-Cohen2011-09-211-9/+7
| | | | | | | | | | | Simplify hwspinlock's Kconfig by making the global CONFIG_HWSPINLOCK entry invisible; users will just select it when needed. This also prepares the ground for adding hwspinlock support for other platforms (the 'depends on ARCH_OMAP4' was rather hideous, and while we're at it, a dedicated menu is added). Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
* hwspinlock: depend on OMAP4Ohad Ben-Cohen2011-03-191-0/+1
| | | | | | | | Currently only OMAP4 supports hwspinlocks, so don't bother asking anyone else. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* drivers: hwspinlock: add OMAP implementationSimon Que2011-02-171-0/+9
| | | | | | | | | | | | | | | | | | | | | Add hwspinlock support for the OMAP4 Hardware Spinlock device. The Hardware Spinlock device on OMAP4 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP). [ohad@wizery.com: adapt to hwspinlock framework, tidy up] Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Krishnamoorthy, Balaji T <balajitk@ti.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
* drivers: hwspinlock: add frameworkOhad Ben-Cohen2011-02-171-0/+13
Add a platform-independent hwspinlock framework. Hardware spinlock devices are needed, e.g., in order to access data that is shared between remote processors, that otherwise have no alternative mechanism to accomplish synchronization and mutual exclusion operations. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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