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* memory: Add NVIDIA Tegra memory controller supportThierry Reding2014-12-041-1087/+523
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory controller on NVIDIA Tegra exposes various knobs that can be used to tune the behaviour of the clients attached to it. Currently this driver sets up the latency allowance registers to the HW defaults. Eventually an API should be exported by this driver (via a custom API or a generic subsystem) to allow clients to register latency requirements. This driver also registers an IOMMU (SMMU) that's implemented by the memory controller. It is supported on Tegra30, Tegra114 and Tegra124 currently. Tegra20 has a GART instead. The Tegra SMMU operates on memory clients and SWGROUPs. A memory client is a unidirectional, special-purpose DMA master. A SWGROUP represents a set of memory clients that form a logical functional unit corresponding to a single device. Typically a device has two clients: one client for read transactions and one client for write transactions, but there are also devices that have only read clients, but many of them (such as the display controllers). Because there is no 1:1 relationship between memory clients and devices the driver keeps a table of memory clients and the SWGROUPs that they belong to per SoC. Note that this is an exception and due to the fact that the SMMU is tightly integrated with the rest of the Tegra SoC. The use of these tables is discouraged in drivers for generic IOMMU devices such as the ARM SMMU because the same IOMMU could be used in any number of SoCs and keeping such tables for each SoC would not scale. Acked-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* iommu: Add iommu_map_sg() functionOlav Haugan2014-11-041-0/+1
| | | | | | | | | | | | | | | | | | | Mapping and unmapping are more often than not in the critical path. map_sg allows IOMMU driver implementations to optimize the process of mapping buffers into the IOMMU page tables. Instead of mapping a buffer one page at a time and requiring potentially expensive TLB operations for each page, this function allows the driver to map all pages in one go and defer TLB maintenance until after all pages have been mapped. Additionally, the mapping operation would be faster in general since clients does not have to keep calling map API over and over again for each physically contiguous chunk of memory that needs to be mapped to a virtually contiguous region. Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu: Make of_device_id array constKiran Padwal2014-09-251-1/+1
| | | | | | | Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/tegra: Convert to iommu_capable() API functionJoerg Roedel2014-09-251-4/+3
| | | | | Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* Merge tag 'cleanup-for-3.17' of ↵Linus Torvalds2014-08-081-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "This merge window brings a good size of cleanups on various platforms. Among the bigger ones: - Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have lacked active support for quite a while, and after asking around nobody showed interest in keeping them around. If needed, they could be resurrected in the future but it's more likely that we would prefer reintroduction of them as DT and multiplatform-enabled platforms instead. - OMAP4 controller code register define diet. They defined a lot of registers that were never actually used, etc. - Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate) to drivers/soc so it can be shared with 64-bit code. This also converts them over to traditional driver models where possible. - Removal of legacy gpio-samsung driver, since the last users have been removed (moved to pinctrl) Plus a bunch of smaller changes for various platforms that sort of dissapear in the diffstat for the above. clps711x cleanups, shmobile header file refactoring/moves for multiplatform friendliness, some misc cleanups, etc" * tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits) drivers: CCI: Correct use of ! and & video: clcd-versatile: Depend on ARM video: fix up versatile CLCD helper move MAINTAINERS: Add sdhci-st file to ARCH/STI architecture ARM: EXYNOS: Fix build breakge with PM_SLEEP=n MAINTAINERS: Remove Kirkwood ARM: tegra: Convert PMC to a driver soc/tegra: fuse: Set up in early initcall ARM: tegra: Always lock the CPU reset vector ARM: tegra: Setup CPU hotplug in a pure initcall soc/tegra: Implement runtime check for Tegra SoCs soc/tegra: fuse: fix dummy functions soc/tegra: fuse: move APB DMA into Tegra20 fuse driver soc/tegra: Add efuse and apbmisc bindings soc/tegra: Add efuse driver for Tegra ARM: tegra: move fuse exports to soc/tegra/fuse.h ARM: tegra: export apb dma readl/writel ARM: tegra: Use a function to get the chip ID ARM: tegra: Sort includes alphabetically ARM: tegra: Move includes to include/soc/tegra ...
| * ARM: tegra: Move includes to include/soc/tegraThierry Reding2014-07-171-1/+2
| | | | | | | | | | | | | | In order to not clutter the include/linux directory with SoC specific headers, move the Tegra-specific headers out into a separate directory. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | iommu: Constify struct iommu_opsThierry Reding2014-07-071-1/+1
|/ | | | | | | | This structure is read-only data and should never be modified. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/tegra-smmu: Staticize tegra_smmu_pm_opsSachin Kamat2013-11-011-1/+1
| | | | | | | | 'tegra_smmu_pm_ops' is used only in this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/tegra: Print phys_addr_t using %paThierry Reding2013-09-241-1/+1
| | | | | | | | | | | When enabling LPAE on ARM, phys_addr_t becomes 64 bits wide and printing a variable of that type using a simple %x format specifier causes the compiler to complain. Change the format specifier to %pa, which is used specifically for variables of type phys_addr_t. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* tegra: simplify use of devm_ioremap_resourceJulia Lawall2013-08-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
*-. Merge branches 'iommu/fixes', 'x86/vt-d', 'x86/amd', 'ppc/pamu', 'core' and ↵Joerg Roedel2013-05-021-2/+3
|\ \ | | | | | | | | | 'arm/tegra' into next
| | * iommu/tegra: Fix printk formats for dma_addr_tVarun Sethi2013-05-021-1/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | Fix printk formats for dma_addr_t: drivers/iommu/tegra-smmu.c: In function 'smmu_iommu_iova_to_phys': >> drivers/iommu/tegra-smmu.c:774:2: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'dma_addr_t' [-Wformat] -- drivers/iommu/tegra-gart.c: In function 'gart_iommu_iova_to_phys': >> drivers/iommu/tegra-gart.c:298:3: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'dma_addr_t' [-Wformat] Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API.Varun Sethi2013-04-021-1/+1
|/ | | | | | | | This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2013-02-271-12/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs pile (part one) from Al Viro: "Assorted stuff - cleaning namei.c up a bit, fixing ->d_name/->d_parent locking violations, etc. The most visible changes here are death of FS_REVAL_DOT (replaced with "has ->d_weak_revalidate()") and a new helper getting from struct file to inode. Some bits of preparation to xattr method interface changes. Misc patches by various people sent this cycle *and* ocfs2 fixes from several cycles ago that should've been upstream right then. PS: the next vfs pile will be xattr stuff." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (46 commits) saner proc_get_inode() calling conventions proc: avoid extra pde_put() in proc_fill_super() fs: change return values from -EACCES to -EPERM fs/exec.c: make bprm_mm_init() static ocfs2/dlm: use GFP_ATOMIC inside a spin_lock ocfs2: fix possible use-after-free with AIO ocfs2: Fix oops in ocfs2_fast_symlink_readpage() code path get_empty_filp()/alloc_file() leave both ->f_pos and ->f_version zero target: writev() on single-element vector is pointless export kernel_write(), convert open-coded instances fs: encode_fh: return FILEID_INVALID if invalid fid_type kill f_vfsmnt vfs: kill FS_REVAL_DOT by adding a d_weak_revalidate dentry op nfsd: handle vfs_getattr errors in acl protocol switch vfs_getattr() to struct path default SET_PERSONALITY() in linux/elf.h ceph: prepopulate inodes only when request is aborted d_hash_and_lookup(): export, switch open-coded instances 9p: switch v9fs_set_create_acl() to inode+fid, do it before d_instantiate() 9p: split dropping the acls from v9fs_set_create_acl() ...
| * tegra: don't wank with d_find_alias()Al Viro2013-02-261-9/+3
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * new helper: file_inode(file)Al Viro2013-02-231-3/+1
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | Merge tag 'iommu-updates-v3.9' of ↵Linus Torvalds2013-02-261-32/+43
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU Updates from Joerg Roedel: "Besides some fixes and cleanups in the code there are three more important changes to point out this time: * New IOMMU driver for the ARM SHMOBILE platform * An IOMMU-API extension for non-paging IOMMUs (required for upcoming PAMU driver) * Rework of the way the Tegra IOMMU driver accesses its registetrs - register windows are easier to extend now. There are also a few changes to non-iommu code, but that is acked by the respective maintainers." * tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (23 commits) iommu/tegra: assume CONFIG_OF in SMMU driver iommu/tegra: assume CONFIG_OF in gart driver iommu/amd: Remove redundant NULL check before dma_ops_domain_free(). iommu/amd: Initialize device table after dma_ops iommu/vt-d: Zero out allocated memory in dmar_enable_qi iommu/tegra: smmu: Fix incorrect mask for regbase iommu/exynos: Make exynos_sysmmu_disable static ARM: mach-shmobile: r8a7740: Add IPMMU device ARM: mach-shmobile: sh73a0: Add IPMMU device ARM: mach-shmobile: sh7372: Add IPMMU device iommu/shmobile: Add iommu driver for Renesas IPMMU modules iommu: Add DOMAIN_ATTR_WINDOWS domain attribute iommu: Add domain window handling functions iommu: Implement DOMAIN_ATTR_PAGING attribute iommu: Check for valid pgsize_bitmap in iommu_map/unmap iommu: Make sure DOMAIN_ATTR_MAX is really the maximum iommu/tegra: smmu: Change SMMU's dependency on ARCH_TEGRA iommu/tegra: smmu: Use helper function to check for valid register offset iommu/tegra: smmu: Support variable MMIO ranges/blocks iommu/tegra: Add missing spinlock initialization ...
| * | iommu/tegra: assume CONFIG_OF in SMMU driverStephen Warren2013-02-191-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * | iommu/tegra: smmu: Fix incorrect mask for regbaseHiroshi Doyu2013-02-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This fixes kernel crash because of BUG() in register address validation. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * | iommu/tegra: smmu: Use helper function to check for valid register offsetJoerg Roedel2013-02-051-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | Do not repeat the checking loop in the read and write functions. Use a single helper function for that check and call it in both accessors. Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * | iommu/tegra: smmu: Support variable MMIO ranges/blocksHiroshi Doyu2013-02-051-25/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Presently SMMU registers are located in discontiguous 3 blocks. They are interleaved by MC registers. Ideally SMMU register blocks should be in an independent one block, but it is too late to change this H/W design. In the future Tegra chips over some generations, it is expected that some of register block "size" can be extended towards the end and also more new register blocks will be added at most a few blocks. The starting address of each existing block won't change. This patch allocates multiple number of register blocks dynamically based on the info passed from DT. Those ranges are verified in the accessors{read,write}. This may sacrifice some performance because a new accessors prevents compiler optimization of a fixed size register offset calculation. Since SMMU register accesses are not so frequent, this would be acceptable. This patch is necessary to unify "tegra-smmu.ko" over some Tegra SoC generations. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * | iommu/tegra: Add missing spinlock initializationSami Liedes2013-02-041-1/+2
| |/ | | | | | | | | | | | | | | Fix tegra_smmu_probe() to initialize client_lock spinlocks in per-address-space structures. Signed-off-by: Sami Liedes <sliedes@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* / iommu: Convert to devm_ioremap_resource()Thierry Reding2013-01-251-3/+4
|/ | | | | | | | | | | | Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Drivers: iommu: remove __dev* attributes.Greg Kroah-Hartman2013-01-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Omar Ramirez Luna <omar.luna@linaro.org> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Bharat Nihalani <bnihalani@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'iommu-updates-v3.8' of ↵Linus Torvalds2012-12-201-4/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "A few new features this merge-window. The most important one is probably, that dma-debug now warns if a dma-handle is not checked with dma_mapping_error by the device driver. This requires minor changes to some architectures which make use of dma-debug. Most of these changes have the respective Acks by the Arch-Maintainers. Besides that there are updates to the AMD IOMMU driver for refactor the IOMMU-Groups support and to make sure it does not trigger a hardware erratum. The OMAP changes (for which I pulled in a branch from Tony Lindgren's tree) have a conflict in linux-next with the arm-soc tree. The conflict is in the file arch/arm/mach-omap2/clock44xx_data.c which is deleted in the arm-soc tree. It is safe to delete the file too so solve the conflict. Similar changes are done in the arm-soc tree in the common clock framework migration. A missing hunk from the patch in the IOMMU tree will be submitted as a seperate patch when the merge-window is closed." * tag 'iommu-updates-v3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (29 commits) ARM: dma-mapping: support debug_dma_mapping_error ARM: OMAP4: hwmod data: ipu and dsp to use parent clocks instead of leaf clocks iommu/omap: Adapt to runtime pm iommu/omap: Migrate to hwmod framework iommu/omap: Keep mmu enabled when requested iommu/omap: Remove redundant clock handling on ISR iommu/amd: Remove obsolete comment iommu/amd: Don't use 512GB pages iommu/tegra: smmu: Move bus_set_iommu after probe for multi arch iommu/tegra: gart: Move bus_set_iommu after probe for multi arch iommu/tegra: smmu: Remove unnecessary PTC/TLB flush all tile: dma_debug: add debug_dma_mapping_error support sh: dma_debug: add debug_dma_mapping_error support powerpc: dma_debug: add debug_dma_mapping_error support mips: dma_debug: add debug_dma_mapping_error support microblaze: dma-mapping: support debug_dma_mapping_error ia64: dma_debug: add debug_dma_mapping_error support c6x: dma_debug: add debug_dma_mapping_error support ARM64: dma_debug: add debug_dma_mapping_error support intel-iommu: Prevent devices with RMRRs from being placed into SI Domain ...
| * iommu/tegra: smmu: Move bus_set_iommu after probe for multi archHiroshi Doyu2012-11-281-1/+1
| | | | | | | | | | | | | | | | For a single image to support multiple SoCs(GART/SMMU). Reported-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * iommu/tegra: smmu: Remove unnecessary PTC/TLB flush allHiroshi Doyu2012-11-281-3/+1
| | | | | | | | | | | | | | | | | | smmu_flush_regs() does TLB/PTC flush all when freeing a second level page table. This isn't necessay at all since each pte entry has been already maintained by address in the above flush_ptc_and_tlb(). Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* | Merge tag 'v3.7-rc7' into next/cleanupOlof Johansson2012-11-261-0/+1
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | Merging in mainline back to next/cleanup since it has collected a few conflicts between fixes going upstream and some of the cleanup patches. Git doesn't auto-resolve some of them, and they're mostly noise so let's take care of it locally. Conflicts are in: arch/arm/mach-omap2/omap_hwmod_44xx_data.c arch/arm/plat-omap/i2c.c drivers/video/omap2/dss/dss.c Signed-off-by: Olof Johansson <olof@lixom.net>
| * iommu/tegra-smmu.c: fix dentry reference leak in smmu_debugfs_stats_show().Cyril Roelandt2012-11-171-0/+1
| | | | | | | | | | | | | | Call to d_find_alias() needs a corresponding dput(). Signed-off-by: Cyril Roelandt <tipecaml@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* | ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/Stephen Warren2012-11-051-2/+1
| | | | | | | | | | | | | | | | | | We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | iommu: tegra: remove include of <mach/iomap.h>Stephen Warren2012-11-051-1/+0
|/ | | | | | | | Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/tegra: smmu: Fix deadly typoHiro Sugawara2012-10-241-1/+1
| | | | | | | | | Fix a deadly typo in macro definition. Cc: stable@vger.kernel.org Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', ↵Joerg Roedel2012-10-021-13/+248
|\ | | | | | | | | | | | | 'x86/amd', 'x86/vt-d' and 'x86/amd-irq-remapping' into next Conflicts: drivers/iommu/amd_iommu_init.c
| * dma: tegra: move smmu.h into SMMU driverStephen Warren2012-09-181-1/+40
| | | | | | | | | | | | | | | | | | | | | | There's no need to place these defines into arch/arm/mach-tegra/include/. Move them into the SMMU driver to clean up mach-tegra, as a pre-requisite for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * iommu/tegra: smmu: Use debugfs_create_dir for directoryHiroshi Doyu2012-09-181-17/+35
| | | | | | | | | | | | | | | | | | | | The commit c3b1a35 "debugfs: make sure that debugfs_create_file() gets used only for regulars" doesn't allow to use debugfs_create_file() for dir. Keep debugfs data in smmu_device instead of directory's i_private. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * iommu/tegra: smmu: debugfs for TLB/PTC statisticsHiroshi Doyu2012-08-031-12/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add debugfs entries to collect TLB/PTC statistics. $ echo "reset" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "on" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "off" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ cat /sys/kernel/debug/smmu/mc/{tlb,ptc} hit:0014910c miss:00014d22 The above format is: hit:<HIT count><SPC>miss:<MISS count><SPC><CR+LF> fscanf(fp, "hit:%lx miss:%lx", &hit, &miss); Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/tegra: smmu: Fix error initial value at domain_initHiroshi Doyu2012-08-031-1/+1
| | | | | | | | | | | | | | | | err initial value should be -EAGAIN. Otherwise 2nd iteration always fails in the case as[0] is occupied. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/tegra: smmu: Cleanup with lesser nestHiroshi Doyu2012-08-031-5/+8
| | | | | | | | | | | | | | Small clean up with lesser nest for readability. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/tegra: remove invalid reference to list iterator variableJulia Lawall2012-08-031-1/+1
|/ | | | | | | | | | | | | | | | If list_for_each_entry, etc complete a traversal of the list, the iterator variable ends up pointing to an address at an offset from the list head, and not a meaningful structure. Thus this value should not be used after the end of the iterator. Replace c->dev by dev, which is the value that c->dev has been compared to. This problem was found using Coccinelle (http://coccinelle.lip6.fr/). Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
*---. Merge branches 'iommu/fixes', 'x86/amd', 'groups', 'arm/tegra' and ↵Joerg Roedel2012-07-231-131/+154
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'api/domain-attr' into next Conflicts: drivers/iommu/iommu.c include/linux/iommu.h
| | | * iommu/tegra: Implement DOMAIN_ATTR_GEOMETRY attributeHiroshi DOYU2012-07-111-0/+5
| | |/ | |/| | | | | | | | | | | | | | | | Implement the attribute for the Tegra IOMMU drivers. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: Don't call alloc_pdir with as->lockJoerg Roedel2012-07-171-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of taking as->lock before calling alloc_pdir() and releasing it in that function to allocate memory, just take the lock only in the alloc_pdir function and run the loop without any lock held. This simplifies the complicated lock->unlock->alloc->lock->unlock sequence into alloc->lock->unlock. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Fix unsleepable memory allocation at alloc_pdir()Hiroshi DOYU2012-07-171-32/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | alloc_pdir() is called from smmu_iommu_domain_init() with spin_lock held. memory allocations in alloc_pdir() had to be atomic. Instead of converting into atomic allocation, this patch once releases a lock, does the allocation, holds the lock again and then sees if it's raced or not in order to avoid introducing mutex and preallocation. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reported-by: Chris Wright <chrisw@sous-sol.org> Cc: Chris Wright <chrisw@sous-sol.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Remove unnecessary sanity check at alloc_pdir()Hiroshi DOYU2012-07-171-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | alloc_pdir() is called with smmu->as[?].pdir_page == NULL. No need to check pdir_page again inside alloc_pdir(). Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Fix uninitialized var warningHiroshi Doyu2012-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | For the compiler warning, uninitizlized var when getting value by a pointer. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Remove unnecessary cleanups with devm_*()Hiroshi Doyu2012-06-251-31/+6
| | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary cleanup procedures with devm_*() functions. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Simplify allocation at onceHiroshi Doyu2012-06-251-20/+9
| | | | | | | | | | | | | | | | | | | | | | | | To simplify the code, alloc necessary data at once. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/tegra: smmu: Add device tree support for SMMUHiroshi Doyu2012-06-251-54/+95
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The necessary info is expected to pass from DT. For more precise resource reservation, there shouldn't be any overlapping of register range between SMMU and MC. SMMU register offset needs to be calculated correctly, based on its register bank. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* / iommu/tegra: smmu: Fix unsleepable memory allocationHiroshi DOYU2012-07-021-2/+2
|/ | | | | | | | | | | allo_pdir() is called in smmu_iommu_domain_init() with spin_lock held. memory allocations in it have to be atomic/unsleepable. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reported-by: Chris Wright <chrisw@sous-sol.org> Acked-by: Chris Wright <chrisw@sous-sol.org> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/tegra: smmu: Print device name correctlyHiroshi DOYU2012-04-161-1/+1
| | | | | | | | Print an attached device name correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>