summaryrefslogtreecommitdiffstats
path: root/drivers/irqchip/irq-gic-v2m.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* irqchip/gic: Return IRQ_SET_MASK_OK_DONE in the set_affinity methodMarc Zyngier2016-02-191-13/+1
| | | | | | | | | | | | | | Moving an SPI around doesn't require any extra work from the rest of the stack, and specially not for MSI-generated SPIs. It is then worth returning IRQ_SET_MASK_OK_DONE instead of IRQ_SET_MASK_OK, and simplify the other irqchips that rely on this behaviour (GICv2m and Marvell's ODMI controller). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1455894029-17270-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip/gicv2m: Miscellaneous fixes for v2m resources and SPI rangesSuravee Suthikulpanit2015-12-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contain fixes for v2m resources and SPI ranges: * Fix off-by-one error when set up v2m resource end range in gicv2m_acpi_init(). * Fix the off-by-one print error for SPI range. * Use %pR to properly print resource range information. Both ACPI and DT should now print: GICv2m: range[mem 0xe1180000-0xe1180fff], SPI[64:319] Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Catalin Marinas <Catalin.Marinas@arm.com> Cc: <hanjun.guo@linaro.org> Cc: <tomasz.nowicki@linaro.org> Cc: <graeme.gregory@linaro.org> Cc: <dhdang@apm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <marc.zyngier@arm.com> Cc: <jason@lakedaemon.net> Cc: <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1450830263-28914-1-git-send-email-Suravee.Suthikulpanit@amd.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'irq/gic-v2m-acpi' of ↵Thomas Gleixner2015-12-291-22/+141
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull another round of GIC changes from Marc: ACPI support for GIV-v2m
| * irqchip/gic-v2m: acpi: Introducing GICv2m ACPI supportSuravee Suthikulpanit2015-12-211-1/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces gicv2m_acpi_init(), which uses information in MADT GIC MSI frames structure to initialize GICv2m driver. It also exposes gicv2m_init() function, which simplifies callers to a single GICv2m init function. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Duc Dang <dhdang@apm.com> Acked-by: Rafael J. Wysocki <rjw@rjwysocki.net> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| * irqchip/gic-v2m: Refactor to prepare for ACPI supportSuravee Suthikulpanit2015-12-211-21/+32
| | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the struct device_node with struct fwnode_handle since this structure is common between DT and ACPI. It also refactors gicv2m_init_one() to prepare for ACPI support. The only functional change is removing the node name from pr_info. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* | irqchip/gic-v2m: Fix of_node refcount on errorMarc Zyngier2015-12-161-1/+1
|/ | | | | | | | | On the error path, the v2m drivers drops the refcount on the parent node instead of doing it on the node that generated the error. Humph... Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* irqchip/gic-v2m: Add support for multiple MSI framesMarc Zyngier2015-10-151-46/+78
| | | | | | | | | | | | | | | | The GICv2m driver is so far limited to a single MSI frame, but nothing prevents an implementation from having several of them. This patch expands the driver to enumerate all frames, keeping the first one as the canonical identifier for the MSI domains. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Duc Dang <dhdang@apm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1444822037-16983-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqdomain/msi: Use fwnode instead of of_nodeMarc Zyngier2015-10-131-2/+3
| | | | | | | | | | | | | | | | | | | | | | | As we continue to push of_node towards the outskirts of irq domains, let's start tackling the case of msi_create_irq_domain and its little friends. This has limited impact in both PCI/MSI, platform MSI, and a few drivers. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-17-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: Convert all alloc/xlate users from of_node to fwnodeMarc Zyngier2015-10-131-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | Since we now have a generic data structure to express an interrupt specifier, convert all hierarchical irqchips that are OF based to use a fwnode_handle as part of their alloc and xlate (which becomes translate) callbacks. As most of these drivers have dependencies (they exchange IRQ specifiers), change them all in a single, massive patch... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqdomain: Use irq_domain_get_of_node() instead of direct field accessMarc Zyngier2015-10-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The struct irq_domain contains a "struct device_node *" field (of_node) that is almost the only link between the irqdomain and the device tree infrastructure. In order to prepare for the removal of that field, convert all users to use irq_domain_get_of_node() instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip/gic-v2m: Add workaround for APM X-Gene GICv2m erratumDuc Dang2015-10-091-0/+22
| | | | | | | | | | | | | | | | | APM X-Gene GICv2m implementation has an erratum where the MSI data needs to be the offset from the spi_start in order to trigger the correct MSI interrupt. This is different from the standard GICv2m implementation where the MSI data is the absolute value within the range from spi_start to (spi_start + num_spis) of each v2m frame. This patch reads MSI_IIDR register (present in all GICv2m implementations) to identify X-Gene GICv2m implementation and apply workaround to change the data portion of MSI vector. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* irqchip/GICv2m: Fix GICv2m build warning on 32 bitsPavel Fedin2015-09-151-2/+2
| | | | | | | | | | | | | | | | | | | | | After GICv2m was enabled for 32-bit ARM kernel, a warning popped up: drivers/irqchip/irq-gic-v2m.c: In function gicv2m_compose_msi_msg: drivers/irqchip/irq-gic-v2m.c:100:2: warning: right shift count >= width of type [enabled by default] msg->address_hi = (u32) (addr >> 32); ^ This patch fixes it by using proper macros for splitting up the value. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Stuart Yoder <stuart.yoder@freescale.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442142873-20213-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip/GICv2m: Add platform MSI supportMarc Zyngier2015-07-301-8/+25
| | | | | | | | | | | | | | | | | | | In order to support non-PCI MSI with GICv2m, add the minimal required entry points for the MSI domain, which is actually almost nothing (we just use the defaults provided by the core code). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-18-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip/GICv2m: Get rid of struct msi_controllerMarc Zyngier2015-07-301-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | GICv2m only uses the msi_controller structure as a way to match the host bridge with its MSI HW, and thus the msi_domain. But now that we can directly associate an msi_domain with a device, there is no use keeping this msi_controller around. Just remove all traces of msi_controller from the driver. Also tag the inner (non-PCI) domain with DOMAIN_BUS_NEXUS. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-17-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: gic-v2m: Add support for ARM GICv2m MSI(-X) doorbellSuravee Suthikulpanit2014-11-261-0/+333
ARM GICv2m specification extends GICv2 to support MSI(-X) with a new register frame. This allows a GICv2 based system to support MSI with minimal changes. Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> [maz: converted the driver to use stacked irq domains, updated changelog] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1416941243-7181-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 15:46:39 +0100