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2015-10-22drm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)Stephane Viau6-14/+133
This change adds the basic MDP5 support for MSM8996. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/mdp: Add Software Pixel Extension supportStephane Viau2-31/+128
In order to produce an image, the scalar needs to be fed extra pixels. These top/bottom/left/right values depend on a various of factors, including resolution, scaling type, phase step and initial phase. Pixel Extension are programmed by hardware in most targets - and can be overwritten by software. For some targets (e.g.: msm8996), software *must* program those registers. In order to ease this computation, let's always use bilinear filters, which are easier to program from kernel. Eventually, all of these values will come down from user space for better quality. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/mdp5: Use the newly introduced enum mdp_component_typeStephane Viau1-12/+13
When calculating phase steps, let's use the same enum mdp_component_type in order to ease the readability; 0/1 indexes are a bit confusing and we now have explicit values to index this type of arrays. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/hdmi: Add basic HDMI support for msm8996Stephane Viau2-3/+17
The HDMI controller is new in MDP5 v1.7. As of now, this change doesn't reflect the novelty and only adds the basics so the probe gets triggered. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/mdp5: Avoid printing error messages for optional clocksStephane Viau2-12/+18
The current behavior is to try to get optional clocks and print a dev_err message in case of failure. This looks rather confusing and may increase with the amount of optional clocks. We may need a cleaner way to handle per-device clocks but in the meantime, let's reduce the amount of dev_err messages during the probe. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm: Fix IOMMU clean up path in case msm_iommu_new() failsStephane Viau2-0/+9
msm_iommu_new() can fail and this change makes sure that we detect the failure and free the allocated domain before going any further. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/mdp5: remove the cfg pointer from SMP structStephane Viau2-5/+5
We want to make sure we control all the information being passed down to SMP block. Having access to the cfg pointer here may create bad things in the future. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHYHai Li1-4/+2
The current settings for 28nm PHY data lane CFG4 registers do not work with certain panels. This change is to modify them to hw recommended values. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm: msm: dsi: Don't attempt changing voltage of switchesBjorn Andersson2-2/+2
In some configurations the supplies are voltage switches and not LDOs, making the set voltage call to fail. Check with the regulator framework if the supply can change voltage before attempting. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm: update generated headersRob Clark14-114/+359
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-21drm/amdgpu: change VM size default to 64GBChristian König1-2/+2
That's still small enough to not waste to much memory on PD/PTs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add Stoney pci idsSamuel Li1-0/+2
Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: update the core VI support for StoneySamuel Li3-7/+34
Add core VI enablement for Stoney. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add VCE support for Stoney (v2)Samuel Li2-2/+8
Stoney is VCE 3.x single. v2: Stoney is single pipe like Fiji Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add UVD support for StoneySamuel Li1-0/+5
Stoney is UVD 6.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add GFX support for Stoney (v2)Samuel Li1-18/+382
Stoney is GFX 8.1. v2: update to latest golden settings Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add SDMA support for Stoney (v2)Samuel Li1-0/+28
Stoney is SDMA 3.x. v2: update to latest golden register settings Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add DCE support for StoneySamuel Li1-1/+18
Stoney is DCE 11.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: Update SMC/DPM for StoneySamuel Li2-16/+65
Stoney is SMC 8.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add GMC support for StoneySamuel Li1-0/+12
Stoney is GMC 8.x. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/amdgpu: add Stoney chip familySamuel Li2-0/+2
Stoney is based on Carrizo with some IP upgrades. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm: rcar-du: Add support for the R8A7794 DULaurent Pinchart3-3/+29
The R8A7794 DU has a fixed output routing configuration with one RGB output per CRTC and thus lacks the RGB output routing register field. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-10-21drm: rcar-du: Add support for the R8A7793 DULaurent Pinchart2-6/+10
The R8A7793 DU is identical to the R8A7791 and thus only requires a new DT compatible string. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-10-21drm/amdgpu: fix the broken vm->mutex V2Chunming Zhou3-46/+19
fix the vm->mutex and ww_mutex confilcts. vm->mutex is always token first, then ww_mutex. V2: remove unneccessary checking for pt bo. Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743 Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()Junwei Zhang3-10/+4
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove the exclusive lockChristian König6-42/+8
Finally getting rid of it. Signed-off-by: Christian König <christian.koenig@amd.com>
2015-10-21drm/amdgpu: remove old lockup detection infrastructureChristian König15-169/+1
It didn't worked to well anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-21drm: fix trivial typosGeliang Tang4-4/+4
s/regsiter/register/ Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21drm/vc4: Allow vblank to be disabledDerek Foreman1-0/+1
Signed-off-by: Derek Foreman <derekf@osg.samsung.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2015-10-21drm/vc4: Use the fbdev_cma helpersDerek Foreman3-3/+31
Keep the fbdev_cma pointer around so we can use it on hotplog and close to ensure the frame buffer console is in a useful state. Signed-off-by: Derek Foreman <derekf@osg.samsung.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2015-10-21drm/vc4: Add KMS support for Raspberry Pi.Eric Anholt14-0/+2920
This is enough for fbcon and bringing up X using xf86-video-modesetting. It doesn't support the 3D accelerator or power management yet. v2: Drop FB_HELPER select thanks to Archit's patches. Do manual init ordering instead of using the .load hook. Structure registration more like tegra's, but still using the typical "component" code. Drop no-op hooks for atomic_begin and mode_fixup() now that they're optional. Drop sentinel in Makefile. Fix minor style nits I noticed on another reread. v3: Use the new bcm2835 clk driver to manage pixel/HSM clocks instead of having a fixed video mode. Use exynos-style component driver matching instead of devicetree nodes to list the component driver instances. Rename compatibility strings to say bcm2835, and distinguish pv0/1/2. Clean up some h/vsync code, and add in interlaced mode setup. Fix up probe/bind error paths. Use bitops.h macros for vc4_regs.h v4: Include i2c.h, allow building under COMPILE_TEST, drop msleep now that other bugs have been fixed, add timeouts to cpu_relax() loops, rename hpd-gpio to hpd-gpios. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>