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* irqchip: Remove sirfsoc driverArnd Bergmann2021-01-211-134/+0
| | | | | | | | | | | The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210120133008.2421897-3-arnd@kernel.org
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner2019-05-211-2/+1
| | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* irqchip/sirfsoc: Fix sparse warnings on __iomemBen Dooks2016-06-131-3/+8
| | | | | | | | | | | | | | | | | | | Fix warnings from sparse about casting to __iomem from non anotated variable: drivers/irqchip/irq-sirfsoc.c:56:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:56:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:56:47: got void *host_data drivers/irqchip/irq-sirfsoc.c:97:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:97:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:97:47: got void *host_data drivers/irqchip/irq-sirfsoc.c:109:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:109:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:109:47: got void *host_data Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465301910-2308-1-git-send-email-ben.dooks@codethink.co.uk Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: Prepare for local stub header removalJoel Porquet2015-07-111-1/+1
| | | | | | | | | | | | | | | | | The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip/sirfsoc: Fix generic chip allocation wreckageThomas Gleixner2015-07-111-23/+25
| | | | | | | | | | | | | | | | | | | irq_alloc_domain_generic_chips() can only be called once for an irqdomain. The sirfsoc init calls it twice and because the return value is not checked it does not notice the wreckage. The code works by chance because the first call already allocates two chips and therefor the second call to sirfsoc_alloc_gc() operates on the proper generic chip instance. Use a single call and setup the two chips in the obvious correct way. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Barry Song <baohua@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Olof Johansson <olof@lixom.net> Link: http://lkml.kernel.org/r/20150706101543.470696950@linutronix.de
* irqchip: sirfsoc: Convert to handle_domain_irqMarc Zyngier2014-09-031-4/+2
| | | | | | | | Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1409047421-27649-13-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* irqchip: sirf: fix one minor checkpatch issueBin Shi2014-05-121-1/+2
| | | | | | | | | | fix "line line over 80 characters" for the below: static int __init sirfsoc_irq_init(struct device_node *np, struct device_node *parent) the users of the codes - key customers really care about that. Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
* irqchip: Remove asmlinkage from static functionsStephen Boyd2014-03-121-1/+1
| | | | | | | | | | | | | | | | | | | | LTO patches add __visible to the asmlinkage define, causing compilation warnings like: drivers/irqchip/irq-gic.c:283:1: warning: 'externally_visible' attribute have effect only on public objects [-Wattributes] Drop asmlinkage here to avoid such warnings. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: khilman@linaro.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Josh Cartwright <joshc@codeaurora.org> Cc: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1393980030-17770-1-git-send-email-sboyd@codeaurora.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* irqchip: sirf: set IRQ_LEVEL status_flagsBarry Song2014-01-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | SiRF internal interrupts are using level trigger. we need to tell the irq core this information. otherwise, we might get some problems as below 1. disable_irq(n) here irq core will mark the disabled flag but still keep the irq enabled due to involved lazy-disable 2. doing someting after disable_irq(n) in step 2, if one interrupt n comes, irq core will mark it as pending and mask the HW interrupt really. we name the coming interrupt as "X". 3. enable_irq(n) this will unmask the interrupt, so the level-trigger HW interrupt will come again, irq_handler will enter as "E1". after that, irq core will also check whether irq n is pending, if yes, and pending interrupt is not level-trigger, irq core will execute the pending irq_handler. so if we don't set the IRQ_LEVEL flag here, irq core will execute pending X again as "E2", but actually the pending interrupt has been handled by "E1". that makes a level-trigger HW interrupt is executed twice. here we fix the issue to avoid redundant interrupt overload. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* irqchip: sirf: move from legacy mode to linear irqdomainBarry Song2013-08-291-8/+10
| | | | | | | | | | | | | | | | | | | | | | the series of patches for irqdomain core in 3.11 has broken sirf irq which uses legacy mapping. all users fail in the new kernel while setupping irq. this patch moves to linear irqdomain and drop old legacy irqdomain codes since we don't need it any more, and at the same time, it also fixes the broken interrupts of sirfsoc in 3.11. on the other hand, we actually only have 64 interrupt sources for prima2 and atlas6, but there are 128 interrupt souces for marco which uses GIC. in the legacy codes, sirf gpio also uses legacy irqdomain, so to make gpio interrupt mapping not depend on the prima2/atlas6/marco an use unified marco,we enlarge prima2/atlas6 interrupt number to 128. here we don't need this workaround any more as sirf gpio also moved to linear mode before. so we move SIRFSOC_NUM_IRQS back to 64 too. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: sirf: move irq driver to drivers/irqchipArnd Bergmann2013-03-251-0/+126
This updates the irqchip drier for prima2 to the current practices by moving it into drivers/irqchip and integrating it into the irqchip_init infrastructure. We also now use a linear irq domain as a preparation for sparse IRQ suport. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>