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* Merge tag 'irq-core-2024-09-16' of ↵Linus Torvalds2024-09-1725-520/+1014
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "Core: - Remove a global lock in the affinity setting code The lock protects a cpumask for intermediate results and the lock causes a bottleneck on simultaneous start of multiple virtual machines. Replace the lock and the static cpumask with a per CPU cpumask which is nicely serialized by raw spinlock held when executing this code. - Provide support for giving a suffix to interrupt domain names. That's required to support devices with subfunctions so that the domain names are distinct even if they originate from the same device node. - The usual set of cleanups and enhancements all over the place Drivers: - Support for longarch AVEC interrupt chip - Refurbishment of the Armada driver so it can be extended for new variants. - The usual set of cleanups and enhancements all over the place" * tag 'irq-core-2024-09-16' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (73 commits) genirq: Use cpumask_intersects() genirq/cpuhotplug: Use cpumask_intersects() irqchip/apple-aic: Only access system registers on SoCs which provide them irqchip/apple-aic: Add a new "Global fast IPIs only" feature level irqchip/apple-aic: Skip unnecessary enabling of use_fast_ipi dt-bindings: apple,aic: Document A7-A11 compatibles irqdomain: Use IS_ERR_OR_NULL() in irq_domain_trim_hierarchy() genirq/msi: Use kmemdup_array() instead of kmemdup() genirq/proc: Change the return value for set affinity permission error genirq/proc: Use irq_move_pending() in show_irq_affinity() genirq/proc: Correctly set file permissions for affinity control files genirq: Get rid of global lock in irq_do_set_affinity() genirq: Fix typo in struct comment irqchip/loongarch-avec: Add AVEC irqchip support irqchip/loongson-pch-msi: Prepare get_pch_msi_handle() for AVECINTC irqchip/loongson-eiointc: Rename CPUHP_AP_IRQ_LOONGARCH_STARTING LoongArch: Architectural preparation for AVEC irqchip LoongArch: Move irqchip function prototypes to irq-loongson.h irqchip/loongson-pch-msi: Switch to MSI parent domains softirq: Remove unused 'action' parameter from action callback ...
| * irqchip/apple-aic: Only access system registers on SoCs which provide themKonrad Dybcio2024-09-041-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from the A11 (T8015) SoC, Apple introuced system registers for fast IPI and UNCORE PMC control. These sysregs do not exist on earlier A7-A10 SoCs and trying to access them results in an instant crash. Restrict sysreg access within the AIC driver to configurations where use_fast_ipi is true to allow AIC to function properly on A7-A10 SoCs. Co-developed-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/all/20240901034143.12731-5-towinchenmi@gmail.com
| * irqchip/apple-aic: Add a new "Global fast IPIs only" feature levelNick Chan2024-09-041-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with the A11 (T8015) SoC, Apple began using arm64 sysregs for fast IPIs. However, on A11, there is no such things as "Local" fast IPIs, as the SYS_IMP_APL_IPI_RR_LOCAL_EL1 register does not seem to exist. Add a new feature level, used by the compatible "apple,t8015-aic", controlled by a static branch key named use_local_fast_ipi. When use_fast_ipi is true and use_local_fast_ipi is false, fast IPIs are used but all IPIs goes through the register SYS_IMP_APL_IPI_RR_GLOBAL_EL1, as "global" IPIs. Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/all/20240901034143.12731-4-towinchenmi@gmail.com
| * irqchip/apple-aic: Skip unnecessary enabling of use_fast_ipiNick Chan2024-09-041-3/+1
| | | | | | | | | | | | | | | | | | use_fast_ipi is true by default and there is no need to "enable" it. Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/all/20240901034143.12731-3-towinchenmi@gmail.com
| * irqchip/loongarch-avec: Add AVEC irqchip supportTianyang Zhang2024-08-236-2/+449
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the advanced extended interrupt controllers (AVECINTC). This feature will allow each core to have 256 independent interrupt vectors and MSI interrupts can be independently routed to any vector on any CPU. The whole topology of irqchips in LoongArch machines looks like this if AVECINTC is supported: +-----+ +-----------------------+ +-------+ | IPI | --> | CPUINTC | <-- | Timer | +-----+ +-----------------------+ +-------+ ^ ^ ^ | | | +---------+ +----------+ +---------+ +-------+ | EIOINTC | | AVECINTC | | LIOINTC | <-- | UARTs | +---------+ +----------+ +---------+ +-------+ ^ ^ | | +---------+ +---------+ | PCH-PIC | | PCH-MSI | +---------+ +---------+ ^ ^ ^ | | | +---------+ +---------+ +---------+ | Devices | | PCH-LPC | | Devices | +---------+ +---------+ +---------+ ^ | +---------+ | Devices | +---------+ Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Co-developed-by: Liupu Wang <wangliupu@loongson.cn> Signed-off-by: Liupu Wang <wangliupu@loongson.cn> Co-developed-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823104337.25577-2-zhangtianyang@loongson.cn
| * irqchip/loongson-pch-msi: Prepare get_pch_msi_handle() for AVECINTCTianyang Zhang2024-08-231-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Loongson-3C6000 and higher systems with AVECINTC irqchip, there may be multiple PCI segments, but only one PCH-MSI irq domain. In this case, let get_pch_msi_handle() return the first domain handle. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Co-developed-by: Liupu Wang <wangliupu@loongson.cn> Signed-off-by: Liupu Wang <wangliupu@loongson.cn> Co-developed-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823104337.25577-1-zhangtianyang@loongson.cn
| * irqchip/loongson-eiointc: Rename CPUHP_AP_IRQ_LOONGARCH_STARTINGHuacai Chen2024-08-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rename CPUHP_AP_IRQ_LOONGARCH_STARTING to CPUHP_AP_IRQ_EIOINTC_STARTING because the upcoming AVECINTC irqchip driver will introduce a new state and so both are clearly identifiable. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823103936.25092-3-zhangtianyang@loongson.cn
| * LoongArch: Move irqchip function prototypes to irq-loongson.hHuacai Chen2024-08-238-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | Some irqchip functions are only for internal use by irqchip drivers, so move their prototypes from asm/irq.h to drivers/irqchip/irq-loongson.h. All related driver files include the new irq-loongson.h. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240823103936.25092-1-zhangtianyang@loongson.cn
| * irqchip/loongson-pch-msi: Switch to MSI parent domainsHuacai Chen2024-08-202-35/+24
| | | | | | | | | | | | | | | | | | | | | | | | Remove the global PCI/MSI irqdomain implementation and provide the required MSI parent functionality by filling in msi_parent_ops, so the PCI/MSI code can detect the new parent and setup per-device MSI domains. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240815112608.26925-2-zhangtianyang@loongson.cn
| * irqchip/mbigen: Simplify code logic with for_each_child_of_node_scoped()Zhang Zekun2024-08-081-17/+7
| | | | | | | | | | | | | | | | | | | | | | for_each_child_of_node_scoped() handles the device_node automaticlly, so switching over to it removes the device node cleanups and allows to return directly from the loop. Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240808031552.3156-1-zhangzekun11@huawei.com
| * irqchip/armada-370-xp: Use mpic_is_ipi_available() in mpic_of_init()Marek Behún2024-08-081-1/+1
| | | | | | | | | | | | | | | | | | mpic_of_init() contains the last case where the open coded IPI support condition needs to be replaced with mpic_is_ipi_available() to keep the code consistent. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Allow mapping only per-CPU interruptsMarek Behún2024-08-081-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On platforms where MPIC is not the top-level interrupt controller the driver currently only supports handling of the per-CPU interrupts (the first 29 interrupts). This is obvious from the code of mpic_handle_cascade_irq(), which reads only one cause register. Bound the number of available interrupts in the interrupt domain to 29 for these platforms. The corresponding device-trees refer only to per-CPU interrupts via MPIC, the other interrupts are referred to via GIC. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt ↵Marek Behún2024-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | cause register Use MPIC_PER_CPU_IRQS_NR (29) bound instead of BITS_PER_LONG (32) when iterating the bits of the per-CPU interrupt cause register, since there are only 29 per-CPU interrupts. The top 3 bits are always zero anyway. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Fix reenabling last per-CPU interruptMarek Behún2024-08-081-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of per-CPU interrupts is 29 (0 to 28). This is described by the constant MPIC_MAX_PER_CPU_IRQS, set to 28 (the maximum per-CPU interrupt). Commit 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interrupts at resume time") used the constant incorrectly in the for-loop, it used the operator < instead of <=, causing it to iterate only the first 28 interrupts (0 to 27), ignoring the last, 28th, per-CPU interrupt. To avoid this kind of confusions, fix this issue by renaming the constant to MPIC_PER_CPU_IRQS_NR and set it to 29, the number of per-CPU IRQs. Update its use in mpic_is_percpu_irq() accordingly. Fixes: 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interrupts at resume time") Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: <stable+noautosel@kernel.org> # The 29th interrupt is not used in any device-tree
| * irqchip/armada-370-xp: Dynamically allocate the driver private structureMarek Behún2024-08-081-5/+11
| | | | | | | | | | | | | | | | | | Dynamically allocate the driver private structure. This concludes the conversion of this driver to modern style. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Pass around the driver private structureMarek Behún2024-08-081-45/+70
| | | | | | | | | | | | | | | | | | | | | | | | In continuation of converting the driver to modern style, drop the global pointer to the driver private structure and instead pass it around the functions and callbacks, wherever possible. (There are 3 cases where it is not possible: mpic_cascaded_starting_cpu() and the syscore operations mpic_suspend() and mpic_resume()). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Put MSI doorbell limits into the mpic structureMarek Behún2024-08-081-22/+22
| | | | | | | | | | | | | | | | | | | | Put the MSI doorbell limits msi_doorbell_start, msi_doorbell_size and msi_doorbell_mask into the driver private structure and get rid of the corresponding functions. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Put static variables into driver private structureMarek Behún2024-08-081-101/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for converting the driver to modern style put all the interrupt controller private static variables into driver private structure. Access to these variables changes as: main_int_base mpic->base per_cpu_int_base mpic->per_cpu mpic_domain mpic->domain parent_irq mpic->parent_irq ... Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Put __init attribute after return type in mpic_ipi_init()Marek Behún2024-08-081-1/+1
| | | | | | | | | | | | | | | | | | For consistency with the rest of the driver, put the __init attribute after the return type of the mpic_ipi_init() function. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Add the __init attribute to mpic_msi_init()Marek Behún2024-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | Add the __init attribute to the mpic_msi_init() function. It is only called from the device initializer, and so can be dropped after boot is complete. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Drop msi_doorbell_end()Marek Behún2024-08-081-7/+0
| | | | | | | | | | | | | | | | | | Drop the msi_doorbell_end() function and related constants, it is not used anymore. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/armada-370-xp: Drop IPI_DOORBELL_START and rename IPI_DOORBELL_ENDMarek Behún2024-08-081-7/+6
| | | | | | | | | | | | | | | | | | Drop IPI_DOORBELL_START since it is not used and rename IPI_DOORBELL_END to IPI_DOORBELL_NR. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * irqchip/gic-v4.1: Replace bare number with ID_AA64PFR0_EL1_GIC_V4P1Anshuman Khandual2024-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | Use ID_AA64PFR0_EL1_GIC_V4P1 instead of '3' in gic_cpuif_has_vsgi() to check for the GIC version. Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/all/20240802085601.1824057-1-anshuman.khandual@arm.com
| * irqchip: Remove asmlinkage for handlers registered with set_handle_irq()Jinjie Ruan2024-07-3010-16/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All architectures with use set_handle_irq() to set the root chip interrupt handler call that handler from C code, so there's no need for these handlers to be marked asmlinkage. Remove asmlinkage for all handlers registered with set_handle_irq(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/all/20240729112606.1581732-1-ruanjinjie@huawei.com
| * irqchip/armada-370-xp: Print error and return error code on initialization ↵Marek Behún2024-07-301-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | failure Print error and return error code on main / IPI / MSI domain initialization failure. Use WARN_ON() instead of BUG_ON(). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-11-kabel@kernel.org
| * irqchip/armada-370-xp: Refactor initial memory regions mappingMarek Behún2024-07-301-19/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the initial memory regions mapping: - put into its own function - return error numbers on failure - use WARN_ON() instead of BUG_ON() Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-10-kabel@kernel.org
| * irqchip/armada-370-xp: Use u32 type instead of unsigned long where possiebleMarek Behún2024-07-301-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For consistency across the driver, use the u32 type instead of unsigned long for holding register values and return value of cpu_logical_map(). One exception is when the variable is referenced for passing into for_each_set_bit(), in which case it has to be unsigned long. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-9-kabel@kernel.org
| * irqchip/armada-370-xp: Rename variable for consistencyMarek Behún2024-07-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | Rename the variable holding the cause register to "cause" in mpic_handle_cascade_irq(). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-8-kabel@kernel.org
| * irqchip/armada-370-xp: Drop redundant continueMarek Behún2024-07-301-3/+1
| | | | | | | | | | | | | | | | | | | | Drop redundant continue from mpic_handle_irq(). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-7-kabel@kernel.org
| * irqchip/armada-370-xp: Simplify mpic_reenable_percpu() and mpic_resume()Marek Behún2024-07-301-9/+3
| | | | | | | | | | | | | | | | | | | | | | Refactor the mpic_reenable_percpu() and mpic_resume() functions to make them a little bit simpler. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-5-kabel@kernel.org
| * irqchip/armada-370-xp: Use consistent name for struct irq_data variablesMarek Behún2024-07-301-13/+13
| | | | | | | | | | | | | | | | | | | | Always use variable name "d" for struct irq_data *, for consistency. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-4-kabel@kernel.org
| * irqchip/armada-370-xp: Use consistent types when iterating interruptsMarek Behún2024-07-301-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | When iterating, use either the irq_hw_number_t type or the unsigned int type for the iterator variable, depending on whether the variable represents HW IRQ number or whether it is added to a IRQ number. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-3-kabel@kernel.org
| * irqchip/armada-370-xp: Use consistent variable names for hwirqsMarek Behún2024-07-301-28/+28
| | | | | | | | | | | | | | | | | | | | | | Use consistent variable names for hwirqs: when iterating, use "i", otherwise use "hwirq". Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20240711160907.31012-2-kabel@kernel.org
| * irqchip/armada-370-xp: Refactor handling IPI interruptsMarek Behún2024-07-301-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the handling of IPI interrupts - put into own function mpic_handle_ipi_irq(), similar to mpic_handle_msi_irq() - rename the variable holding the doorbell cause register to "cause" - retype and rename the variable holding the IPI HW IRQ number to "irq_hw_number_t i" Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-11-kabel@kernel.org
| * irqchip/armada-370-xp: Refactor mpic_handle_msi_irq() codeMarek Behún2024-07-301-20/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the mpic_handle_msi_irq() function to make it simpler: - drop the function arguments, they are not needed - rename the variable holding the doorbell cause register to "cause" - rename the iterating variable to "i" - use for_each_set_bit() (requires retyping "cause" to unsigned long) Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-10-kabel@kernel.org
| * irqchip/armada-370-xp: Use FIELD_GET() and named register constantMarek Behún2024-07-301-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Use FIELD_GET() and named register mask constant when reading the number of supported interrupts / current interrupt. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-9-kabel@kernel.org
| * irqchip/armada-370-xp: Don't read number of supported interrupts multiple timesMarek Behún2024-07-301-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Use mpic_domain::hwirq_max at runtime instead of reading the same value over and over from the MPIC_INT_CONTROL register. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-8-kabel@kernel.org
| * irqchip/armada-370-xp: Change symbol prefixes to mpicMarek Behún2024-07-301-163/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change symbol prefixes from armada_370_xp_ or others to mpic_. The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-7-kabel@kernel.org
| * irqchip/armada-370-xp: Improve indentationMarek Behún2024-07-301-30/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some blank lines and other indentation improvements. Checkpatch now stops complaining. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-6-kabel@kernel.org
| * irqchip/armada-370-xp: Simplify ipi_resume() codeMarek Behún2024-07-301-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | Refactor the ipi_resume() function to drop one indentation level. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-5-kabel@kernel.org
| * irqchip/armada-370-xp: Use !virq instead of virq == 0 in conditionMarek Behún2024-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Use !virq instead of virq == 0 when checking for availability of the virq. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-4-kabel@kernel.org
| * irqchip/armada-370-xp: Use unsigned int type for virqsMarek Behún2024-07-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The return type of irq_find_mapping() and irq_linear_revmap() is unsigned int. Use the unsigned int type for the variables storing the return value. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-3-kabel@kernel.org
| * irqchip/armada-370-xp: Rename variable for consistencyMarek Behún2024-07-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename the irq variable to virq in the ipi_resume() function for consistency with the rest of the code. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240711115748.30268-2-kabel@kernel.org
| * irqchip/armada-370-xp: Declare iterators in for loopMarek Behún2024-07-301-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | Where possible, declare iterators in for cycle. This is possible since kernel uses -std=gnu11. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/all/20240708151801.11592-11-kabel@kernel.org
| * irqchip/armada-370-xp: Change to SPDX license identifierMarek Behún2024-07-301-4/+1
| | | | | | | | | | | | | | | | | | | | | | Change the license identifier to SPDX style. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/all/20240708151801.11592-10-kabel@kernel.org
| * irqchip/armada-370-xp: Simplify is_percpu_irq() codeMarek Behún2024-07-301-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the code in the is_percpu_irq() function. Instead of if (condition) return true; return false; simply return condition. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240708151801.11592-9-kabel@kernel.org
| * irqchip/armada-370-xp: Use correct type for cpu variableMarek Behún2024-07-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | Use unsigned int instead of int for variable storing the cpu number. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/all/20240708151801.11592-8-kabel@kernel.org
| * irqchip/armada-370-xp: Change register constants prefix to MPIC_Marek Behún2024-07-301-79/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the long ARMADA_370_XP_ prefix in register constants (ARMADA_375_ in one case) to MPIC_. The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/all/20240708151801.11592-7-kabel@kernel.org
| * irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitionsMarek Behún2024-07-301-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Drop parentheses where not needed and add them where it makes sense in register constant definitions. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/all/20240708151801.11592-6-kabel@kernel.org
| * irqchip/armada-370-xp: Use BIT() and GENMASK() macrosMarek Behún2024-07-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | Use the BIT() and GENMASK() macros where appropriate. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/all/20240708151801.11592-5-kabel@kernel.org
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 09:15:51 +0100