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path: root/drivers/media/i2c (follow)
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* media: ccs: Add support for obtaining C-PHY configuration from firmwareSakari Ailus2020-12-071-0/+4
* media: ccs-pll: Print pixel ratesSakari Ailus2020-12-071-0/+5
* media: ccs: Print written register valuesSakari Ailus2020-12-071-0/+4
* media: ccs: Add support for DDR OP SYS and OP PIX clocksSakari Ailus2020-12-071-1/+8
* media: ccs-pll: Add support for DDR OP system and pixel clocksSakari Ailus2020-12-072-20/+46
* media: ccs: Dual PLL supportSakari Ailus2020-12-072-3/+51
* media: ccs-pll: Add trivial dual PLL supportSakari Ailus2020-12-072-22/+196
* media: ccs-pll: Separate VT divisor limit calculation from the restSakari Ailus2020-12-071-27/+37
* media: ccs-pll: Fix VT post-PLL divisor calculationSakari Ailus2020-12-071-5/+7
* media: ccs-pll: Make VT divisors 16-bitSakari Ailus2020-12-071-26/+25
* media: ccs-pll: Rework bounds checksSakari Ailus2020-12-072-57/+95
* media: ccs-pll: Print relevant information on PLL treeSakari Ailus2020-12-071-19/+66
* media: ccs-pll: Better separate OP and VT sub-tree calculationSakari Ailus2020-12-071-23/+31
* media: ccs-pll: Check for derating and overrating, support non-derating sensorsSakari Ailus2020-12-073-29/+64
* media: ccs-pll: Split off VT subtree calculationSakari Ailus2020-12-071-124/+131
* media: ccs-pll: Add C-PHY supportSakari Ailus2020-12-071-9/+26
* media: ccs-pll: Add sanity checksSakari Ailus2020-12-071-0/+9
* media: ccs-pll: Add support flexible OP PLL pixel clock dividerSakari Ailus2020-12-073-8/+23
* media: ccs-pll: Support two cycles per pixel on OP domainSakari Ailus2020-12-073-6/+16
* media: ccs-pll: Add support for extended input PLL clock dividerSakari Ailus2020-12-073-1/+7
* media: ccs-pll: Add support for decoupled OP domain calculationSakari Ailus2020-12-074-19/+23
* media: ccs: Add support for lane speed modelSakari Ailus2020-12-071-1/+10
* media: ccs-pll: Add support for lane speed modelSakari Ailus2020-12-072-11/+31
* media: ccs-pll: Use explicit 32-bit unsigned typeSakari Ailus2020-12-071-2/+2
* media: ccs-pll: Fix check for PLL multiplier upper boundSakari Ailus2020-12-071-2/+1
* media: ccs-pll: Fix comment on check against maximum PLL multiplierSakari Ailus2020-12-071-1/+1
* media: ccs-pll: Avoid overflow in pre-PLL divisor lower bound searchSakari Ailus2020-12-071-2/+9
* media: ccs-pll: Fix condition for pre-PLL divider lower boundSakari Ailus2020-12-071-1/+1
* media: ccs-pll: Begin calculation from OP system clock frequencySakari Ailus2020-12-071-8/+4
* media: ccs-pll: Use the BIT macroSakari Ailus2020-12-071-2/+5
* media: ccs-pll: Document the structs in the header as well as the functionSakari Ailus2020-12-071-0/+89
* media: ccs-pll: Move the flags field down, away from 8-bit fieldsSakari Ailus2020-12-071-1/+1
* media: ccs-pll: Differentiate between CSI-2 D-PHY and C-PHYSakari Ailus2020-12-073-3/+4
* media: ccs-pll: Remove parallel bus supportSakari Ailus2020-12-072-15/+4
* media: ccs-pll: End search if there are no better values availableSakari Ailus2020-12-071-2/+8
* media: ccs-pll: Use correct VT divisor for calculating VT SYS divisorSakari Ailus2020-12-071-2/+2
* media: ccs-pll: Split limits and PLL configuration into front and back partsSakari Ailus2020-12-073-188/+209
* media: ccs-pll: Don't use div_u64 to divide a 32-bit numberSakari Ailus2020-12-071-1/+1
* media: ccs: Fix return value from probeSakari Ailus2020-12-071-1/+1
* media: ccs: avoid printing an uninitialized variableArnd Bergmann2020-12-071-2/+1
* media: i2c: fix an uninitialized error codeArnd Bergmann2020-12-071-1/+3
* media: ccs: Use all regulatorsSakari Ailus2020-12-032-8/+24
* media: ccs: Remove unnecessary delays from power-up sequenceSakari Ailus2020-12-031-2/+0
* media: ccs: Use longer pre-I²C sleep for CCS compliant devicesSakari Ailus2020-12-031-1/+6
* media: ccs: Wrap long lines, unwrap short onesSakari Ailus2020-12-031-27/+18
* media: ccs: Clean up runtime PM usageSakari Ailus2020-12-031-5/+2
* media: ccs: Use static data read-only registersSakari Ailus2020-12-031-4/+60
* media: ccs: Add support for manufacturer regs from sensor and module filesSakari Ailus2020-12-033-22/+97
* media: ccs: Allow range in between I²C retriesSakari Ailus2020-12-031-2/+2
* media: ccs: Change my e-mail addressSakari Ailus2020-12-038-11/+11
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