linux - linux

	Commit message (Expand)	Author	Files	Lines
2013-08-28	clk: get matching entry under lock in of_clk_init()	Alex Elder	1	-2/+2
2013-08-28	clk: sunxi: fix initialization of basic clocks	Emilio López	1	-8/+3
2013-08-27	clk: samsung: pll: Use new registration method for PLL6552 and PLL6553	Tomasz Figa	2	-98/+13
2013-08-26	clk: sunxi: Add Allwinner A20 gates	Maxime Ripard	3	-0/+116
2013-08-26	clk: sunxi: Add A31 clocks support	Maxime Ripard	3	-0/+213
2013-08-26	clk: sunxi: Allow to specify the divider width from the dividers data	Maxime Ripard	1	-11/+13
2013-08-26	clk: sunxi: Rename the structure to prepare the addition of sun6i	Maxime Ripard	1	-27/+27
2013-08-26	clk: sunxi: fix initialization of basic clocks	Emilio López	1	-8/+3
2013-08-26	clk: sunxi: Add A10s gates	Maxime Ripard	3	-0/+93
2013-08-23	clk: mvebu: add missing iounmap	Jisheng Zhang	2	-7/+15
2013-08-22	clk: handle NULL struct clk gracefully	Mike Turquette	1	-1/+7
2013-08-20	clk/zynq/pll: Use #defines for fbdiv min/max values	Soren Brinkmann	1	-4/+7
2013-08-20	clk/zynq/pll: Fix documentation for PLL register function	Soren Brinkmann	1	-1/+7
2013-08-19	clk: clk-mux: implement remuxing on set_rate	James Hogan	3	-0/+53
2013-08-19	clk: add CLK_SET_RATE_NO_REPARENT flag	James Hogan	18	-276/+388
2013-08-19	clk: add support for clock reparent on set_rate	James Hogan	4	-66/+132
2013-08-19	clk: move some parent related functions upwards	James Hogan	1	-104/+104
2013-08-19	clk: abstract parent cache	James Hogan	2	-7/+15
2013-08-16	clk: export fixed-factor, gate & mux registration	Mike Turquette	3	-0/+5
2013-08-16	clk: clk-divider: Export clk_register_divider()	Fabio Estevam	1	-0/+2
2013-08-16	clk: fixed-rate: Export clk_fixed_rate_register()	Stephen Boyd	1	-0/+1
2013-08-09	clk: prima2: Fix incorrect placement of __initdata	Sachin Kamat	1	-1/+1
2013-08-09	clk: tegra30: Fix incorrect placement of __initdata	Sachin Kamat	1	-1/+1
2013-08-09	clk: tegra20: Fix incorrect placement of __initdata	Sachin Kamat	1	-1/+1
2013-08-09	clk: tegra114: Fix incorrect placement of __initdata	Sachin Kamat	1	-1/+1
2013-08-09	clk: exynos5440: Fix incorrect placement of __initdata	Sachin Kamat	1	-1/+1
2013-08-09	clk: exynos5420: Fix incorrect placement of __initdata	Sachin Kamat	1	-3/+3
2013-08-09	clk: exynos5250: Fix incorrect placement of __initdata	Sachin Kamat	1	-5/+5
2013-08-09	clk: exynos4: Fix incorrect placement of __initdata	Sachin Kamat	1	-5/+5
2013-08-09	clk: s2mps11: Add support for s2mps11	Yadwinder Singh Brar	3	-0/+280
2013-08-09	clk: exynos5420: Make exynos5420_plls static	Sachin Kamat	1	-1/+1
2013-08-09	clk: exynos5250: Make exynos5250_plls static	Sachin Kamat	1	-1/+1
2013-08-09	clk: exynos4: Make exynos4_plls static	Sachin Kamat	1	-1/+1
2013-08-09	clk: mxs: clk-imx23: Include <linux/clk/mxs.h>	Fabio Estevam	1	-0/+1
2013-08-09	clk: sunxi: Fix checking return value of clk_register_[composite\|factors]	Axel Lin	1	-2/+2
2013-08-09	Documentation: clk: Fix a trivial typo in audss	Sachin Kamat	1	-1/+1
2013-08-05	clk: samsung: Add clock driver for S3C64xx SoCs	Tomasz Figa	4	-0/+731
2013-08-05	clk: samsung: pll: Add support for PLL6552 and PLL6553	Tomasz Figa	2	-0/+164
2013-08-05	clk: mux: Add support for read-only muxes.	Tomasz Figa	2	-1/+11
2013-08-02	clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC	Vikas Sajjan	2	-0/+40
2013-08-02	clk: samsung: Reorder MUX registration for mout_vpllsrc	Vikas Sajjan	1	-1/+6
2013-08-02	clk: samsung: Add set_rate() clk_ops for PLL36xx	Vikas Sajjan	1	-1/+78
2013-08-02	clk: samsung: Add set_rate() clk_ops for PLL35xx	Yadwinder Singh Brar	1	-1/+104
2013-08-02	clk: samsung: Add support to register rate_table for samsung plls	Yadwinder Singh Brar	6	-28/+75
2013-08-02	clk: samsung: Remove unused pll registeration code for pll35xx and pll36xx	Yadwinder Singh Brar	2	-74/+0
2013-08-02	clk: samsung: Migrate exynos5420 to use common samsung_clk_register_pll()	Yadwinder Singh Brar	1	-28/+58
2013-08-02	clk: samsung: Migrate exynos4 to use common samsung_clk_register_pll()	Yadwinder Singh Brar	1	-14/+26
2013-08-02	clk: samsung: Migrate exynos5250 to use common samsung_clk_register_pll()	Yadwinder Singh Brar	1	-19/+41
2013-08-02	clk: samsung: Define a common samsung_clk_register_pll()	Yadwinder Singh Brar	3	-0/+125
2013-08-02	clk: samsung: Introduce a common samsung_clk_pll struct	Yadwinder Singh Brar	1	-18/+12