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* memory: fsl_ifc: populate child nodes of buses and mfd devicesLi Yang2022-04-061-2/+1
| | | | | | | | | | | | | | Commit 3e25f800afb8 ("memory: fsl_ifc: populate child devices without relying on simple-bus") was trying to replace the "simple-bus" compatible with explicit bus populate in the driver. But of_platform_populate() only populates child nodes of ifc without populating child buses and child mfd devices residing under ifc. Change it to of_platform_default_populate() to fix the problem. Fixes: 3e25f800afb8 ("memory: fsl_ifc: populate child devices without relying on simple-bus") Signed-off-by: Li Yang <leoyang.li@nxp.com> Link: https://lore.kernel.org/r/20220307204118.19093-1-leoyang.li@nxp.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* memory: atmel-ebi: Fix missing of_node_put in atmel_ebi_probeMiaoqian Lin2022-04-041-6/+17
| | | | | | | | | | | The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: 87108dc78eb8 ("memory: atmel-ebi: Enable the SMC clock if specified") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220309110144.22412-1-linmq006@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* memory: renesas-rpc-if: fix platform-device leak in error pathJohan Hovold2022-04-041-1/+9
| | | | | | | | | | | | Make sure to free the flash platform device in the event that registration fails during probe. Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver") Cc: stable@vger.kernel.org # 5.8 Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Johan Hovold <johan@kernel.org> Link: https://lore.kernel.org/r/20220303180632.3194-1-johan@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* Merge tag 'arm-drivers-5.18' of ↵Linus Torvalds2022-03-249-30/+211
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "There are a few separately maintained driver subsystems that we merge through the SoC tree, notable changes are: - Memory controller updates, mainly for Tegra and Mediatek SoCs, and clarifications for the memory controller DT bindings - SCMI firmware interface updates, in particular a new transport based on OPTEE and support for atomic operations. - Cleanups to the TEE subsystem, refactoring its memory management For SoC specific drivers without a separate subsystem, changes include - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP Layerscape SoCs. - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L, and Qualcomm SM8450. - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older NVIDIA Tegra chips" * tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits) ARM: spear: fix typos in comments soc/microchip: fix invalid free in mpfs_sys_controller_delete soc: s4: Add support for power domains controller dt-bindings: power: add Amlogic s4 power domains bindings ARM: at91: add support in soc driver for new SAMA5D29 soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC memory: emif: check the pointer temp in get_device_details() memory: emif: Add check for setup_interrupts dt-bindings: arm: mediatek: mmsys: add support for MT8186 dt-bindings: mediatek: add compatible for MT8186 pwrap soc: mediatek: pwrap: add pwrap driver for MT8186 SoC soc: mediatek: mmsys: add mmsys reset control for MT8186 soc: mediatek: mtk-infracfg: Disable ACP on MT8192 soc: ti: k3-socinfo: Add AM62x JTAG ID soc: mediatek: add MTK mutex support for MT8186 soc: mediatek: mmsys: add mt8186 mmsys routing table soc: mediatek: pm-domains: Add support for mt8186 dt-bindings: power: Add MT8186 power domains soc: mediatek: pm-domains: Add support for mt8195 ...
| * Merge tag 'memory-controller-drv-5.18-2' of ↵Arnd Bergmann2022-03-081-3/+5
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.18, part two 1. TI: Two fixes for TI EMIF driver for quite old error path issues (so for unlikely scenarios). 2. Renesas: Document RZ/V2L SoC in bindings. * tag 'memory-controller-drv-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC memory: emif: check the pointer temp in get_device_details() memory: emif: Add check for setup_interrupts Link: https://lore.kernel.org/r/20220307082552.55719-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * memory: emif: check the pointer temp in get_device_details()Jia-Ju Bai2022-03-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer temp is allocated by devm_kzalloc(), so it should be checked for error handling. Fixes: 7ec944538dde ("memory: emif: add basic infrastructure for EMIF driver") Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com> Link: https://lore.kernel.org/r/20220225132552.27894-1-baijiaju1990@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * memory: emif: Add check for setup_interruptsJiasheng Jiang2022-03-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the potential failure of the devm_request_threaded_irq(), it should be better to check the return value of the setup_interrupts() and return error if fails. Fixes: 68b4aee35d1f ("memory: emif: add interrupt and temperature handling") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Link: https://lore.kernel.org/r/20220224025444.3256530-1-jiasheng@iscas.ac.cn Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | Merge tag 'memory-controller-drv-tegra-5.18' of ↵Arnd Bergmann2022-03-014-12/+124
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.18 - Tegra SoC 1. Correct Tegra20 EMC memory device mask. 2. Minor improvements. * tag 'memory-controller-drv-tegra-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra: Constify struct thermal_cooling_device_ops memory: tegra20-emc: Correct memory device mask memory: tegra30-emc: Print additional memory info Link: https://lore.kernel.org/r/20220228164313.52931-3-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | memory: tegra: Constify struct thermal_cooling_device_opsRikard Falkeborn2022-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only usage of tegra210_emc_cd_ops is to pass its address to devm_thermal_of_cooling_device_register() which is a pointer to const struct thermal_cooling_device_ops. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20211128204158.19544-1-rikard.falkeborn@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * | memory: tegra20-emc: Correct memory device maskDmitry Osipenko2022-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory chip select is swapped when we read mode register, correct it. We didn't have devices that use a single LPDDR chip and both chips are always identical, hence this change is just a minor improvement. Fixes: 131dd9a436d8 ("memory: tegra20-emc: Support matching timings by LPDDR2 configuration") Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211222043215.28237-2-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * | memory: tegra30-emc: Print additional memory infoDmitry Osipenko2022-01-272-10/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Print out memory type and LPDDR2 configuration on Tegra30, making it similar to the memory info printed by the Tegra20 memory driver. This info is useful for debugging purposes. Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # T30 ASUS TF201 LPDDR2 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211222043215.28237-1-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | | Merge tag 'memory-controller-drv-mediatek-5.18' of ↵Arnd Bergmann2022-03-011-2/+52
| |\ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.18 - Mediatek SoC 1. Several updates in the MTK SMI bindings. 2. Add support for MT8186 MTK SMI and improvements in support for MT8195. * tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Enable sleep ctrl safety function for MT8195 memory: mtk-smi: mt8186: Add smi support memory: mtk-smi: Add sleep ctrl function memory: mtk-smi: handle positive return value for clk_bulk_prepare_enable dt-bindings: memory: mediatek: Add mt8186 support dt-bindings: memory: mtk-smi: Correct minItems to 2 for the gals clocks dt-bindings: memory: mtk-smi: No need mediatek,larb-id for mt8167 dt-bindings: memory: mtk-smi: Rename clock to clocks Link: https://lore.kernel.org/r/20220228164313.52931-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | memory: mtk-smi: Enable sleep ctrl safety function for MT8195AngeloGioacchino Del Regno2022-02-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the sleep ctrl function to wait until all the queued commands are executed before suspending the LARBs, like done for MT8186. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com> Link: https://lore.kernel.org/r/20220204125543.1189151-1-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * | memory: mtk-smi: mt8186: Add smi supportYong Wu2022-01-251-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mt8186 SMI support. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113111057.29918-8-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * | memory: mtk-smi: Add sleep ctrl functionYong Wu2022-01-251-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sleep control means that when the larb goes to sleep, we should wait a bit until all the current commands are finished. Thus, when the larb runtime suspends, we need to enable this function to wait until all the existed commands are finished. When the larb resumes, just disable this function. This function only improves the safety of bus. Add a new flag for this function. Prepare for mt8186. Signed-off-by: Anan Sun <anan.sun@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113111057.29918-7-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * | memory: mtk-smi: handle positive return value for clk_bulk_prepare_enableYong Wu2022-01-251-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function clk_bulk_prepare_enable() returns 0 for success or a negative number for error, although the common style for the callers is to check always for any non-zero return value (just like its implementation in clk.h does). Adjust the code to such coding style. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113111057.29918-6-yong.wu@mediatek.com [krzysztof: rewrite commit msg] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: Update of_memory lpddr2 revision-id bindingJulius Werner2022-02-251-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the code parsing the "jedec,lpddr2" device tree binding to use the new `revision-id` property instead of the deprecated `revision-id1` and `revision-id2` properties if available. Signed-off-by: Julius Werner <jwerner@chromium.org> Link: https://lore.kernel.org/r/20220224003421.3440124-3-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: of: parse max-freq propertyKrzysztof Kozlowski2022-02-091-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Passing the memory timings maximum frequency as an unit address was a workaround and instead 'max-freq' is preferred. Look for 'max-freq' first and then fallback to 'reg'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.ahtar@samsung.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-8-krzysztof.kozlowski@canonical.com
| * | memory: brcmstb_dpfe: fix typo in a commentJason Wang2022-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The double `to' in the comment in line 427 is repeated. Remove it from the comment. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Acked-by: Markus Mayer <mmayer@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211212033347.67921-1-wangborong@cdjrlc.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: fsl_ifc: populate child devices without relying on simple-busLi Yang2022-01-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | After we update the binding to not use simple-bus compatible for the controller, we need the driver to populate the child devices explicitly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Link: https://lore.kernel.org/r/20211116211846.16335-3-leoyang.li@nxp.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: mtk-smi: Use ARRAY_SIZE to define MTK_SMI_CLK_NR_MAXAngeloGioacchino Del Regno2022-01-271-2/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | This definition is tied to the number of SMI common clocks (the array mtk_smi_common_clks): improve the definition by using the ARRAY_SIZE macro instead. That will also reduce room for mistakes when updating the aforementioned array in the future. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20211015151557.510726-1-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
* / media: memory: mtk-smi: Get rid of mtk_smi_larb_get/putYong Wu2022-01-281-14/+0
|/ | | | | | | | | | | | | | | | After adding device_link between the iommu consumer and smi-larb, the pm_runtime_get(_sync) of smi-larb and smi-common will be called automatically. we can get rid of mtk_smi_larb_get/put. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Evan Green <evgreen@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> # BPI-R2/MT7623 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
* Merge tag 'mtd/for-5.17' of ↵Linus Torvalds2022-01-111-17/+33
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "MTD core changes: - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl - gen_probe: Use bitmap_zalloc() when applicable - Introduce an expert mode for forensics and debugging purposes - Clear out unregistered devices a bit more - Provide unique name for nvmem device - Remove unused header file <linux/mtd/latch-addr-flash.h> - Fixed breaking list in __mtd_del_partition. MTD device changes: - Warn about failure to unregister mtd device in sst25l, mchp48l640, mchp23k256, and dataflash drivers. Raw NAND core changes: - Export nand_read_page_hwecc_oob_first() GPMC memory controller for OMAP2 NAND controller changes: - Add support for AM64 SoC and allow build on K3 platforms - Use a compatible match table when checking for NAND controller - Use platform_get_irq() to get the interrupt Raw NAND controller changes: - OMAP2 NAND controller: - Document the missing 'rb-gpios' DT property - Drop unused variable - Fix force_8bit flag behaviour for DMA mode - Move to exec_op interface - Use platform_get_irq() to get the interrupt - Renesas: - Add new NAND controller driver with its bindings and MAINTAINERS entry - Onenand: - Remove redundant variable ooblen - MPC5121: - Remove unused variable in ads5121_select_chip() - GPMI: - Add ERR007117 protection for nfc_apply_timings - Remove explicit default gpmi clock setting for i.MX6 - Use platform_get_irq_byname() to get the interrupt - Remove unneeded variable - Ingenic: - JZ4740 needs 'oob_first' read page function - Davinci: - Rewrite function description - Avoid duplicated page read - Don't calculate ECC when reading page SPI NOR core changes: - Add Pratyush as SPI NOR co-maintainer. - Flash parameters initialization was done in a spaghetti way. Clean flash parameters initialization. - Rework the flash_info flags and clarify where one should be used. - Initialize all flash parameters based on JESD216 SFDP where possible. Flash parameters and settings that are SFDP discoverable should not be duplicated via flash_info flags at flash declaration. - Remove debugfs entries that duplicate sysfs entries. SPI NOR manufacturer driver changes: - Use late_init() hook in various drivers to make it clear that those flash parameters are either not declared in the JESD216 SFDP standard, or the SFDP tables which define those flash parameters are not defined by the flash. - Fix mtd size for s3an flashes. - Write 2 bytes when disabling Octal DTR mode: 1 byte long transactions are not allowed in 8D-8D-8D mode. Hyperbus changes: - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on module remove and for missing check for error value in probe" * tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits) mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: core: use 2 data bytes for template ops mtd: spi-nor: Constify part specific fixup hooks mtd: spi-nor: core: Remove reference to spi-nor.c mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3 memory: omap-gpmc: Use a compatible match table when checking for NAND controller memory: omap-gpmc: Add support for GPMC on AM64 SoC dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 memory: omap-gpmc: Use platform_get_irq() to get the interrupt MAINTAINERS: Add an entry for Renesas NAND controller mtd: rawnand: renesas: Add new NAND controller driver dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller mtd: rawnand: gpmi: remove unneeded variable mtd: rawnand: omap2: drop unused variable mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode mtd: rawnand: omap2: Add compatible for AM64 SoC ...
| * memory: omap-gpmc: Use a compatible match table when checking for NAND ↵Roger Quadros2021-12-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | controller As more compatibles can be added to the GPMC NAND controller driver use a compatible match table. Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20211221131757.2030-4-rogerq@kernel.org [krzysztof: remove "is_nand" variable] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * memory: omap-gpmc: Add support for GPMC on AM64 SoCRoger Quadros2021-12-221-10/+30
| | | | | | | | | | | | | | | | | | | | | | | | The TI's AM64 SoC has the GPMC module. Add compatible for it. Traditionally GPMC external addresses have always been mapped to first 1GB physical address. However newer platforms, can have it mapped at different locations. Support this address provision via device tree. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20211221131757.2030-3-rogerq@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * memory: omap-gpmc: Use platform_get_irq() to get the interruptLad Prabhakar2021-12-221-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20211221203916.18588-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
* | Merge tag 'drivers-5.17' of ↵Linus Torvalds2022-01-101-40/+69
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are cleanups and minor bugfixes across several SoC specific drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone, Renesas, ZynqMP Noteworthy new features are: - The op-tee firmware driver gains support for asynchronous notifications from secure-world firmware. - Qualcomm platforms gain support for new SoC types in various drivers: power domain, cache controller, RPM sleep, soc-info - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as well as a new USIv2 driver that handles various types of serial communiction (uart, i2c, spi) - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers, as well as memory controller support for RZ/G2L (R9A07G044). - Apple M1 gains support for the PMGR power management driver" * tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ...
| * | memory: renesas-rpc-if: refactor MOIIO and IOFV macrosWolfram Sang2021-11-221-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Don't use _HIZ macros but also provide a val. This is more consistent with the other macros and, thus, easier to read. Also shorter. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211119110442.4946-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: avoid use of undocumented bitsWolfram Sang2021-11-221-36/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of writing fixed values with undocumented bits which happen to be set on some SoCs, better switch to read-modify-write operations changing only bits which are documented. This is way more future-proof as we don't know yet how these bits may be on upcoming SoCs. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211117093710.14430-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: simplify register updateWolfram Sang2021-11-221-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | No need to open code regmap_update_bits(). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211117102902.20062-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: Silence clang warningLad Prabhakar2021-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch silences the following clang warning: | drivers/memory/renesas-rpc-if.c:253:14: warning: cast to smaller integer | type 'enum rpcif_type' from 'const void *' [-Wvoid-pointer-to-enum-cast] | rpc->type = (enum rpcif_type)of_device_get_match_data(dev); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixes: b04cc0d912eb8 ("memory: renesas-rpc-if: Add support for RZ/G2L") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211121180155.9062-1-prabhakar.mahadev-lad.rj@bp.renesas.com [krzysztof: drop enum rpcif_type cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: Add support for RZ/G2LLad Prabhakar2021-11-161-10/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to the RPC-IF interface found on R-Car Gen3 SoC's. This patch adds a new compatible string for the RZ/G2L family so that the timing values on RZ/G2L can be adjusted. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211025205631.21151-8-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: Drop usage of RPCIF_DIRMAP_SIZE macroLad Prabhakar2021-11-161-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RPCIF_DIRMAP_SIZE may differ on various SoC's. Instead of using RPCIF_DIRMAP_SIZE macro use resource size to get dirmap size which is already part of struct rpcif. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211025205631.21151-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: renesas-rpc-if: Return error in case devm_ioremap_resource() failsLad Prabhakar2021-11-161-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Make sure we return error in case devm_ioremap_resource() fails for dirmap resource. Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211025205631.21151-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
* / memory: mtk-smi: Fix a null dereference for the ostdYong Wu2021-11-251-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We add the ostd setting for mt8195. It introduces a KE for the previous SoC which doesn't have ostd setting. This is the log: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000080 ... pc : mtk_smi_larb_config_port_gen2_general+0x64/0x130 lr : mtk_smi_larb_resume+0x54/0x98 ... Call trace: mtk_smi_larb_config_port_gen2_general+0x64/0x130 pm_generic_runtime_resume+0x2c/0x48 __genpd_runtime_resume+0x30/0xa8 genpd_runtime_resume+0x94/0x2c8 __rpm_callback+0x44/0x150 rpm_callback+0x6c/0x78 rpm_resume+0x310/0x558 __pm_runtime_resume+0x3c/0x88 In the code: larbostd = larb->larb_gen->ostd[larb->larbid], if "larb->larb_gen->ostd" is null, the "larbostd" is the offset(e.g. 0x80 above), it's also a valid value, then accessing "larbostd[i]" in the "for" loop will cause the KE above. To avoid this issue, initialize "larbostd" to NULL when the SoC doesn't have ostd setting. Fixes: fe6dd2a4017d ("memory: mtk-smi: mt8195: Add initial setting for smi-larb") Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211108082429.15080-1-yong.wu@mediatek.com Link: https://lore.kernel.org/r/20211124085042.9649-3-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'memory-controller-drv-5.16-2' of ↵Arnd Bergmann2021-10-216-14/+371
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16, part two 1. Convert LPDDR2 bindings to dtschema and extend them with new properties. 2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from devicetree. * tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra20-emc: Add runtime dependency on devfreq governor module memory: tegra20-emc: Support matching timings by LPDDR2 configuration memory: Add LPDDR2-info helpers dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node dt-bindings: Add vendor prefix for Elpida Memory dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F dt-bindings: memory: lpddr2: Add revision-id properties dt-bindings: memory: lpddr2: Convert to schema dt-bindings: Relocate DDR bindings Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * memory: tegra20-emc: Add runtime dependency on devfreq governor moduleDmitry Osipenko2021-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq governor to the list of the Tegra20 EMC driver module softdeps to allow userspace initramfs tools like dracut to automatically pull the devfreq module into ramfs image together with the EMC module. Reported-by: Nicolas Chauvet <kwizart@gmail.com> Suggested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * memory: tegra20-emc: Support matching timings by LPDDR2 configurationDmitry Osipenko2021-10-152-14/+186
| | | | | | | | | | | | | | | | | | | | ASUS Transformer TF101 doesn't provide RAM code and in this case memory timings should be selected based on identity information read out from SDRAM chip. Support matching timings by LPDDR2 configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * memory: Add LPDDR2-info helpersDmitry Osipenko2021-10-154-0/+184
| | | | | | | | | | | | | | | | | | Add common helpers for reading and parsing standard LPDDR2 configuration properties. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
* | Merge tag 'memory-controller-drv-5.16' of ↵Arnd Bergmann2021-10-114-51/+139
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16 1. Renesas RPC: fix unaligned bus access and QSPI data transfers in manual modes. 2. Renesas RPC: select RESET_CONTROLLER as it is necessary for operation. 3. FSL IFC: fix error paths. 4. Broadcom: allow building as module. * tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module memory: samsung: describe drivers in KConfig memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * Merge branch 'for-v5.16/renesas-rpc' into mem-ctrl-nextKrzysztof Kozlowski2021-10-102-36/+124
| |\
| | * memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLERGeert Uytterhoeven2021-10-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Renesas RPC-IF driver calls devm_reset_control_get_exclusive(), which returns -ENOTSUPP if CONFIG_RESET_CONTROLLER is not enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/e443aa66d146da5646b7ebece8876545b8621063.1633447756.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlashAndrew Gabbasov2021-09-281-2/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HyperFlash devices in Renesas SoCs use 2-bytes addressing, according to HW manual paragraph 62.3.3 (which officially describes Serial Flash access, but seems to be applicable to HyperFlash too). And 1-byte bus read operations to 2-bytes unaligned addresses in external address space read mode work incorrectly (returns the other byte from the same word). Function memcpy_fromio(), used by the driver to read data from the bus, in ARM64 architecture (to which Renesas cores belong) uses 8-bytes bus accesses for appropriate aligned addresses, and 1-bytes accesses for other addresses. This results in incorrect data read from HyperFlash in unaligned cases. This issue can be reproduced using something like the following commands (where mtd1 is a parition on Hyperflash storage, defined properly in a device tree): [Correct fragment, read from Hyperflash] root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=32 count=1 root@rcar-gen3:~# hexdump -C /tmp/zz 00000000 f4 03 00 aa f5 03 01 aa f6 03 02 aa f7 03 03 aa |................| 00000010 00 00 80 d2 40 20 18 d5 00 06 81 d2 a0 18 a6 f2 |....@ ..........| 00000020 [Incorrect read of the same fragment: see the difference at offsets 8-11] root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=12 count=1 root@rcar-gen3:~# hexdump -C /tmp/zz 00000000 f4 03 00 aa f5 03 01 aa 03 03 aa aa |............| 0000000c Fix this issue by creating a local replacement of the copying function, that performs only properly aligned bus accesses, and is used for reading from HyperFlash. Fixes: ca7d8b980b67f ("memory: add Renesas RPC-IF driver") Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Link: https://lore.kernel.org/r/20210922184830.29147-1-andrew_gabbasov@mentor.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| | * memory: renesas-rpc-if: Correct QSPI data transfer in Manual modeWolfram Sang2021-09-281-35/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes 2 problems: [1] The output warning logs and data loss when performing mount/umount then remount the device with jffs2 format. [2] The access width of SMWDR[0:1]/SMRDR[0:1] register is wrong. This is the sample warning logs when performing mount/umount then remount the device with jffs2 format: jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x031c51d4: Read 0x00034e00, calculated 0xadb272a7 The reason for issue [1] is that the writing data seems to get messed up. Data is only completed when the number of bytes is divisible by 4. If you only have 3 bytes of data left to write, 1 garbage byte is inserted after the end of the write stream. If you only have 2 bytes of data left to write, 2 bytes of '00' are added into the write stream. If you only have 1 byte of data left to write, 2 bytes of '00' are added into the write stream. 1 garbage byte is inserted after the end of the write stream. To solve problem [1], data must be written continuously in serial and the write stream ends when data is out. Following HW manual 62.2.15, access to SMWDR0 register should be in the same size as the transfer size specified in the SPIDE[3:0] bits in the manual mode enable setting register (SMENR). Be sure to access from address 0. So, in 16-bit transfer (SPIDE[3:0]=b'1100), SMWDR0 should be accessed by 16-bit width. Similar to SMWDR1, SMDDR0/1 registers. In current code, SMWDR0 register is accessed by regmap_write() that only set up to do 32-bit width. To solve problem [2], data must be written 16-bit or 8-bit when transferring 1-byte or 2-byte. Fixes: ca7d8b980b67 ("memory: add Renesas RPC-IF driver") Cc: <stable@vger.kernel.org> Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com> [wsa: refactored to use regmap only via reg_read/reg_write] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210922091007.5516-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probeDongliang Mu2021-10-071-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The error handling code of fsl_ifc_ctrl_probe is problematic. When fsl_ifc_ctrl_init fails or request_irq of fsl_ifc_ctrl_dev->irq fails, it forgets to free the irq and nand_irq. Meanwhile, if request_irq of fsl_ifc_ctrl_dev->nand_irq fails, it will still free nand_irq even if the request_irq is not successful. Fix this by refactoring the error handling code. Fixes: d2ae2e20fbdd ("driver/memory:Move Freescale IFC driver to a common driver") Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com> Link: https://lore.kernel.org/r/20210925151434.8170-1-mudongliangabcd@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as moduleFlorian Fainelli2021-09-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow building the Broadcom STB DPFE driver as a module, it is already a platform driver proper with all of the resource releasing device managed. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Markus Mayer <mmayer@broadcom.com> Link: https://lore.kernel.org/r/20210924031459.8911-1-f.fainelli@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: samsung: describe drivers in KConfigKrzysztof Kozlowski2021-09-281-6/+7
| |/ | | | | | | | | | | | | | | Rephrase the Kconfig option and make it clear it applies only to Samsung SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210924133406.112174-1-krzysztof.kozlowski@canonical.com
* | Merge tag 'memory-controller-drv-mtk-5.16' of ↵Arnd Bergmann2021-10-111-247/+349
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - Mediatek Add MT8195 support to the Mediatek SMI memory controller driver. This brings also several cleanups and minor enhancements before adding actual new device support. * tag 'memory-controller-drv-mtk-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: MAINTAINERS: Add entry for MediaTek SMI memory: mtk-smi: mt8195: Add initial setting for smi-larb memory: mtk-smi: mt8195: Add initial setting for smi-common memory: mtk-smi: mt8195: Add smi support memory: mtk-smi: Use devm_platform_ioremap_resource memory: mtk-smi: Add clocks for smi-sub-common memory: mtk-smi: Add device link for smi-sub-common memory: mtk-smi: Add error handle for smi_probe memory: mtk-smi: Adjust some code position memory: mtk-smi: Rename smi_gen to smi_type memory: mtk-smi: Use clk_bulk clock ops dt-bindings: memory: mediatek: Add mt8195 smi sub common dt-bindings: memory: mediatek: Add mt8195 smi binding Link: https://lore.kernel.org/r/20211010175836.13302-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | memory: mtk-smi: mt8195: Add initial setting for smi-larbYong Wu2021-09-221-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To improve the performance, We add some initial setting for smi larbs. there are two part: 1), Each port has the special ostd(outstanding) value in each larb. 2), Two general settings for each larb. a. THRT_UPDATE: the value in bits[7:4] of 0x24 is not so good. The HW default is 4, and we expect it is 5, thus, add a flag to update it. This is only a DE recommendatory value, not a actual issue. The register name(THRT_CON) means: throttling control, and the field RD_NU_LMT means: Read Non-ultra commands limit. This change means update the Read non-ultra command from 4 to 5 here. b. SW_FLAG: Set 1 to the FLAG register. this is only for helping debug. We could confirm if the larb is reset from this value is 1 or 0. In some SoC, this setting maybe changed dynamically for some special case like 4K, and this initial setting is enough in mt8195. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-13-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: mtk-smi: mt8195: Add initial setting for smi-commonYong Wu2021-09-221-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | To improve the performance, add initial setting for smi-common. some register use some fix setting(suggested from DE). Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210914113703.31466-12-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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