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* Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds2016-12-241-1/+1
| | | | | | | | | | | | | This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>' sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mmc: sdhci: Fix to handle MMC_POWER_UNDEFINEDAdrian Hunter2016-12-201-14/+19
| | | | | | | | | | | | Since commit c2c24819b280 ("mmc: core: Don't power off the card when starting the host"), the power state can still be MMC_POWER_UNDEFINED after mmc_start_host() is called. That can trigger a warning in SDHCI during runtime resume as it tries to restore the I/O state. Handle MMC_POWER_UNDEFINED simply by not updating the I/O state in that case. Fixes: c2c24819b280 ("mmc: core: Don't power off the card when starting the host") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-cadence: add Socionext UniPhier specific compatible stringMasahiro Yamada2016-12-201-0/+1
| | | | | | | | | | | | Add a Socionext SoC specific compatible (suggested by Rob Herring). No SoC specific data are associated with the compatible strings for now, but other SoC vendors may use this IP and want to differentiate IP variants in the future. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-cadence: add Cadence SD4HC supportMasahiro Yamada2016-12-083-0/+295
| | | | | | | | | | | | Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller. For SD, it basically relies on the SDHCI standard code. For eMMC, this driver provides some callbacks to support the hardware part that is specific to this IP design. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: export sdhci_execute_tuning()Masahiro Yamada2016-12-082-1/+3
| | | | | | | | | | | | | | | | | | Some SDHCI-compat controllers support not only SD, but also eMMC, but they use different commands for tuning: CMD19 for SD, CMD21 for eMMC. Due to the difference of the underlying mechanism, some controllers (at least, the Cadence IP is the case) provide their own registers for the eMMC tuning. This commit will be useful when we want to override .execute_tuning callback (for eMMC HS200 tuning), but still let it fall back to sdhci_execute_tuning() for SD timing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Tidy tuning loopAdrian Hunter2016-12-051-38/+43
| | | | | | | | Tidy the tuning loop by moving it to a separate function and making it a for-loop. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Simplify tuning block size logicAdrian Hunter2016-12-051-11/+5
| | | | | | | There are only 2 possible block sizes, so simplify 2 if-statements into 1. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Factor out tuning helper functionsAdrian Hunter2016-12-051-92/+124
| | | | | | | Factor out some functions to tidy up the code in sdhci_execute_tuning. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Use mmc_abort_tuning()Adrian Hunter2016-12-051-10/+1
| | | | | | | Use mmc_abort_tuning() instead of open-coding the stop command. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Always allow tuning to fall back to fixed samplingAdrian Hunter2016-12-051-18/+2
| | | | | | | | | | | | | SDHCI falls back to fixed sampling if there is an error during tuning. However it also reports an error unless there is periodic re-tuning. That is not the best option because: a) there is a reasonable chance that fixed sampling will work, especially at room temperature. b) re-tuning will be done again anyway if there are CRC errors. Change to return no error always when falling back to fixed sampling. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Fix tuning reset after exhausting the maximum number of loopsAdrian Hunter2016-12-051-0/+1
| | | | | | | | | | If the driver has exhausted the maximum number of tuning loops, then fixed sampling is used. To do that both SDHCI_CTRL_TUNED_CLK and SDHCI_CTRL_EXEC_TUNING must be reset to 0, but only SDHCI_CTRL_TUNED_CLK was being reset. Reset SDHCI_CTRL_EXEC_TUNING to 0 also. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Fix recovery from tuning timeoutAdrian Hunter2016-12-051-0/+20
| | | | | | | | | | | | | | | | | | | | | | Clearing the tuning bits should reset the tuning circuit. However there is more to do. Reset the command and data lines for good measure, and then for eMMC ensure the card is not still trying to process a tuning command by sending a stop command. Note the JEDEC eMMC specification says the stop command (CMD12) can be used to stop a tuning command (CMD21) whereas the SD specification is silent on the subject with respect to the SD tuning command (CMD19). Considering that CMD12 is not a valid SDIO command, the stop command is sent only when the tuning command is CMD21 i.e. for eMMC. That addresses cases seen so far which have been on eMMC. Note that this replaces the commit fe5fb2e3b58f ("mmc: sdhci: Reset cmd and data circuits after tuning failure") which is being reverted for v4.9+. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Dan O'Donovan <dan@emutex.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Revert "mmc: sdhci: Reset cmd and data circuits after tuning failure"Adrian Hunter2016-12-051-4/+0
| | | | | | | | | | | | This reverts commit fe5fb2e3b58f ("mmc: sdhci: Reset cmd and data circuits after tuning failure"). A better fix is available, and it will be applied to older stable releases, so get this out of the way by reverting it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-acpi: support 80860F14 UID 2 SDIO busDaniel Drake2016-12-051-0/+1
| | | | | | | | | | | | | | | | | | | Add an entry for the SDIO bus in the ECS EF20 cherry trail laptop: Device (SDHB) { Name (_ADR, 0x00110000) Name (_HID, "80860F14" /* Intel Baytrail SDIO/MMC Host Controller */) Name (_CID, "PNP0D40" /* SDA Standard Compliant SD Host Controller */) Name (_DDN, "Intel(R) SDIO Controller - 80862295") Name (_UID, 0x02) Name (_HRV, One) A SDHB device with the same _HID and _UID can also be found on other cherry trail products like Chuwi Hi10. Signed-off-by: Daniel Drake <drake@endlessm.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-of-at91: remove bogus MMC_SDHCI_IO_ACCESSORS selectMasahiro Yamada2016-12-051-1/+0
| | | | | | | | | I see no override of read/write callbacks in sdhci-of-at91.c. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdioZach Brown2016-12-051-0/+32
| | | | | | | | | | | | | | | | On NI 9037 boards the max SDIO frequency is limited by trace lengths and other layout choices. The max SDIO frequency is stored in an ACPI table. The driver reads the ACPI entry MXFQ during sdio_probe_slot and sets the f_max field of the host. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Reviewed-by: Jaeden Amero <jaeden.amero@ni.com> Reviewed-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Add PCI ID for Intel NI byt sdioZach Brown2016-12-051-0/+24
| | | | | | | | | | | Add PCI ID for Intel byt sdio host controller sub-vended by NI. The controller has different behavior because of the board layout NI puts it on. Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-s3c: add spin_unlock_irq() before calling clk_round_rateJaehoon Chung2016-12-051-0/+2
| | | | | | | | | Before calling clk_round_rate(), put the spin_unlock_irq() in sdhci_s3c_consider_clock() function. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: display the clock message only one time when card is pollingJaehoon Chung2016-12-052-1/+13
| | | | | | | | | | | When card is polling (broken-cd), there is a spamming messge related to clock. After applied this patch, display the message only one time at boot time. It's enough to check which clock values is used. Also prevent to display the spamming message. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: add the debug message for polling and non-removableJaehoon Chung2016-12-051-2/+16
| | | | | | | | If card is polling or non-removable, display the more exact message. It's helpful to debug which detecting scheme is using. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: check the "present" variable before checking flagsJaehoon Chung2016-12-051-1/+2
| | | | | | | | Before checking flags, it has to check "present" variable. Otherwise, flags should be cleared everytime. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: add missing codes for runtime resumeJoonyoung Shim2016-12-051-1/+15
| | | | | | | | | | The commit 64997de4fd17 ("mmc: dw_mmc: remove system PM callback") is missing to call dw_mci_ctrl_reset(). This adds to call dw_mci_ctrl_reset() and to handle error of clocks. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: exynos: fix to call suspend callbackJoonyoung Shim2016-12-051-2/+26
| | | | | | | | | | | The dw_mmc-exynos should be RPM_ACTIVE on probe() to call suspend callback of runtime PM in pm_runtime_force_suspend() during first system suspend. Also call pm_runtime_get_noresume() on probe() because it doesn't call suspend/resume callback by runtime PM now. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0yangbo lu2016-11-292-0/+21
| | | | | | | | | | | | | | The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version. Acturally the right version numbers should be VVN=0x13 and SVN = 0x1. This patch adds the GUTS driver support for eSDHC driver to match SoC. And fix host version to avoid that incorrect version numbers break down the ADMA data transfer. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Scott Wood <oss@buserror.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: delete is_first_req parameter from pre-request callbackLinus Walleij2016-11-297-14/+7
| | | | | | | | | | | | | | | | | | The void (*pre_req) callback in the struct mmc_host_ops vtable is passing an argument "is_first_req" indicating whether this is the first request or not. None of the in-kernel users use this parameter: instead, since they all just do variants of dma_map* they use the DMA cookie to indicate whether a pre* callback has already been done for a request when they decide how to handle it. Delete the parameter from the callback and all users, as it is just pointless cruft. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Allow deferred probe for sd card detect gpioDavid E. Box2016-11-291-5/+10
| | | | | | | | | | | With commit f35bbf61ab77 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Add support for Intel GLKAdrian Hunter2016-11-292-1/+29
| | | | | | | Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* sdhci: sdhci-msm: update dll configurationRitesh Harjani2016-11-291-2/+123
| | | | | | | | | | | | | | | | | | | | The newer msm sdhci's cores use a different DLL hardware for HS400. Update the configuration and calibration of the newer DLL block. The HS400 DLL block used previously is CDC LP 533 and requires programming multiple registers and waiting for configuration to complete and then enable it. It has about 18 register writes and two register reads. The newer HS400 DLL block is SDC4 DLL and requires two register writes for configuration and one register read to confirm that it is initialized. There is an additional register write to enable the power save mode for SDC4 DLL block. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Krishna Konda <kkonda@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuitRitesh Harjani2016-11-291-0/+151
| | | | | | | | | | | | | | | | | In HS400 mode a new RCLK is introduced on the interface for read data transfers. The eMMC5.0 device transmits the read data to the host with respect to rising and falling edges of RCLK. In order to ensure correct operation of read data transfers in HS400 mode, the incoming RX data needs to be sampled by delayed version of RCLK. The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be initialized, configured and enabled once during HS400 mode switch and when operational voltage/clock is changed. Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Save the calculated tuning phaseRitesh Harjani2016-11-291-0/+10
| | | | | | | | | | Save the tuning phase once the tuning is performed. This phase value will be used while calibrating DLL for HS400 mode. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add HS400 platform supportVenkat Gopalakrishnan2016-11-291-10/+112
| | | | | | | | | | | The following msm platform specific changes are added to support HS400. - Allow tuning for HS400 mode. - Configure HS400 timing mode using the VENDOR_SPECIFIC_FUNC register. Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add clock changes for DDR mode.Ritesh Harjani2016-11-291-4/+17
| | | | | | | | | | SDHC MSM controller need 2x clock for MCLK at GCC. Hence make required changes to have 2x clock for DDR timing modes. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Implement set_clock callback for sdhci-msmRitesh Harjani2016-11-291-1/+65
| | | | | | | | | | | sdhci-msm controller may have different clk-rates for each bus speed mode. Thus implement set_clock callback for sdhci-msm driver. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Factor out sdhci_enable_clkRitesh Harjani2016-11-292-11/+18
| | | | | | | | | Factor out sdhci_enable_clk from sdhci_set_clock and make it EXPORT_SYMBOL so that it can be called. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Enable few quirksRitesh Harjani2016-11-291-1/+3
| | | | | | | | | | sdhc-msm controller needs this SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN & SDHCI_QUIRK2_PRESET_VALUE_BROKEN to be set. Hence setting it. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callbackRitesh Harjani2016-11-291-0/+17
| | | | | | | | | | | This add get_min_clock() and get_max_clock() callback for sdhci-msm. sdhci-msm min/max clocks may be different hence implement these callbacks. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Update DLL reset sequenceVenkat Gopalakrishnan2016-11-291-0/+60
| | | | | | | | | | | | | | | SDCC core with minor version >= 0x42 introduced new 14lpp DLL. This has additional requirements in the reset sequence for DLL tuning. Make necessary changes as needed. Without this patch we see below errors on such SDHC controllers sdhci_msm 7464900.sdhci: mmc0: DLL failed to LOCK mmc0: tuning execution failed: -110 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Change poor style writel/readl of registersRitesh Harjani2016-11-291-30/+32
| | | | | | | | | | | | This patch changes the poor style of writel/readl registers into more readable format. This avoid mixed style format of readl/writel in sdhci-msm driver. This patch also removes the one line comments which were present for above writel/readl, since they were of no help. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: The "clock-freq-min-max" property was deprecatedJaehoon Chung2016-11-291-0/+2
| | | | | | | | | | | | | | The "clock-freq-min-max" property was deprecated. There is "max-frequency" property in drivers/mmc/core/host.c "max-frequency" can be replaced with "clock-freq-min-max". Minimum clock value might be set to 100K by default. Then MMC core should try to find the correct value from 400K to 100K. So it just needs to set Maximum clock value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: remove the unnecessary mmc_data structureJaehoon Chung2016-11-291-4/+2
| | | | | | | | | | Remove the unnecessary mmc_data structure. Instead, cmd->data can be used. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use the cookie's enum values for post/pre_req()Jaehoon Chung2016-11-291-20/+19
| | | | | | | | | This patch removed the meaningless value. Instead, use the cookie's enum values for executing correctly. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: call the dw_mci_prep_stop_abort() by defaultJaehoon Chung2016-11-291-10/+5
| | | | | | | | | | | | stop_cmdr should be set to values relevant to stop command. It migth be assigned to values whatever there is mrq->stop or not. Then it doesn't need to use dw_mci_prepare_command(). It's enough to use the prep_stop_abort for preparing stop command. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use the hold register when send stop commandJaehoon Chung2016-11-291-0/+3
| | | | | | | | | | | | | If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default. Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it doesn't set in pre_stop_abort(). To maintain the consistency, add the checking condition for this. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: change the DW_MCI_FREQ_MIN from 400K to 100KJaehoon Chung2016-11-291-1/+1
| | | | | | | | | | | | If there is no property "clock-freq-min-max", mmc->f_min should be set to 400K by default. But Some SoC can be used 100K. When 100K is used, MMC core will try to check from 400K to 100K. Reported-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: fix the debug message for checking card's presentJaehoon Chung2016-11-291-5/+2
| | | | | | | | | | | If display the debug message, this message should be spamming. If flags is maintained the previous value, didn't display the debug message. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: display the real register value on debugfsJaehoon Chung2016-11-291-6/+8
| | | | | | | | | | Developer wants to see the real register value, not register offset. This patch fixed to display the real value of register. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: fix spelling mistake in dev_dbg messageColin Ian King2016-11-291-2/+2
| | | | | | | | | Trivial fix to spelling mistake "desciptor" to "descriptor" in dev_dbg message. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: davinci: request gpios using gpio descriptorsahaslam@baylibre.com2016-11-291-1/+12
| | | | | | | | | | | | | | | Request card detect and write protect gpios using the provided API by mmc core. If a gpio is provided for card detect, we don't need to poll. So only use polling when a gpio is not provided. Once all pdata users register the gpios using gpio descriptors, we could remove the platform callbacks. Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: David Lechner <david@lechnology.com>
* mmc: davinci: use mmc_of_parse to parse common mmc configurationahaslam@baylibre.com2016-11-291-64/+55
| | | | | | | | | | | | | | | Card detect and write protect are currently not working on a DT boot, and the driver relies on polling to get the state of the card. The current code depends on platform data callbacks to register and get the state of the gpios. mmc core provides a generic way to parse device tree configuration, which will take care of registering the gpios for us, lets use it so that we don't need to poll, and parse the same properties. Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: David Lechner <david@lechnology.com>
* mmc: tmio: remove SDIO from TODO listWolfram Sang2016-11-291-1/+0
| | | | | | | | We surely have SDIO support by now :) Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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