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* mmc: sdhci-s3c: add spin_unlock_irq() before calling clk_round_rateJaehoon Chung2016-12-051-0/+2
| | | | | | | | | Before calling clk_round_rate(), put the spin_unlock_irq() in sdhci_s3c_consider_clock() function. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: display the clock message only one time when card is pollingJaehoon Chung2016-12-052-1/+13
| | | | | | | | | | | When card is polling (broken-cd), there is a spamming messge related to clock. After applied this patch, display the message only one time at boot time. It's enough to check which clock values is used. Also prevent to display the spamming message. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: add the debug message for polling and non-removableJaehoon Chung2016-12-051-2/+16
| | | | | | | | If card is polling or non-removable, display the more exact message. It's helpful to debug which detecting scheme is using. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: check the "present" variable before checking flagsJaehoon Chung2016-12-051-1/+2
| | | | | | | | Before checking flags, it has to check "present" variable. Otherwise, flags should be cleared everytime. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: add missing codes for runtime resumeJoonyoung Shim2016-12-051-1/+15
| | | | | | | | | | The commit 64997de4fd17 ("mmc: dw_mmc: remove system PM callback") is missing to call dw_mci_ctrl_reset(). This adds to call dw_mci_ctrl_reset() and to handle error of clocks. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: exynos: fix to call suspend callbackJoonyoung Shim2016-12-051-2/+26
| | | | | | | | | | | The dw_mmc-exynos should be RPM_ACTIVE on probe() to call suspend callback of runtime PM in pm_runtime_force_suspend() during first system suspend. Also call pm_runtime_get_noresume() on probe() because it doesn't call suspend/resume callback by runtime PM now. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-of-esdhc: fix host version for T4240-R1.0-R2.0yangbo lu2016-11-292-0/+21
| | | | | | | | | | | | | | The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version. Acturally the right version numbers should be VVN=0x13 and SVN = 0x1. This patch adds the GUTS driver support for eSDHC driver to match SoC. And fix host version to avoid that incorrect version numbers break down the ADMA data transfer. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Scott Wood <oss@buserror.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: delete is_first_req parameter from pre-request callbackLinus Walleij2016-11-297-14/+7
| | | | | | | | | | | | | | | | | | The void (*pre_req) callback in the struct mmc_host_ops vtable is passing an argument "is_first_req" indicating whether this is the first request or not. None of the in-kernel users use this parameter: instead, since they all just do variants of dma_map* they use the DMA cookie to indicate whether a pre* callback has already been done for a request when they decide how to handle it. Delete the parameter from the callback and all users, as it is just pointless cruft. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Allow deferred probe for sd card detect gpioDavid E. Box2016-11-291-5/+10
| | | | | | | | | | | With commit f35bbf61ab77 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Add support for Intel GLKAdrian Hunter2016-11-292-1/+29
| | | | | | | Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* sdhci: sdhci-msm: update dll configurationRitesh Harjani2016-11-291-2/+123
| | | | | | | | | | | | | | | | | | | | The newer msm sdhci's cores use a different DLL hardware for HS400. Update the configuration and calibration of the newer DLL block. The HS400 DLL block used previously is CDC LP 533 and requires programming multiple registers and waiting for configuration to complete and then enable it. It has about 18 register writes and two register reads. The newer HS400 DLL block is SDC4 DLL and requires two register writes for configuration and one register read to confirm that it is initialized. There is an additional register write to enable the power save mode for SDC4 DLL block. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Krishna Konda <kkonda@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuitRitesh Harjani2016-11-291-0/+151
| | | | | | | | | | | | | | | | | In HS400 mode a new RCLK is introduced on the interface for read data transfers. The eMMC5.0 device transmits the read data to the host with respect to rising and falling edges of RCLK. In order to ensure correct operation of read data transfers in HS400 mode, the incoming RX data needs to be sampled by delayed version of RCLK. The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be initialized, configured and enabled once during HS400 mode switch and when operational voltage/clock is changed. Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Save the calculated tuning phaseRitesh Harjani2016-11-291-0/+10
| | | | | | | | | | Save the tuning phase once the tuning is performed. This phase value will be used while calibrating DLL for HS400 mode. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add HS400 platform supportVenkat Gopalakrishnan2016-11-291-10/+112
| | | | | | | | | | | The following msm platform specific changes are added to support HS400. - Allow tuning for HS400 mode. - Configure HS400 timing mode using the VENDOR_SPECIFIC_FUNC register. Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add clock changes for DDR mode.Ritesh Harjani2016-11-291-4/+17
| | | | | | | | | | SDHC MSM controller need 2x clock for MCLK at GCC. Hence make required changes to have 2x clock for DDR timing modes. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Implement set_clock callback for sdhci-msmRitesh Harjani2016-11-291-1/+65
| | | | | | | | | | | sdhci-msm controller may have different clk-rates for each bus speed mode. Thus implement set_clock callback for sdhci-msm driver. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Factor out sdhci_enable_clkRitesh Harjani2016-11-292-11/+18
| | | | | | | | | Factor out sdhci_enable_clk from sdhci_set_clock and make it EXPORT_SYMBOL so that it can be called. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Enable few quirksRitesh Harjani2016-11-291-1/+3
| | | | | | | | | | sdhc-msm controller needs this SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN & SDHCI_QUIRK2_PRESET_VALUE_BROKEN to be set. Hence setting it. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callbackRitesh Harjani2016-11-291-0/+17
| | | | | | | | | | | This add get_min_clock() and get_max_clock() callback for sdhci-msm. sdhci-msm min/max clocks may be different hence implement these callbacks. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Update DLL reset sequenceVenkat Gopalakrishnan2016-11-291-0/+60
| | | | | | | | | | | | | | | SDCC core with minor version >= 0x42 introduced new 14lpp DLL. This has additional requirements in the reset sequence for DLL tuning. Make necessary changes as needed. Without this patch we see below errors on such SDHC controllers sdhci_msm 7464900.sdhci: mmc0: DLL failed to LOCK mmc0: tuning execution failed: -110 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-msm: Change poor style writel/readl of registersRitesh Harjani2016-11-291-30/+32
| | | | | | | | | | | | This patch changes the poor style of writel/readl registers into more readable format. This avoid mixed style format of readl/writel in sdhci-msm driver. This patch also removes the one line comments which were present for above writel/readl, since they were of no help. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: The "clock-freq-min-max" property was deprecatedJaehoon Chung2016-11-291-0/+2
| | | | | | | | | | | | | | The "clock-freq-min-max" property was deprecated. There is "max-frequency" property in drivers/mmc/core/host.c "max-frequency" can be replaced with "clock-freq-min-max". Minimum clock value might be set to 100K by default. Then MMC core should try to find the correct value from 400K to 100K. So it just needs to set Maximum clock value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: remove the unnecessary mmc_data structureJaehoon Chung2016-11-291-4/+2
| | | | | | | | | | Remove the unnecessary mmc_data structure. Instead, cmd->data can be used. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use the cookie's enum values for post/pre_req()Jaehoon Chung2016-11-291-20/+19
| | | | | | | | | This patch removed the meaningless value. Instead, use the cookie's enum values for executing correctly. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: call the dw_mci_prep_stop_abort() by defaultJaehoon Chung2016-11-291-10/+5
| | | | | | | | | | | | stop_cmdr should be set to values relevant to stop command. It migth be assigned to values whatever there is mrq->stop or not. Then it doesn't need to use dw_mci_prepare_command(). It's enough to use the prep_stop_abort for preparing stop command. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use the hold register when send stop commandJaehoon Chung2016-11-291-0/+3
| | | | | | | | | | | | | If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default. Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it doesn't set in pre_stop_abort(). To maintain the consistency, add the checking condition for this. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: change the DW_MCI_FREQ_MIN from 400K to 100KJaehoon Chung2016-11-291-1/+1
| | | | | | | | | | | | If there is no property "clock-freq-min-max", mmc->f_min should be set to 400K by default. But Some SoC can be used 100K. When 100K is used, MMC core will try to check from 400K to 100K. Reported-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: fix the debug message for checking card's presentJaehoon Chung2016-11-291-5/+2
| | | | | | | | | | | If display the debug message, this message should be spamming. If flags is maintained the previous value, didn't display the debug message. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: display the real register value on debugfsJaehoon Chung2016-11-291-6/+8
| | | | | | | | | | Developer wants to see the real register value, not register offset. This patch fixed to display the real value of register. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: fix spelling mistake in dev_dbg messageColin Ian King2016-11-291-2/+2
| | | | | | | | | Trivial fix to spelling mistake "desciptor" to "descriptor" in dev_dbg message. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: davinci: request gpios using gpio descriptorsahaslam@baylibre.com2016-11-291-1/+12
| | | | | | | | | | | | | | | Request card detect and write protect gpios using the provided API by mmc core. If a gpio is provided for card detect, we don't need to poll. So only use polling when a gpio is not provided. Once all pdata users register the gpios using gpio descriptors, we could remove the platform callbacks. Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: David Lechner <david@lechnology.com>
* mmc: davinci: use mmc_of_parse to parse common mmc configurationahaslam@baylibre.com2016-11-291-64/+55
| | | | | | | | | | | | | | | Card detect and write protect are currently not working on a DT boot, and the driver relies on polling to get the state of the card. The current code depends on platform data callbacks to register and get the state of the gpios. mmc core provides a generic way to parse device tree configuration, which will take care of registering the gpios for us, lets use it so that we don't need to poll, and parse the same properties. Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: David Lechner <david@lechnology.com>
* mmc: tmio: remove SDIO from TODO listWolfram Sang2016-11-291-1/+0
| | | | | | | | We surely have SDIO support by now :) Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: fix wrong bitmask for SDIO irqsWolfram Sang2016-11-291-1/+1
| | | | | | | | | | | | Commit 7729c7a232a953 ("mmc: tmio: Provide separate interrupt handlers") refactored the sdio irq handler and wrongly used the mask for SD irqs, not for SDIO irqs. This doesn't really matter in practice because both values keep the only interrupt we are interested in. But still, this is wrong and wants to be fixed. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: wbsd: implement check for dma mapping errorAlexey Khoroshilov2016-11-291-4/+7
| | | | | | | | | wbsd_request_dma() does not check for dma mapping errors. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: remove unneeded (void *) casts in sdhci_(pltfm_)priv()Masahiro Yamada2016-11-292-2/+2
| | | | | | | | | The type of host->private is (unsigned long *). No cast is needed to return an opaque pointer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-iproc: support standard byte register accessesScott Branden2016-11-291-2/+33
| | | | | | | | | | | | | Add bytewise register accesses support for newer versions of IPROC SDHCI controllers. Previous sdhci-iproc versions of SDIO controllers (such as Raspberry Pi and Cygnus) only allowed for 32-bit register accesses. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sh_mobile_sdhi: Add tuning supportSimon Horman2016-11-291-1/+264
| | | | | | | | | | | | | Add tuning support for use with SDR104 mode This includes adding support for the sampling clock controller (SCC). Based on work by Ai Kyuse. Cc: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: Add tuning supportAi Kyuse2016-11-292-0/+76
| | | | | | | | | | Add tuning support for use with SDR104 mode Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: Add hw reset supportAi Kyuse2016-11-292-0/+10
| | | | | | | | | | Add hw reset support. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: document mandatory and optional callbacksSimon Horman2016-11-291-1/+4
| | | | | | | Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: enhance illegal sequence handlingAi Kyuse2016-11-291-6/+9
| | | | | | | | | | | | | | | | | | | An illegal sequence command error may occur if there is a stopbit or cmd_index error as well as a CRC error. The correct course of action is to re-enable IRQs An illegal sequence data error may occur if there is a CRC or stopbit error, or underrun. In this case set data->error correctly. This is in preparation for enabling tuning support which relies on differentiating between illegal sequence and other errors. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> [simon: broken out of a larger patch] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sh_mobile_sdhi: Add r7s72100 supportChris Brandt2016-11-291-0/+7
| | | | | | | | Add support for r7s72100 SoC. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio-mmc: add support for 32bit data portChris Brandt2016-11-292-0/+42
| | | | | | | | | | | For the r7s72100 SOC, the DATA_PORT register was changed to 32-bits wide. Therefore a new flag has been created that will allow 32-bit reads/writes to the DATA_PORT register instead of 16-bit (because 16-bits accesses are not supported). Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sh_mobile_sdhi: add ocr_mask optionChris Brandt2016-11-291-0/+2
| | | | | | | | | | | | | In moving platforms from board files to DT, there still needs to be a way to set the ocr_mask setting for the tmio driver during probe. Without this setting, the probe will fail because the supported voltages are not known. This patch will also traditional platform registration platforms to migrate to DT. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Use sdhci-caps-mask and sdhci-caps to change the caps read ↵Zach Brown2016-11-291-2/+22
| | | | | | | | | | | | | | | | | | | | during __sdhci_read_caps The sdhci capabilities register can be incorrect. The sdhci-caps-mask and sdhci-caps dt properties specify which bits of the register are incorrect and what their values should be. This patch makes the sdhci driver use those properties to correct the caps during __sdhci_read_caps. During __sdhci_read_caps Use the sdhci-caps-mask property to turn off the incorrect bits of the sdhci register after reading them. Use the sdhci-caps to turn on bits after using sdhci-caps-mask to turn off the incorrect ones. Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: refactor ST Micro busy detectionLinus Walleij2016-11-292-30/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | The ST Micro-specific busy detection was made after the assumption that only this variant supports busy detection. So when doing busy detection, the host immediately tries to use some ST-specific register bits. Since the qualcomm variant also supports some busy detection schemes, encapsulate the variant flags better in the variant struct and prepare to add more variants by just providing some bitmasks to the logic. Put the entire busy detection logic within an if()-clause in the mmci_cmd_irq() function so the code is only executed when busy detection is enabled, and so that it is kept in (almost) one place, and add comments describing what is going on so the code can be understood. Tested on the Ux500 by introducing some prints in the busy detection path and noticing how the IRQ is enabled, used and disabled successfully. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: clean up header definesLinus Walleij2016-11-292-39/+46
| | | | | | | | | | | | | | | | | There was some confusion in the CPSM (Command Path State Machine) and DPSM (Data Path State Machine) regarding the naming of the registers, clarify the meaning of this acronym so the naming is understandable, and consistently use BIT() to define these fields. Consequently name the register bit defines MCI_[C|D]PSM_* and adjust the driver as well. Include new definitions for a few bits found in a patch from Srinivas Kandagatla. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: s3cmci: Use DMA slave map rather than exported DMA filterSylwester Nawrocki2016-11-291-11/+4
| | | | | | | | | | | | | Support for DMA slave map has been added to the s3c24xx-dma controller in commit 34681d84a0f7cc22ded1413dc79eef8a2f23d9c3 "dmaengine: s3c24xx: Add dma_slave_map for s3c2440 devices" This patch converts the s3cmci driver to also use it, so we can eventually get rid of the exported filter function once all related DMA clients are updated. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* MMC: meson: initial support for GX platformsKevin Hilman2016-11-293-0/+862
| | | | | | | | Initial support for the SD/eMMC controller in the Amlogic S905/GX* family of SoCs. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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