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* mmc: sdhci: handle busy-end interrupt during commandChanho Min2014-09-091-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is fully legal for a controller to start handling busy-end interrupt before it has signaled that the command has completed. So make sure we do things in the proper order, Or it results that command interrupt is ignored so it can cause unexpected operations. This is founded at some toshiba emmc with the bellow warning. "mmc0: Got command interrupt 0x00000001 even though no command operation was in progress." This issue has been also reported by Youssef TRIKI: It is not specific to Toshiba devices, and happens with eMMC devices as well as SD card which support Auto-CMD12 rather than CMD23. Also, similar patch is submitted by: Gwendal Grignou <gwendal@chromium.org> Changes since v1: Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git and Tested if issue is fixed again. Signed-off-by: Hankyung Yu <hankyung.yu@lge.com> Signed-off-by: Chanho Min <chanho.min@lge.com> Tested-by: Youssef TRIKI <youssef.triki@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* sdhci: Make sdhci_disable_irq_wakeups() staticFabio Estevam2014-09-091-2/+1
| | | | | | | | | | | | sdhci_disable_irq_wakeups() is exported, but it is not called outside sdhci.c. Make it static and do not export it, so that the following sparse warning is fixed: drivers/mmc/host/sdhci.c:2548:6: warning: symbol 'sdhci_disable_irq_wakeups' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: move timeout_clk dynamically calculation code into common codeAisheng Dong2014-09-091-11/+13
| | | | | | | | | The timeout_clk calculation code for SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK case is common and could be moved into common sdhci_do_set_ios, then platform code which is not using sdhci_set_clock does not need to write the same code again. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: calculate timeout_clk conditionally in sdhci_add_hostAisheng Dong2014-09-091-17/+17
| | | | | | | | | The timeout_clk calculation code in sdhci_add_host is meaningless for SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK. So only execute them with no SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK set. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: set the correct max timeout value for uSDHCAisheng Dong2014-09-091-0/+11
| | | | | | | | | | | | | | | | The default sdhci driver write 0xE into timeout counter register to set the maximum timeout. The value is not correct for uSDHC since the max counter value for uSDHC is 0xF. Instead of using common timeout code in sdhci, we implement esdhc_set_timeout to handle the difference between eSDHC and uSDHC. Currently we simply set the max timeout value as before. But in the future, we probably may implement IMX specific timeout setting algorithm and use suitable timeout for different CMDs. Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: add platform set_timeout hookAisheng Dong2014-09-092-5/+16
| | | | | | | | | | | | | | | | Currently the common code assume 0xE is the maximum timeout counter value and use it to write into the timeout counter register. However, it's fairly possible that some other SoCs may have different max timeout register value. That means 0xE may be incorrect and becomes meaningless. It's also possible that other platforms has different timeout calculation algorithm. To be flexible, this patch provides a .set_timeout hook for those platforms to set the timeout on their way if they need. Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-esdhc-imx: fix incorrect max timeout cout for uSDHCAisheng Dong2014-09-091-0/+9
| | | | | | | | | | | The default sdhci code use the 1 << 27 as the max timeout counter to to calculate the max_busy_timeout, however it's not correct for uSDHC since its the max counter is 1 << 28. Implement esdhc_get_max_timeout_cout to handle it correctly. Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: add platform get_max_timeout_count hookAisheng Dong2014-09-092-2/+8
| | | | | | | | | | | | | | | Currently the max timeout count is hardcode to 1 << 27 for calcuate the max_busy_timeout, however, for some platforms the max timeout count may not be 1 << 27, e.g. i.MX uSDHC is 1 << 28. Thus 1 << 27 is not correct for such platform. It is also possible that other platforms may have different values. To be flexible, we add a get_max_timeout_count hook to get the correct maximum timeout value for these platforms. Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio-mmc: Add support for SDHI on new R-Car Gen2 SoCsGeert Uytterhoeven2014-09-091-0/+3
| | | | | | | | | - r8a7792 (R-Car V2H) - r8a7793 (R-Car M2-N) - r8a7794 (R-Car E2) Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Pass back errors from mmc_of_parse()Doug Anderson2014-09-091-4/+6
| | | | | | | | | | It's possible that mmc_of_parse() could return errors (possibly in some future version it might return -EPROBE_DEFER even). Let's pass those errors back. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-sirf: fix 8bit width enable by overwriting set_bus_widthMinda Chen2014-09-091-1/+23
| | | | | | | | | | | | | | | the implementation of CSR SDHCI controller is a modified version of the one described in the 1.0 specification, and not a normal 3.0 controller. and 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts use bit 5. this patch fixes the functionality of 8bit transfer in mmc controllers and improve performance for mmc0 a lot. Signed-off-by: Minda Chen <Minda.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Support voltage changesDoug Anderson2014-09-092-10/+132
| | | | | | | | | | | | For UHS cards we need the ability to switch voltages from 3.3V to 1.8V. Add support to the dw_mmc driver to handle this. Note that dw_mmc needs a little bit of extra code since the interface needs a special bit programmed to the CMD register while CMD11 is progressing. This means adding a few extra states to the state machine to track. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use mmc_regulator_get_supply to handle regulatorsYuvaraj CD2014-09-091-37/+35
| | | | | | | | | | | This patch makes use of mmc_regulator_get_supply() to handle the vmmc and vqmmc regulators.Also it moves the code handling the these regulators to dw_mci_set_ios().It turned on the vmmc and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off during MMC_POWER_OFF. Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: resolve divded by zero panicChuanxiao Dong2014-09-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With one special SD card, below divide by zero error observed: ... [ 2.144300] divide error: 0000 [#1] PREEMPT SMP [ 2.148860] Modules linked in: [ 2.151898] [ 2.152685] Set up 4031 stolen pages starting at 0x0001f000, GTT offset 0K [ 2.157330] Set up 0 CI stolen pages starting at 0x00000000, GTT offset 131072K [ 2.167581] Pid: 5, comm: kworker/u:0 Not tainted 3.0.8-138216-g974a2ab #1 [ 2.169506] [drm] PSB GTT mem manager ready, tt_start 4031, tt_size 28737 pages [ 2.169906] [drm] SGX core id = 0x00000000 [ 2.169920] [drm] SGX core rev major = 0x00, minor = 0x00 [ 2.169934] [drm] SGX core rev maintenance = 0x00, designer = 0x00 [ 2.197370] Intel Corporation Medfield/iCDKB [ 2.201716] EIP: 0060:[<c1697ca6>] EFLAGS: 00010246 CPU: 1 [ 2.207198] EIP is at mmc_init_erase+0x76/0x150 [ 2.211704] EAX: 00002000 EBX: dcd1b400 ECX: 00002000 EDX: 00000000 [ 2.217957] ESI: 00000000 EDI: dcd5c800 EBP: dd867e84 ESP: dd867e7c [ 2.224214] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 [ 2.229605] Process kworker/u:0 (pid: 5, ti=dd866000 task=dd868000 task.ti=dd866000) [ 2.237325] Stack: [ 2.239322] dcd1b400 00000000 dd867eb0 c16a06da c1ab7c44 dd995aa8 00000003 00000000 [ 2.247054] 00000000 00000000 dcd5c800 00000000 dcd1b400 dd867ef8 c16a1012 c1698b00 [ 2.254785] 00000029 00000001 c194eb80 dcd5c9ec dd867e00 c1239b00 00000000 00000000 [ 2.262519] Call Trace: [ 2.264975] [<c16a06da>] mmc_sd_setup_card+0x1da/0x4f0 [ 2.270183] [<c16a1012>] mmc_sd_init_card+0x192/0xc40 [ 2.275304] [<c1698b00>] ? __mmc_claim_host+0x160/0x160 [ 2.280610] [<c1239b00>] ? __schedule_bug+0x50/0x80 [ 2.285556] [<c16a1b89>] mmc_attach_sd+0xc9/0x230 [ 2.290333] [<c169b6ef>] mmc_rescan+0x25f/0x2c0 [ 2.294943] [<c1274223>] process_one_work+0x103/0x400 [ 2.300065] [<c12670fd>] ? mod_timer+0x1ad/0x3c0 [ 2.304756] [<c169b490>] ? mmc_suspend_host+0x1a0/0x1a0 [ 2.310056] [<c127502d>] worker_thread+0x12d/0x4a0 [ 2.314921] [<c18fcfbd>] ? preempt_schedule+0x2d/0x50 [ 2.320047] [<c1274f00[ 2.323976] ---[ end trace 5398ec2720494438 ]--- ... So, seems this bad SD card does not set valid value in related SSR / CSD register fields. And then the driver will set card->erase_size to 0. Then it triggered this divided by zero error when calculate card->pref_erase. Submit this patch to fix the issue. Signed-off-by: Yunpeng Gao <yunpeng.gao@intel.com> Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sunxi: Declare ERASE capabilityChen-Yu Tsai2014-09-091-1/+2
| | | | | | | | | Declare ERASE capability so we can use filesystems with the discard option and the fstrim tool. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Add PCI IDs for Intel BraswellAlan Cox2014-09-092-0/+26
| | | | | | | | | The hardware is the same as used in Baytrail. Add these new PCI IDs to the driver's list of supported IDs. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: move rockchip related code to a separate fileaddy ke2014-09-094-57/+146
| | | | | | | | | | | | To support HS200 and UHS-1, we need add a big hunk of code, as shown in the following patches. So a separate file for rockchip SOCs is suitable. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: add actual clock support as optionShinobu Uehara2014-09-092-2/+9
| | | | | | | | | | | | | | | Some controller is supporting actual clock on SD_CLK_CTRL :: DIV[7:0]. Renesas SH-Mobile SDHI doesn't support, but, Renesas R-Car SDHI supports it. This patch adds new TMIO_MMC_CLK_ACTUAL flag for it. [Kuninori Morimoto: tidyuped for upstreaming] Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: remove SCLKEN bit setting from tmio_mmc_set_clock()Kuninori Morimoto2014-09-091-1/+0
| | | | | | | | | | | | | TMIO clock is set via tmio_mmc_set_clock() -> tmio_mmc_clk_start(), and SCLKEN bit will be set on tmio_mmc_clk_start(). It is not needed on tmio_mmc_set_clock() function. The required clock setting will not be able to set in some clocks without this patch. Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: remove Renesas specific #ifdefKuninori Morimoto2014-09-092-4/+7
| | | | | | | | | | This patch adds new TMIO_MMC_HAVE_CTL_DMA_REG flag, and remove Renesas specific #ifdef from tmio driver Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: check ILL_FUNC instead of CBSYShinobu Uehara2014-09-091-1/+12
| | | | | | | | | | | | | | | | | | | | | Some controllers need to check SD bus status when writing data. Then, it checks ILL_FUNC bit on SD_INFO2 register, and this method is controlled via TMIO_MMC_HAS_IDLE_WAIT flags. Same method is required on tmio_mmc_data_irq() which will be called after writing data. Current driver is checking CBSY bit for this purpose, but, some controllers doesn't have CBSY bit. This patch checks ILL_FUNC bit instead of CBSY bit if it has TMIO_MMC_HAS_IDLE_WAIT flags [Kuninori Morimoto: tidyuped for upstreaming] Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: add TMIO_MMC_SDIO_STATUS_QUIRKShinobu Uehara2014-09-092-1/+11
| | | | | | | | | | | | | | | | Renesas R-Car SDHI should set reserved bits on CTL_SDIO_STATUS register when writing. This patch adds new TMIO_MMC_SDIO_STATUS_QUIRK flags for this purpose [Kuninori Morimoto: tidyuped for upstreaming enabled this flags for all SH-Mobile/R-Car] Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: control multiple block transfer modeShinobu Uehara2014-09-092-0/+15
| | | | | | | | | | | | | | | | | Renesas SDHI has "Multiple Block Transfer Mode" settings on SD_CMD register which controls CMD12 automatically. This patch cares it, because CMD12 is not needed when CMD53 (= SD_IO_RW_EXTENDED) [Kuninori Morimoto: tidyuped for upstreaming enabled this flags for all SH-Mobile/R-Car] Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: clear error IRQ statusShinobu Uehara2014-09-091-0/+3
| | | | | | | | | | | Next card access will be always error if it didn't clear error status Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: care about DMA tx/rx addr offsetKuninori Morimoto2014-09-092-1/+4
| | | | | | | | | | | | | | | | | Basically, SD_BUF0 Tx/Rx addresses are same in normal TMIO controller, but, it is different on Renesas R-Car SDHI controller if it uses DMAC (Rx address needs to add 0x2000 to Tx address) This patch adds new .dma_rx_offset and cares it Tested-by: Nguyen Xuan Nui <nx-nui@jinso.co.jp> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: tmio: Remove library functions for system PMUlf Hansson2014-09-092-28/+0
| | | | | | | These library functions aren't used and nor needed, let's remove them. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio_mmc: Fixup system PM suspend lock-upUlf Hansson2014-09-091-2/+2
| | | | | | | | | | | | | | | | | At system PM suspend, the tmio core accessed the internal registers of the controller without first moving the device into active state. This caused a lock-up in system PM suspend phase. The reason for the register access were masking of IRQs. Since that is managed via the runtime PM suspend path, let's just re-use that path for system PM suspend. In other words force the device into runtime PM suspend state at system PM suspend and restore it to active state at system PM resume. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: sdhi: Fixup system PM suspend lock-upUlf Hansson2014-09-091-1/+2
| | | | | | | | | | | | | | | | | At system PM suspend, the tmio core accessed the internal registers of the controller without first moving the device into active state. This caused a lock-up in system PM suspend phase. The reason for the register access were masking of IRQs. Since that is managed via the runtime PM suspend path, let's just re-use that path for system PM suspend. In other words force the device into runtime PM suspend state at system PM suspend and restore it to active state at system PM resume. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio_mmc: Enable runtime PM supportUlf Hansson2014-09-091-0/+3
| | | | | | | | | | | To take advantage of the clock gating support, use the runtime PM callbacks provided by the tmio core. Additionally, we make use of the SET_PM_RUNTIME_PM_OPS, which is a preparation needed to simplify system PM. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: sdhi: Make runtime PM callbacks available for CONFIG_PMUlf Hansson2014-09-091-1/+1
| | | | | | | | To be able to simplify system PM, let's re-use the runtime PM callbacks by converting to the SET_PM_RUNTIME_PM_OPS macro. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Make runtime PM callbacks available for CONFIG_PMUlf Hansson2014-09-092-2/+2
| | | | | | | | To give the option for tmio hosts to use the runtime PM callbacks for CONFIG_PM_SLEEP as well as CONFIG_PM_RUNTIME, move them to CONFIG_PM. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Mask all IRQs when inactiveUlf Hansson2014-09-091-0/+2
| | | | | | | | To make sure we don't receive any spurious IRQs while we are inactive, mask the IRQs from within the ->runtime_suspend() callback. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Handle clock gating from runtime PM functionsUlf Hansson2014-09-092-5/+26
| | | | | | | | Add clock gating control as a part of the tmio library functions for runtime PM. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Restructure ->set_ios() and adapt ->probe() to itUlf Hansson2014-09-092-67/+14
| | | | | | | | | | | | | | | | | An internal power state machine were beeing used to keep ->probe() and ->set_ios() in sync. Especially for handling specific scenarios while using CONFIG_MMC_CLKGATE. Moreover dependency to CONFIG_MMC_CLKGATE existed to handle runtime PM properly, which we moves away from here. By removing the state machine and instead make ->set_ios() rely on the information provided through the function's in-parameters, the code becomes significantly simplier. Additonally as a part of this rework we prepares for making the runtime PM callbacks responsible of clock gating. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Extract bus_width modifications to a separate functionUlf Hansson2014-09-091-10/+15
| | | | | | | | Move code for bus_width modification, out of the ->set_ios() callback and into a separate function, to simplify code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Keep host active while serving requestsUlf Hansson2014-09-091-23/+32
| | | | | | | | | | | Use runtime PM to keep the host active during I/O operations and other requests which requires the tmio hardware to be powered. Additionally make use of the runtime PM autosuspend feature with a default timeout of 50 ms. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: tmio: Keep host active while SDIO IRQ is enabledUlf Hansson2014-09-092-4/+16
| | | | | | | | The host must be kept active to be able to serve SDIO IRQs, thus let's prevent it from going inactive while SDIO IRQ is enabled. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* mmc: atmel-mci: add 0x600 IP versionNicolas Ferre2014-09-091-0/+1
| | | | | | Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Use regulator_get_voltage() if OCR mask is empty.Javier Martinez Canillas2014-09-091-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The operation conditions register (OCR) stores the voltage profile of the card, however the list of possible voltages is restricted by the voltage range supported by the supply used as VCC/VDD. So in mmc_vddrange_to_ocrmask() a OCR mask is obtained to filter the not supported voltages, from the value read in the host controller OCR register. For fixed regulators, regulator_list_voltage() returns the fixed output for the first selector but this doesn't happen for switch (FET) regulators that obtain their voltage from their parent supply. A call to regulator_get_voltage() is needed in this case so the regulator core can return the FET's parent supply voltage output. This change is consistent with the fact that for other fixed regulators (that are not FETs) the OCR mask is returned even when mmc_regulator_set_ocr() checks if the regulator is fixed before calling regulator_set_voltage(). Without this patch, the following warning is reported when a FET is used as a vmmc-supply: dwmmc_exynos 12220000.mmc: Failed getting OCR mask: -22 Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: implement Driver Stage Register handlingSascha Hauer2014-09-095-0/+45
| | | | | | | | | | | | | | | | | | | | Some eMMC and SD cards implement a DSR register that allows to tune raise/fall times and drive strength of the CMD and DATA outputs. The values to use depend on the card in use and the host. It might be needed to reduce the drive strength to prevent voltage peaks above the host's specification. Implement a 'dsr' devicetree property that allows to specify the value to set the DSR to. For non-dt setups the new members of mmc_host can be set by board code. This patch was initially authored by Sascha Hauer. It contains improvements authored by Markus Niebel and Uwe Kleine-König. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pxav3: set_uhs_signaling is initialized twice differentlyPeter Griffin2014-09-091-2/+1
| | | | | | | | | | | | | | | | | | | | .set_uhs_signaling field is currently initialised twice once to the arch specific callback pxav3_set_uhs_signaling, and also to the generic sdhci_set_uhs_signaling callback. This means that uhs is currently broken for this platform currently, as pxav3 has some special constriants which means it can't use the generic callback. This happened in commit 96d7b78cfc2f ("mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function") commit a702c8abb2a9 ("mmc: host: split up sdhci-pxa, create sdhci-pxav3.c")' Fix this and hopefully prevent it happening in the future by ensuring named initialisers always follow the declaration order in the structure definition. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-acpi.c: Use SET_RUNTIME_PM_OPS macro to set runtime pm callbacksPeter Griffin2014-09-091-9/+2
| | | | | | | | This allows us to get rid of the #else condition, as the macro compiles away to nothing if not enabled. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci-pci: Use SET_RUNTIME_PM_OPS macro to set runtime pm callbacksPeter Griffin2014-09-091-9/+2
| | | | | | | | This allows us to get rid of the #else condition, as the macro compiles away to nothing if not enabled. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc-pltfm: Remove superflous #else condition on CONFIG_PM_SLEEPPeter Griffin2014-09-091-3/+0
| | | | | | | | | As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define the suspend/resume callbacks to NULL. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc-pci: Remove superflous #else condition on CONFIG_PM_SLEEPPeter Griffin2014-09-091-3/+0
| | | | | | | | | As the code is using SIMPLE_DEV_PM_OPS helper, this compiles away to nothing if CONFIG_PM_SLEEP is disabled. Thus we don't need to #define the suspend/resume callbacks to NULL. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: remove .owner field for drivers using module_platform_driverPeter Griffin2014-09-0928-28/+0
| | | | | | | | | This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: sdio: Fix unconditional wake_up_process() on sdio threadFu Zhonghui2014-09-092-4/+12
| | | | | | | | | | | | | | | | | 781e989cf59 ("mmc: sdhci: convert to new SDIO IRQ handling") and bf3b5ec66bd ("mmc: sdio_irq: rework sdio irq handling") disabled the use of our own custom threaded IRQ handler, but left in an unconditional wake_up_process() on that handler at resume-time. Link: https://bugzilla.kernel.org/show_bug.cgi?id=80151 In addition, the check for MMC_CAP_SDIO_IRQ capability is added before enable sdio IRQ. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Fu Zhonghui <zhonghui.fu@linux.intel.com> Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Add support for MIPSAndrew Bresticker2014-09-091-1/+1
| | | | | | | | There are upcoming MIPS SoCs with dw_mmc hosts. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Add dependency on DMAAndrew Bresticker2014-09-091-1/+2
| | | | | | | | | | The dw_mmc drivers rely on the DMA API, so update the Kconfig entry to depend on HAS_DMA. Since the drivers should build on any platform with DMA, allow the driver to compile tested on non-ARC/ARM platforms. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* sdhci : recompute timeout_clk when neededMatthieu CASTET2014-09-091-1/+7
| | | | | | | | | | when SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set, timeout_clk is sdclk. We need to update it when we change sdclk in sdhci_set_clock. This allow to have a more precisse timeout and max_busy_timeout. This can help for command that need a big busy wait (erase, ...). Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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