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* mtd: spinand: gigadevice: Fix the get ecc status issueHan Xu2024-02-051-2/+4
| | | | | | | | | | | Some GigaDevice ecc_get_status functions use on-stack buffer for spi_mem_op causes spi_mem_check_op failing, fix the issue by using spinand scratchbuf. Fixes: c40c7a990a46 ("mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG") Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231108150701.593912-1-han.xu@nxp.com
* spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPPChia-Lin Kao (AceLan)2023-11-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit updates the SPI subsystem, particularly affecting "SPI MEM" drivers and core parts, by replacing the -ENOTSUPP error code with -EOPNOTSUPP. The key motivations for this change are as follows: 1. The spi-nor driver currently uses EOPNOTSUPP, whereas calls to spi-mem might return ENOTSUPP. This update aims to unify the error reporting within the SPI subsystem for clarity and consistency. 2. The use of ENOTSUPP has been flagged by checkpatch as inappropriate, mainly being reserved for NFS-related errors. To align with kernel coding standards and recommendations, this change is being made. 3. By using EOPNOTSUPP, we provide more specific context to the error, indicating that a particular operation is not supported. This helps differentiate from the more generic ENOTSUPP error, allowing drivers to better handle and respond to different error scenarios. Risks and Considerations: While this change is primarily intended as a code cleanup and error code unification, there is a minor risk of breaking user-space applications that rely on specific return codes for unsupported operations. However, this risk is considered low, as such use-cases are unlikely to be common or critical. Nevertheless, developers and users should be aware of this change, especially if they have scripts or tools that specifically handle SPI error codes. This commit does not introduce any functional changes to the SPI subsystem or the affected drivers. Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231129064311.272422-1-acelan.kao@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge tag 'mtd/for-6.7' of ↵Linus Torvalds2023-11-045-1/+276
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "The main set of changes is related to Uwe's work converting platform remove callbacks to return void. Comes next (in number of changes) Kees' additional structures annotations to improve the sanitizers. The usual amount of cleanups apply. About the more substancial contribution, one main function of the partitions core could return an error which was not checked, this is now fixed. On the bindings side, fixed partitions can now have a compression property. Finally, an erroneous situation is now always avoided in the MAP RAM driver. CFI: - A several years old byte swap has been fixed. NAND: - The subsystem has, as usual, seen a bit of cleanup being done this cycle, typically return values of platform_get_irq() and devm_kasprintf(). There is also a better ECC check in the Arasan driver. This comes with smaller misc changes. - In the SPI-NAND world there is now support for Foresee F35SQA002G, Winbond W25N and XTX XT26 chips. SPI NOR: - For SPI NOR we cleaned the flash info entries in order to have them slimmer and self explanatory. In order to make the entries as slim as possible, we introduced sane default values so that the actual flash entries don't need to specify them. We now use a flexible macro to specify the flash ID instead of the previous INFOx() macros that had hardcoded ID lengths. Instead of: { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) OTP_INFO(256, 3, 0x1000, 0x1000) }, We now use: .id = SNOR_ID(0xef, 0x80, 0x20), .name = "w25q512nwm", .otp = SNOR_OTP(256, 3, 0x1000, 0x1000), - We also removed some flash entries: the very old Catalyst SPI EEPROMs that were introduced once with the SPI-NOR subsystem, and a Fujitsu MRAM. Both should use the at25 EEPROM driver. The latter even has device tree bindings for the at25 driver. - We made sure that the conversion didn't introduce any unwanted changes by comparing the .rodata segment before and after the conversion. The patches landed in linux-next immediately after v6.6-rc2, we haven't seen any regressions yet. - Apart of the autumn cleaning we introduced a new flash entry, at25ff321a, and added block protection support for mt25qu512a" * tag 'mtd/for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (91 commits) mtd: cfi_cmdset_0001: Byte swap OTP info mtd: rawnand: meson: check return value of devm_kasprintf() mtd: rawnand: intel: check return value of devm_kasprintf() mtd: rawnand: sh_flctl: Convert to module_platform_driver() mtd: spi-nor: micron-st: use SFDP table for mt25qu512a mtd: spi-nor: micron-st: enable lock/unlock for mt25qu512a mtd: rawnand: Remove unused of_gpio.h inclusion mtd: spinand: Add support for XTX XT26xxxDxxxxx mtd: spinand: winbond: add support for serial NAND flash mtd: rawnand: cadence: Annotate struct cdns_nand_chip with __counted_by mtd: rawnand: Annotate struct mtk_nfc_nand_chip with __counted_by mtd: spinand: add support for FORESEE F35SQA002G mtd: rawnand: rockchip: Use struct_size() mtd: rawnand: arasan: Include ECC syndrome along with in-band data while checking for ECC failure mtd: Use device_get_match_data() mtd: spi-nor: nxp-spifi: Convert to platform remove callback returning void mtd: spi-nor: hisi-sfc: Convert to platform remove callback returning void mtd: maps: sun_uflash: Convert to platform remove callback returning void mtd: maps: sa1100-flash: Convert to platform remove callback returning void mtd: maps: pxa2xx-flash: Convert to platform remove callback returning void ...
| * mtd: spinand: Add support for XTX XT26xxxDxxxxxBruce Suen2023-10-161-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Support XTX Technology XT26G01DXXXXX, XT26G11DXXXXX, XT26Q01DXXXXX, XT26G02DXXXXX, XT26G12DXXXXX, XT26Q02DXXXXX, XT26G04DXXXXX, and XT26Q04DXXXXX SPI NAND. These are 3V/1.8V 1G/2G/4Gbit serial SLC NAND flash device with on-die ECC(8bit strength per 512bytes). Datasheet Links: - http://www.xtxtech.com/download/?AId=458 - http://www.xtxtech.com/download/?AId=495 Signed-off-by: Bruce Suen <bruce_suen@163.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231012102412.10581-1-bruce_suen@163.com
| * mtd: spinand: winbond: add support for serial NAND flashSridharan S N2023-10-161-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for W25N01JW, W25N02JWZEIF, W25N512GW, W25N02KWZEIR and W25N01GWZEIG. W25N02KWZEIR has 8b/512b on-die ECC capability and other four has 4b/512b on-die ECC capability. Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231012064134.4068621-1-quic_sridsn@quicinc.com
| * mtd: spinand: add support for FORESEE F35SQA002GMartin Kurbanov2023-10-163-1/+97
| | | | | | | | | | | | | | | | | | | | Add support for FORESEE F35SQA002G SPI NAND. Datasheet: https://www.longsys.com/uploads/LM-00006FORESEEF35SQA002GDatasheet_1650183701.pdf Signed-off-by: Martin Kurbanov <mmkurbanov@salutedevices.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20231002140458.147605-1-mmkurbanov@salutedevices.com
* | mtd: spinand: micron: correct bitmask for ecc statusMartin Kurbanov2023-09-111-1/+1
|/ | | | | | | | | | Valid bitmask is 0x70 in the status register. Fixes: a508e8875e13 ("mtd: spinand: Add initial support for Micron MT29F2G01ABAGD") Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230905145637.139068-1-mmkurbanov@sberdevices.ru
* Merge tag 'mtd/for-6.6' of ↵Linus Torvalds2023-09-033-0/+62
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "Core MTD changes: - Use refcount to prevent corruption - Call external _get and _put in right order - Fix use-after-free in mtd release - Explicitly include correct DT includes - Clean refcounting with MTD_PARTITIONED_MASTER - mtdblock: make warning messages ratelimited - dt-bindings: Add SEAMA partition bindings Device driver changes: - Use devm helper functions - Fix questionable cast, remove pointless ones. - error handling fixes - add support for new chip versions - update DT bindings - misc cleanups - fix typos, whitespace, indentation" * tag 'mtd/for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (105 commits) dt-bindings: mtd: amlogic,meson-nand: drop unneeded quotes mtd: spear_smi: Use helper function devm_clk_get_enabled() mtd: rawnand: orion: Use helper function devm_clk_get_optional_enabled() mtd: rawnand: vf610_nfc: Use helper function devm_clk_get_enabled() mtd: rawnand: sunxi: Use helper function devm_clk_get_enabled() mtd: rawnand: stm32_fmc2: Use helper function devm_clk_get_enabled() mtd: rawnand: mtk: Use helper function devm_clk_get_enabled() mtd: rawnand: mpc5121: Use helper function devm_clk_get_enabled() mtd: rawnand: lpc32xx_slc: Use helper function devm_clk_get_enabled() mtd: rawnand: intel: Use helper function devm_clk_get_enabled() mtd: rawnand: fsmc: Use helper function devm_clk_get_enabled() mtd: rawnand: arasan: Use helper function devm_clk_get_enabled() mtd: rawnand: qcom: Add read/read_start ops in exec_op path mtd: rawnand: qcom: Clear buf_count and buf_start in raw read mtd: maps: fix -Wvoid-pointer-to-enum-cast warning mtd: rawnand: fix -Wvoid-pointer-to-enum-cast warning mtd: rawnand: fsmc: handle clk prepare error in fsmc_nand_resume() mtd: rawnand: Propagate error and simplify ternary operators for brcmstb_nand_wait_for_completion() mtd: rawnand: qcom: Sort includes alphabetically mtd: rawnand: qcom: Do not override the error no of submit_descs() ...
| * mtd: spinand: toshiba: add support for T{C,H}58NYG{0,2}S3HBAI4 and ↵Sridharan S N2023-07-121-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TH58NYG3S0HBAI6 Add support for: TC58NYG0S3HBAI4 - 1Gb SLC NAND flash TH58NYG2S3HBAI4 - 4Gb SLC NAND flash TH58NYG3S0HBAI6 - 8Gb SLC NAND flash All of these has 8b/512b on-die ECC capability Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230623045757.30055-4-quic_sridsn@quicinc.com
| * mtd: spinand: esmt: add support for F50D2G41KASridharan S N2023-07-121-0/+9
| | | | | | | | | | | | | | | | | | | | This adds support for ESMT F50D2G41KA. This is 2Gb SLC NAND flash with 8b/512b on-die ECC capability. Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230623045757.30055-3-quic_sridsn@quicinc.com
| * mtd: spinand: gigadevice: add support for GD5F1GQ{4,5}RExxHSridharan S N2023-07-121-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for: GD5F1GQ5RExxH GD5F1GQ4RExxH Both are 1Gb SLC NAND flash with 4b/512b on-die ECC capability and has 2K + 64B PageSize. Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230623045757.30055-2-quic_sridsn@quicinc.com
* | mtd: spinand: winbond: Fix ecc_get_statusOlivier Maignial2023-07-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reading ECC status is failing. w25n02kv_ecc_get_status() is using on-stack buffer for SPINAND_GET_FEATURE_OP() output. It is not suitable for DMA needs of spi-mem. Fix this by using the spi-mem operations dedicated buffer spinand->scratchbuf. See spinand->scratchbuf: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/mtd/spinand.h?h=v6.3#n418 spi_mem_check_op(): https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi-mem.c?h=v6.3#n199 Fixes: 6154c7a58348 ("mtd: spinand: winbond: add Winbond W25N02KV flash support") Cc: stable@vger.kernel.org Signed-off-by: Olivier Maignial <olivier.maignial@hotmail.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/DB4P250MB1032EDB9E36B764A33769039FE23A@DB4P250MB1032.EURP250.PROD.OUTLOOK.COM
* | mtd: spinand: toshiba: Fix ecc_get_statusOlivier Maignial2023-07-121-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | Reading ECC status is failing. tx58cxgxsxraix_ecc_get_status() is using on-stack buffer for SPINAND_GET_FEATURE_OP() output. It is not suitable for DMA needs of spi-mem. Fix this by using the spi-mem operations dedicated buffer spinand->scratchbuf. See spinand->scratchbuf: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/mtd/spinand.h?h=v6.3#n418 spi_mem_check_op(): https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi-mem.c?h=v6.3#n199 Fixes: 10949af1681d ("mtd: spinand: Add initial support for Toshiba TC58CVG2S0H") Cc: stable@vger.kernel.org Signed-off-by: Olivier Maignial <olivier.maignial@hotmail.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/DB4P250MB1032553D05FBE36DEE0D311EFE23A@DB4P250MB1032.EURP250.PROD.OUTLOOK.COM
* mtd: spinand: macronix: Add support for serial NAND flashJaimeLiao2023-06-091-0/+20
| | | | | | | | | | | | | MX31LF2GE4BC and MX31UF2GE4BC are Macroninx SPI NAND flash with 8-bit on-die ECC. Validated via normal(default) and QUAD mode by read ,read back, on Xilinx Zynq PicoZed FPGA which include Macronix SPI Host(drivers/spi/spi-mxic.c) Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230608052114.20454-1-jaimeliao.tw@gmail.com
* mtd: spinand: gigadevice: add support for GD5F2GQ5xExxHMd Sadre Alam2023-05-261-0/+10
| | | | | | | | This is 2Gb SLC NAND flash with 4b/512b on-die ECC capability. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230525110526.21998-1-quic_mdalam@quicinc.com
* mtd: spinand: add support for ESMT F50x1G41LBChuanhong Guo2023-04-033-1/+138
| | | | | | | | | | | | | | | | | | | This patch adds support for ESMT F50L1G41LB and F50D1G41LB. It seems that ESMT likes to use random JEDEC ID from other vendors. Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from Micron. For this reason, the ESMT entry is named esmt_c8 with explicit JEDEC ID in variable name. Datasheets: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Tested-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230329114240.378722-1-mmkurbanov@sberdevices.ru
* mtd: spinand: Add support for AllianceMemory AS5F34G04SNDMario Kicherer2023-01-303-1/+155
| | | | | | | | | | | | Add support for AllianceMemory AS5F34G04SND SPI NAND flash Datasheet: - https://www.alliancememory.com/wp-content/uploads/pdf/flash/AllianceMemory_SPI_NAND_Flash_July2020_Rev1.0.pdf Signed-off-by: Mario Kicherer <dev@kicherer.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230126144050.2656358-1-dev@kicherer.org
* mtd: spinand: macronix: use scratch buffer for DMA operationDaniel Golle2023-01-231-1/+2
| | | | | | | | | | | | | | | The mx35lf1ge4ab_get_eccsr() function uses an SPI DMA operation to read the eccsr, hence the buffer should not be on stack. Since commit 380583227c0c7f ("spi: spi-mem: Add extra sanity checks on the op param") the kernel emmits a warning and blocks such operations. Use the scratch buffer to get eccsr instead of trying to directly read into a stack-allocated variable. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/Y8i85zM0u4XdM46z@makrotopia.org
* mtd: spinand: winbond: add Winbond W25N02KV flash supportMikhail Kshevetskiy2022-10-181-0/+75
| | | | | | | | | Add support of Winbond W25N02KV flash Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221010105110.446674-2-mikhail.kshevetskiy@iopsys.eu
* mtd: spinand: winbond: fix flash identificationMikhail Kshevetskiy2022-10-181-2/+2
| | | | | | | | | | | | | | Winbond uses 3 bytes to identify flash: vendor_id, dev_id_0, dev_id_1, but current driver uses only first 2 bytes of it for devices identification. As result Winbond W25N02KV flash (id_bytes: EF, AA, 22) is identified as W25N01GV (id_bytes: EF, AA, 21). Fix this by adding missed identification bytes. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221010105110.446674-1-mikhail.kshevetskiy@iopsys.eu
* mtd: add ECC error accounting for each read requestMichał Kępień2022-09-211-0/+10
| | | | | | | | | | | | | | | | | | | Extend struct mtd_req_stats with two new fields holding the number of corrected bitflips and uncorrectable errors detected during a read operation. This is a prerequisite for ultimately passing those counters to user space, where they can be useful to applications for making better-informed choices about moving data around. Unlike 'max_bitflips' (which is set - in a common code path - to the return value of a function called while the MTD device's mutex is held), these counters have to be maintained in each MTD driver which defines the '_read_oob' callback because the statistics need to be calculated while the MTD device's mutex is held. Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Michał Kępień <kernel@kempniu.pl> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-4-kernel@kempniu.pl
* mtd: spinand: Add support for ATO25D1GAAidan MacDonald2022-06-063-1/+88
| | | | | | | | | | | Add support for the ATO25D1GA SPI NAND flash. Datasheet: - https://atta.szlcsc.com/upload/public/pdf/source/20191212/C469320_04599D67B03B078044EB65FF5AEDDDE9.pdf Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220604113250.4745-1-aidanmacdonald.0x0@gmail.com
* mtd: spinand: Add support for XTX XT26G0xAFelix Matouschek2022-04-213-1/+131
| | | | | | | | | | | | | | | | | Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and XTX26G04AXXXXX SPI NAND. These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC (8bit strength per 512bytes). Tested on Teltonika RUTX10 flashed with OpenWrt. Links: - http://www.xtxtech.com/download/?AId=225 - https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf Signed-off-by: Felix Matouschek <felix@matouschek.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220418132803.664103-1-felix@matouschek.org
* mtd: spinand: gigadevice: add support for GD5FxGM7xExxGChuanhong Guo2022-04-041-0/+60
| | | | | | | | | | | | | | | | Add support for: GD5F{1,2}GM7{U,R}ExxG GD5F4GM8{U,R}ExxG These are new 27nm counterparts for the GD5FxGQ4 chips from GigaDevice with 8b/512b on-die ECC capability. These chips (and currently supported GD5FxGQ5 chips) have QIO DTR instruction for reading page cache. It isn't added in this patch because I don't have a DTR spi controller for testing. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-6-gch981213@gmail.com
* mtd: spinand: gigadevice: add support for GD5F{2, 4}GQ5xExxGChuanhong Guo2022-04-041-0/+48
| | | | | | | | | | | | | Add support for: GD5F2GQ5{U,R}ExxG GD5F4GQ6{U,R}ExxG These chips uses 4 dummy bytes for quad io and 2 dummy bytes for dual io. Besides that and memory layout, they are identical to their 1G variant. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-5-gch981213@gmail.com
* mtd: spinand: gigadevice: add support for GD5F1GQ5RExxGChuanhong Guo2022-04-041-0/+10
| | | | | | | | This chip is the 1.8v version of GD5F1GQ5UExxG. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-4-gch981213@gmail.com
* mtd: spinand: gigadevice: add support for GD5FxGQ4xExxGChuanhong Guo2022-04-041-0/+30
| | | | | | | | | | | | | Add support for: GD5F1GQ4RExxG GD5F2GQ4{U,R}ExxG These chips differ from GD5F1GQ4UExxG only in chip ID, voltage and capacity. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-3-gch981213@gmail.com
* mtd: spinand: gigadevice: fix Quad IO for GD5F1GQ5UExxGChuanhong Guo2022-04-041-1/+9
| | | | | | | | | | | | Read From Cache Quad IO (EBH) uses 2 dummy bytes on this chip according to page 23 of the datasheet[0]. [0]: https://www.gigadevice.com/datasheet/gd5f1gq5xexxg/ Fixes: 469b99248985 ("mtd: spinand: gigadevice: Support GD5F1GQ5UExxG") Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-2-gch981213@gmail.com
* mtd: spinand: Create direct mapping descriptors for ECC operationsMiquel Raynal2022-02-101-2/+33
| | | | | | | | | | | | | | | | | | | | In order for pipelined ECC engines to be able to enable/disable the ECC engine only when needed and avoid races when future parallel-operations will be supported, we need to provide the information about the use of the ECC engine in the direct mapping hooks. As direct mapping configurations are meant to be static, it is best to create two new mappings: one for regular 'raw' accesses and one for accesses involving correction. It is up to the driver to use or not the new ECC enable boolean contained in the spi-mem operation. As dirmaps are not free (they consume a few pages of MMIO address space) and because these extra entries are only meant to be used by pipelined engines, let's limit their use to this specific type of engine and save a bit of memory with all the other setups. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-9-miquel.raynal@bootlin.com
* mtd: spinand: Delay a little bit the dirmap creationMiquel Raynal2022-02-101-8/+8
| | | | | | | | | | | As we will soon tweak the dirmap creation to act a little bit differently depending on the picked ECC engine, we need to initialize dirmaps after ECC engines. This should not have any effect as dirmaps are not yet used at this point. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-8-miquel.raynal@bootlin.com
* mtd: spinand: macronix: Use random program loadMason Yang2022-01-231-1/+1
| | | | | | | | | | Macronix SPI-NAND chips might benefit from an external ECC engine. Such an engine might need to access random columns, thus needing to use random commands (0x84 instead of 0x02). Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-12-miquel.raynal@bootlin.com
* mtd: spinand: macronix: Add Quad support for serial NAND flashJaime Liao2021-08-171-8/+8
| | | | | | | | | | | | Adding FLAG "SPINAND_HAS_QE_BIT" for Quad mode support on Macronix Serial Flash. Validated via normal(default) and QUAD mode by read, erase, read back, on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host(drivers/spi/spi-mxic.c). Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1628472472-32008-1-git-send-email-jaimeliao@mxic.com.tw
* mtd: spinand: core: Properly fill the OOB area.Daniel Palmer2021-08-061-0/+2
| | | | | | | | | | | | | | | | | The comment in spinand_write_to_cache_op() says that spinand_ondie_ecc_prepare_io_req() should 0xff fill the OOB area but it doesn't. This causes the OOB area to get filled with zeros and anytime the first page in a block the bad block marker is cleared and it becomes a bad block on the next boot. This was observed on Longsys FORSEE branded parts and might be specific to these parts. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210617110842.2358461-1-daniel@0x0f.com
* mtd: spinand: Fix commentMiquel Raynal2021-07-161-1/+1
| | | | | | | | | This is a copy paste error, checking the ECC status finishes a page read here, not a page write. Fixes: 945845b54c9c ("mtd: spinand: Instantiate a SPI-NAND on-die ECC engine") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210629195157.567828-1-miquel.raynal@bootlin.com
* Merge tag 'mtd/for-5.14' of ↵Linus Torvalds2021-07-052-40/+201
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Richard Weinberger: "MTD core changes: - Convert list_for_each to entry variant - Use MTD_DEVICE_ATTR_RO/RW() helper macros - Remove unnecessary OOM messages - Potential NULL dereference in mtd_otp_size() - Fix freeing of otp_info buffer - Create partname and partid debug files for child MTDs - tests: - Remove redundant assignment to err - Fix error return code in mtd_oobtest_init() - Add OTP NVMEM provider support - Allow specifying of_node - Convert sysfs sprintf/snprintf family to sysfs_emit Bindings changes: - Convert ti,am654-hbmc.txt to YAML schema - spi-nor: add otp property - Add OTP bindings - add YAML schema for the generic MTD bindings - Add brcm,trx-magic MTD device drivers changes: - Add support for microchip 48l640 EERAM - Remove superfluous "break" - sm_ftl: - Fix alignment of block comment - nftl: - Return -ENOMEM when kmalloc failed - nftlcore: - Remove set but rewrite variables - phram: - Fix error return code in phram_setup() - plat-ram: - Remove redundant dev_err call in platram_probe() MTD parsers changes: - Qcom: - Fix leaking of partition name - Redboot: - Fix style issues - Seek fis-index-block in the right node - trx: - Allow to use TRX parser on Mediatek SoCs - Allow to specify brcm, trx-magic in DT Raw NAND core: - Allow SDR timings to be nacked - Bring support for NV-DDR timings which involved a number of small preparation changes to bring new helpers, properly introduce NV-DDR structures, fill them, differenciate them and pick the best timing set. - Add the necessary infrastructure to parse the new gpio-cs property which aims at enlarging the number of available CS when a hardware controller is too constrained. - Update dead URL - Silence static checker warning in nand_setup_interface() - BBT: - Fix corner case in bad block table handling - onfi: - Use more recent ONFI specification wording - Use the BIT() macro when possible Raw NAND controller drivers: - Atmel: - Ensure the data interface is supported. - Arasan: - Finer grain NV-DDR configuration - Rename the data interface register - Use the right DMA mask - Leverage additional GPIO CS - Ensure proper configuration for the asserted target - Add support for the NV-DDR interface - Fix a macro parameter - brcmnand: - Convert bindings to json-schema - OMAP: - Various fixes and style improvements - Add larger page NAND chips support - PL35X: - New driver - QCOM: - Avoid writing to obsolete register - Delete an unneeded bool conversion - Allow override of partition parser - Marvell: - Minor documentation correction - Add missing clk_disable_unprepare() on error in marvell_nfc_resume() - R852: - Use DEVICE_ATTR_RO() helper macro - MTK: - Remove redundant dev_err call in mtk_ecc_probe() - HISI504: - Remove redundant dev_err call in probe SPI-NAND core: - Light reorganisation for the introduction of a core resume handler - Fix double counting of ECC stats SPI-NAND manufacturer drivers: - Macronix: - Add support for serial NAND flash SPI NOR core changes: - Ability to dump SFDP tables via sysfs - Support for erasing OTP regions on Winbond and similar flashes - Few API doc updates and fixes - Locking support for MX25L12805D SPI NOR controller drivers changes: - Use SPI_MODE_X_MASK in nxp-spifi - Intel Alder Lake-M SPI serial flash support" * tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (125 commits) mtd: spi-nor: remove redundant continue statement mtd: rawnand: omap: Add larger page NAND chips support mtd: rawnand: omap: Various style fixes mtd: rawnand: omap: Check return values mtd: rawnand: omap: Rename a macro mtd: rawnand: omap: Aggregate the HW configuration of the ELM mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller dt-bindings: mtd: pl353-nand: Describe this hardware controller MAINTAINERS: Add PL353 NAND controller entry mtd: rawnand: qcom: avoid writing to obsolete register mtd: rawnand: marvell: Minor documentation correction mtd: rawnand: r852: use DEVICE_ATTR_RO() helper macro mtd: spinand: add SPI-NAND MTD resume handler mtd: spinand: Add spinand_init_flash() helper mtd: spinand: add spinand_read_cfg() helper mtd: rawnand: marvell: add missing clk_disable_unprepare() on error in marvell_nfc_resume() mtd: rawnand: arasan: Finer grain NV-DDR configuration mtd: rawnand: arasan: Rename the data interface register mtd: rawnand: onfi: Fix endianness when reading NV-DDR values mtd: rawnand: arasan: Use the right DMA mask ...
| * mtd: spinand: add SPI-NAND MTD resume handlerPatrice Chotard2021-06-181-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After power up, all SPI NAND's blocks are locked. Only read operations are allowed, write and erase operations are forbidden. The SPI NAND framework unlocks all the blocks during its initialization. During a standby low power, the memory is powered down, losing its configuration. During the resume, the QSPI driver state is restored but the SPI NAND framework does not reconfigured the memory. This patch adds SPI-NAND MTD PM handlers for resume ops. SPI NAND resume op re-initializes SPI NAND flash to its probed state. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210602094913.26472-4-patrice.chotard@foss.st.com
| * mtd: spinand: Add spinand_init_flash() helperPatrice Chotard2021-06-181-29/+45
| | | | | | | | | | | | | | | | | | Add spinand_init_flash() helper which implement all needed init for future SPI-NAND resume ops. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210602094913.26472-3-patrice.chotard@foss.st.com
| * mtd: spinand: add spinand_read_cfg() helperPatrice Chotard2021-06-181-9/+20
| | | | | | | | | | | | | | | | | | Put REG_CFG reading code in spinand_read_cfg(). This function will be needed by the future SPI-NAND resume ops. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210602094913.26472-2-patrice.chotard@foss.st.com
| * mtd: spinand: Fix double counting of ECC statsMiquel Raynal2021-06-111-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the raw NAND world, ECC engines increment ecc_stats and the final caller is responsible for returning -EBADMSG if the verification failed. In the SPI-NAND world it was a bit different until now because there was only one possible ECC engine: the on-die one. Indeed, the spinand_mtd_read() call was incrementing the ecc_stats counters depending on the outcome of spinand_check_ecc_status() directly. So now let's split the logic like this: - spinand_check_ecc_status() is specific to the SPI-NAND on-die engine and is kept very simple: it just returns the ECC status (bonus point: the content of this helper can be overloaded). - spinand_ondie_ecc_finish_io_req() is the caller of spinand_check_ecc_status() and will increment the counters and eventually return -EBADMSG. - spinand_mtd_read() is not tied to the on-die ECC implementation and should be able to handle results coming from other ECC engines: it has the responsibility of returning the maximum number of bitflips which happened during the entire operation as this is the only helper that is aware that several pages may be read in a row. Fixes: 945845b54c9c ("mtd: spinand: Instantiate a SPI-NAND on-die ECC engine") Reported-by: YouChing Lin <ycllin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: YouChing Lin <ycllin@mxic.com.tw> Link: https://lore.kernel.org/linux-mtd/20210527084345.208215-1-miquel.raynal@bootlin.com
| * mtd: spinand: macronix: Add support for serial NAND flashJaime Liao2021-05-261-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Macronix NAND Flash devices are available in different configurations and densities. MX"35" means SPI NAND MX35"LF"/"UF" , LF means 3V and UF meands 1.8V MX35LF"2G" , 2G means 2Gbits MX35LF2G"E4"/"24"/"14", E4 means internal ECC and Quad I/O(x4) 24 means 8-bit ecc requirement and Quad I/O(x4) 14 means 4-bit ecc requirement and Quad I/O(x4) MX35LF2G14AC is 3V 2Gbit serial NAND flash device (without on-die ECC) https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf MX35UF4G24AD is 1.8V 4Gbit serial NAND flash device (without on-die ECC) https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf MX35UF4GE4AD/MX35UF2GE4AD are 1.8V 4G/2Gbit serial NAND flash device with 8-bit on-die ECC https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial NAND flash device with 8-bit on-die ECC https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial NAND flash device (without on-die ECC) https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf Validated via normal(default) and QUAD mode by read, erase, read back, on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host(drivers/spi/spi-mxic.c). Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
* | mtd: spinand: use the spi-mem poll status APIsPatrice Chotard2021-06-031-13/+32
|/ | | | | | | | | | | | | | Make use of spi-mem poll status APIs to let advanced controllers optimize wait operations. This should also fix the high CPU usage for system that don't have a dedicated STATUS poll block logic. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210518162754.15940-3-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
* mtd: spinand: core: add missing MODULE_DEVICE_TABLE()Alexander Lobakin2021-03-281-0/+2
| | | | | | | | | | | | | The module misses MODULE_DEVICE_TABLE() for both SPI and OF ID tables and thus never autoloads on ID matches. Add the missing declarations. Present since day-0 of spinand framework introduction. Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Cc: stable@vger.kernel.org # 4.19+ Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210323173714.317884-1-alobakin@pm.me
* mtd: spinand: gigadevice: Support GD5F1GQ5UExxGReto Schneider2021-03-111-9/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The relevant changes to the already existing GD5F1GQ4UExxG support has been determined by consulting the GigaDevice product change notice AN-0392-10, version 1.0 from November 30, 2020. As the overlaps are huge, variable names have been generalized accordingly. Apart from the lowered ECC strength (4 instead of 8 bits per 512 bytes), the new device ID, and the extra quad IO dummy byte, no changes had to be taken into account. New hardware features are not supported, namely: - Power on reset - Unique ID - Double transfer rate (DTR) - Parameter page - Random data quad IO The inverted semantic of the "driver strength" register bits, defaulting to 100% instead of 50% for the Q5 devices, got ignored as the driver has never touched them anyway. The no longer supported "read from cache during block erase" functionality is not reflected as the current SPI NAND core does not support it anyway. Implementation has been tested on MediaTek MT7688 based GARDENA smart Gateways using both, GigaDevice GD5F1GQ5UEYIG and GD5F1GQ4UBYIG. Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210211113619.3502-1-code@reto-schneider.ch
* mtd: spinand: Fix MTD_OPS_AUTO_OOB requestsMiquel Raynal2021-01-141-3/+11
| | | | | | | | | | | | | | | | | | | | | The initial change breaking the logic is commit 3d1f08b032dc ("mtd: spinand: Use the external ECC engine logic") It inadvertently dropped proper OOB support while doing something else. Shortly later, half of it got re-integrated by commit 868cbe2a6dce ("mtd: spinand: Fix OOB read") (pointing by the way to a more early change which had nothing to do with the issue). Problem is, this commit failed to revert the faulty change entirely and missed the logic handling MTD_OPS_AUTO_OOB requests. Let's fix this mess by re-inserting the missing part now. Fixes: 868cbe2a6dce ("mtd: spinand: Fix OOB read") Reported-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210107083813.24283-1-miquel.raynal@bootlin.com
*-. Merge tags 'spi-nor/for-5.11' and 'nand/for-5.11' into mtd/nextMiquel Raynal2020-12-164-132/+326
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI NOR core changes: - Initial support for stateful Octal DTR mode using volatile settings - Preliminary support for JEDEC 251 (xSPI) and JEDEC 216D standards - Support for Cypress Semper flash - Support to specify ECC block size of SPI NOR flashes - Fixes to avoid clearing of non-volatile Block Protection bits at probe Generic NAND core: * ECC management: - Add an I/O request tweaking mechanism - Entire rework of the software BCH ECC driver, creation of a real ECC engine, getting rid of raw NAND structures, migration to more generic prototypes, misc fixes and style cleanup. Moved now to the Generic NAND layer. - Entire rework of the software Hamming ECC driver, creation of a real ECC engine, getting rid of raw NAND structures, misc renames, comment updates, cleanup, and style fixes. Moved now to the generic NAND layer. - Necessary plumbing at the NAND level to retrieve generic NAND ECC engines (softwares and on-die). - Update of the bindings. Raw NAND core: * Geting rid of the chip->ecc.priv entry. * Fix miscellaneous typos in kernel-doc Raw NAND controller drivers: * AU1550: Ensure the presence of the right includes * Davinci: Do not use extra dereferencing * GPMI: - Fix the driver only sense CS0 R/B issue - Fix the random DMA timeout issue - Use a single line for of_device_id - Use of_device_get_match_data() - Fix reference count leak in gpmi ops - Cleanup makefile - Fix binding matching of clocks on different SoCs * Ingenic: remove redundant get_device() in ingenic_ecc_get() * Intel LGM: New NAND controller driver * Marvell: Drop useless line * Meson: - Fix a resource leak in init - Fix meson_nfc_dma_buffer_release() arguments * mxc: - Use device_get_match_data() - Use a single line for of_device_id - Remove platform data support * Qcom: - Add support for SDX55 - Support for IPQ6018 QPIC NAND controller - Fix DMA sync on FLASH_STATUS register read * Rockchip: New NAND controller driver for RK3308, RK2928 and others * Sunxi: Add MDMA support SPI-NAND core: * Creation of a SPI-NAND on-die ECC engine * Move ECC related definitions earlier in the driver * Fix typo in comment * Fill a default ECC provider/algorithm * Remove outdated comment * Fix OOB read * Allow the case where there is no ECC engine * Use the external ECC engine logic SPI-NAND chip drivers: * Micron: - Add support for MT29F2G01AAAED - Use more specific names * Macronix: - Add support for MX35LFxG24AD - Add support for MX35LFxGE4AD Others: * onenand: Use mtd->oops_panic_write as condition * plat-ram: correctly free memory on error path in platram_probe()
| | * mtd: spinand: macronix: Add support for MX35LFxG24ADYouChing Lin2020-12-101-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Macronix MX35LF1G24AD(/2G24AD/4G24AD) are 3V, 1G/2G/4Gbit serial SLC NAND flash device (without on-die ECC). Validated by read, erase, read back, write, read back on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host(drivers/spi/spi-mxic.c) & S/W BCH ecc(drivers/mtd/nand/ecc-sw-bch.c) with bug fixing patch (mtd: nand: ecc-bch: Fix the size of calc_buf/code_buf of the BCH). Signed-off-by: YouChing Lin <ycllin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1607570529-22341-3-git-send-email-ycllin@mxic.com.tw
| | * mtd: spinand: micron: Add support for MT29F2G01AAAEDThirumalesha Narasimhappa2020-12-101-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit ECC Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-3-nthirumalesha7@gmail.com
| | * mtd: spinand: micron: Use more specific namesThirumalesha Narasimhappa2020-12-101-30/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the read/write/update of SPINAND_OP_VARIANTS() to more specialized names. Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-2-nthirumalesha7@gmail.com
| | * mtd: spinand: macronix: Add support for MX35LFxGE4ADYouChing Lin2020-12-101-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Macronix MX35LF2GE4AD / MX35LF4GE4AD are 3V, 2G / 4Gbit serial SLC NAND flash device (with on-die ECC). Validated by read, erase, read back, write, read back and nandtest on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host (drivers/spi/spi-mxic.c). Signed-off-by: YouChing Lin <ycllin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1604561020-13499-1-git-send-email-ycllin@mxic.com.tw
| | * mtd: spinand: Remove outdated commentMiquel Raynal2020-12-101-4/+0
| | | | | | | | | | | | | | | | | | | | | This comment is no longer true so drop it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201001102014.20100-7-miquel.raynal@bootlin.com
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