| Commit message (Collapse) | Author | Age | Files | Lines |
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* 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6:
UBI: Don't exit from ubi_thread until kthread_should_stop() is true
UBI: fix EBADMSG handling
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If ubi_thread() exits but kthread_should_stop() is not true
then kthread_stop() will never return and cleanup thread
will forever stay in "D" state.
Signed-off-by: Vitaliy Gusev <vgusev@openvz.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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'ubi_io_read_data()' may return EBADMSG in case of an ECC error,
and we should not panic because of this. We have CRC32 checksum
and may check the data. So just ignore the EBADMSG error.
This patch also fixes a minor spelling error at the same time.
Signed-off-by: Zoltan Sogor <weth@inf.u-szeged.hu>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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* git://git.infradead.org/mtd-2.6:
[JFFS2] fix race condition in jffs2_lzo_compress()
[MTD] [NOR] Fix cfi_send_gen_cmd handling of x16 devices in x8 mode (v4)
[JFFS2] Fix lack of locking in thread_should_wake()
[JFFS2] Fix build failure with !CONFIG_JFFS2_FS_WRITEBUFFER
[MTD] [NAND] OMAP2: remove duplicated #include
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For "unlock" cycles to 16bit devices in 8bit compatibility mode we need
to use the byte addresses 0xaaa and 0x555. These effectively match
the word address 0x555 and 0x2aa, except the latter has its low bit set.
Most chips don't care about the value of the 'A-1' pin in x8 mode,
but some -- like the ST M29W320D -- do. So we need to be careful to
set it where appropriate.
cfi_send_gen_cmd is only ever passed addresses where the low byte
is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are
affected by this patch, by masking in the extra low bit when the device
is known to be in compatibility mode.
[dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa]
v4: Fix stupid typo in cfi_build_cmd_addr that failed to compile
I'm writing this patch way to late at night.
v3: Bring all of the work back into cfi_build_cmd_addr
including calling of map_bankwidth(map) and cfi_interleave(cfi)
So every caller doesn't need to.
v2: Only modified the address if we our device_type is larger than our
bus width.
Cc: stable@kernel.org
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Removed duplicated #include <asm/arch/gpmc.h> in
drivers/mtd/onenand/omap2.c.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: Jianjun Kong <jianjun@zeuux.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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replace open_bdev_excl/close_bdev_excl with variants taking fmode_t.
superblock gets the value used to mount it stored in sb->s_mode
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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To keep the size of changesets sane we split the switch by drivers;
to keep the damn thing bisectable we do the following:
1) rename the affected methods, add ones with correct
prototypes, make (few) callers handle both. That's this changeset.
2) for each driver convert to new methods. *ALL* drivers
are converted in this series.
3) kill the old (renamed) methods.
Note that it _is_ a flagday; all in-tree drivers are converted and by the
end of this series no trace of old methods remain. The only reason why
we do that this way is to keep the damn thing bisectable and allow per-driver
debugging if anything goes wrong.
New methods:
open(bdev, mode)
release(disk, mode)
ioctl(bdev, mode, cmd, arg) /* Called without BKL */
compat_ioctl(bdev, mode, cmd, arg)
locked_ioctl(bdev, mode, cmd, arg) /* Called with BKL, legacy */
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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* git://git.infradead.org/mtd-2.6: (69 commits)
Revert "[MTD] m25p80.c code cleanup"
[MTD] [NAND] GPIO driver depends on ARM... for now.
[MTD] [NAND] sh_flctl: fix compile error
[MTD] [NOR] AT49BV6416 has swapped erase regions
[MTD] [NAND] GPIO NAND flash driver
[MTD] cmdlineparts documentation change - explain where mtd-id comes from
[MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection
[MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c
[JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash
[MTD] mtdoops: Fix a bug where block may not be erased
[MTD] mtdoops: Add a magic number to logged kernel oops
[MTD] mtdoops: Fix an off by one error
[JFFS2] Correct parameter names of jffs2_compress() in comments
[MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL
[MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written
[MTD] [MAPS] Remove unused variable after ROM API cleanup.
[MTD] m25p80.c extended jedec support (v2)
[MTD] remove unused mtd parameter in of_mtd_parse_partitions()
[MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE
[MTD] [NAND] driver extension to support NAND on TQM85xx modules
...
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This reverts commit 75d0ee2202b5740e94e913d8a52f91c6557c4c81.
Although it seems ObviouslyCorrectâ„¢, the spi_write() call uses DMA,
while spi_write_then_read() does not. Since our buffer is on the stack,
we must use the latter even though we don't actually want to read
anything back.
Pointed out by David Brownell <david-b@pacbell.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Not all architectures provide readsb(). We should probably move to using
ioread8_rep() instead.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Fix compile error because the first patch was broken -- the file got
truncated.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The CFI information read from AT49BV6416 lists the erase regions in the
wrong order, causing problems when trying to erase or update the first
or last 64KiB block.
Work around this by inverting the "top boot" flag, which will
effectively reverse the order of the erase regions.
This chip is obsolete, but it's used in some existing designs.
Signed-off-by: HÃ¥vard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The patch adds support for NAND flashes connected to GPIOs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: Philip Rakity <prakity@yahoo.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch adds TopBottom detection for most Macronix chips with CFI V1.0.
The main purpose of this patch is to add detection of the MX29LV400C B
used on the LaCie Ethernet Disk mini V2 NAS.
It detects the following parts correctly:-
MX28F640C3B T
MX29LV002C B
MX29LV002NC B
MX29LV004C T
MX29LV400C T/B
MX29LV800C T/B
MX29LV160C T/B
MX29SL800C T/B
MX29SL802C T/B
It detects the following uniform part as bottom but it should work
correctly:-
MX29LV040C
For T parts it causes the erase block table to be reversed correctly.
For other parts it avoids the bogus "Assuming top" message.
It does not detect the following correctly:-
MX28F640C3B B
MX29LV002C T
MX29LV002NC T
MX29LV004C B
MX29SL400C T/B
MX29SL402C T/B
If desired I could supply a more complicated patch to handle these as
well.
Only the MX29LV400C B has been physically tested; others were checked
against their data sheets.
Signed-off-by: Christopher Moore <moore@free.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Below patch fixes the following compilation warnings.
drivers/mtd/nand/cs553x_nand.c:293: warning: unused variable 'mtd_parts'
drivers/mtd/nand/cs553x_nand.c:292: warning: unused variable 'mtd_parts_nb'
Signed-off-by: Manish Katiyar <mkatiyar@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This makes the driver erase a block when it doesn't find any
existing saved log messages which is safer than assuming the
flash was already erased.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Add a magic number to logged kernel oops messages so that they
can be more accurately detected rather than just having to rely
on the sequence number. This also allows easier detection of
saved crashes by userspace.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Fix an off by one error in the mtdoops driver
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch makes debugging a missconfigured UBI a bit easier
by providing the needed information in the boot log.
Signed-off-by: Deepak Saxena <dsaxena@laptop.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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In case of error, the function add_volume returns an ERR pointer. The
result of IS_ERR, which is supposed to be used in a test as it is, is
here checked to be less than zero, which seems odd. We suggest to
replace this test by a simple IS_ERR test.
A simplified version of the semantic match that finds this problem is
as follows:
(http://www.emn.fr/x-info/coccinelle/)
// <smpl>
@def0@
expression x;
position p0;
@@
x@p0 = add_volume(...)
@protected@
expression def0.x,E;
position def0.p0;
position p;
statement S;
@@
x@p0
... when != x = E
if (!IS_ERR(x) && ...) {<... x@p ...>} else S
@unprotected@
expression def0.x,E;
identifier fld;
position def0.p0;
position p != protected.p;
@@
x@p0
... when != x = E
* x@p->fld
// </smpl>
Signed-off-by: Julien Brunel <brunel@diku.dk>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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We do not need BKL in UBI because we serialize things
properly.
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash.
This driver support SH7723.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The functions that write the OOB info (on hardware ECC only) use the
HW_SYNDROME method.
This is not correct : the start position is "pos = eccsize + chunk" and
should be eccsize. So, the standard (nand_write_oob_std) function should
be used. This patch corrects this by using NAND_ECC_HW instead of
NAND_ECC_HW_SYNDROME.
This has only been tested on small pages nand flash.
(if anyone can test it on large pages that would be great).
kernel version : 2.6.27-rc2 (current git mtd-2.6)
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Include missing parts of previous patch.
Signed-off-by: Chen Gong <g.chen@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Removed the Kconfig associated with 'NDFC NanD Flash Controller'.
We can't enable !CONFIG_PPC_MERGE so there is no way to enable
this. Additionally the code needs to get updated for arch/powerpc.
For the time being lets just remove the Kconfig option so we can
actually remove CONFIG_PPC_MERGE.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch extends the FSL UPM NAND driver from Anton Vorontsov to
support hardware which does not have the R/B pin of the NAND chip
connected, like the TQM8548 module:
- The OF_GPIO dependency has been removed from the Kconfig option
because GPIO is not needed. The relevant gpio_* function are then
stubbed out in <linux/gpio.h>.
- It re-introduces the chip-delay property to define an appropriate
maximum delay time (tR) required for read operations. The binding
will be documented in a separate patch.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- Get rid of fsl,wait-pattern and fsl,wait-write. I think this isn't
chip-specific, and we should always do waits. I saw one board that
didn't need fsl,wait-pattern, but I assume this was the exception
that proves the rule;
- Get rid of chip-delay. Today there are no users for this, and if
anyone really need this they should push the OF bindings beforehand;
- Now flash chips should be child nodes of the FSL UPM NAND controller;
- Implement OF partition parsing.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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When iterating over a chain in reverse (oldest block first), this
patch correctly marks the PUtable[] entry of the second to last erase
block of a chain as BLOCK_NIL, regardless of whether or not it can
format the last block successfully. Before, the second to last block
was only marked as pointing to BLOCK_NIL if INFTL_formatblock()
succeeded on the last block of the chain, which could potentially
result in an infinite loop if the block was worn out and refused to
format.
Signed-off-by: Daniel Rosenthal <danielrosenthal@acm.org>
Acked-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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...since it only probes that
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Now that the needed helpers are exported, it becomes a nice simple
switch over. Closes #9420
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The patch fixes CFI issue with multipartitional devices leading to the
set of errors or even deadlock. The problem is CFI FL_SYNCING state race
with flash operations (e.g. erase suspend). It is reproduced by running
intensive writes on one JFFS2 partition and simultaneously performing
mount/unmount cycle on another partition of the same chip.
Signed-off-by: Alexander Belyakov <abelyako@googlemail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Very occasionally, (about one in a million) read operations are
ongoing after the timeout has expired. So, retry three times
while the ongoing bit remains set.
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Minor patch to help debugging of NAND detection.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch moves some attributes out from the platform data into the
dynamically created nand device. This results into a cleaner interface
and allows to use constant pxa3xx_nand_flash definitions.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch marks some attributes as 'const' which are set only once and
never be modified by the driver. There are some changes in parameter
list and variable declarations too which mark them as 'const'.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table. Not enabling this
option saves some space in the generated driver.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch adds 'flash' and 'num_flash' attributes to the platform data.
There was added code in the driver to iterate across these attributes in the
detect-flash routine. This is done similarly to the existing method
which uses a 'builtin_flash_types' field.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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This patch moves the exported datastructures from the pxa3xx_nand.c driver
into the <mach/pxa3xx_nand.h> header. This is a plain movement without
any modification of the attributes.
This is the first one of a set of patches which:
* allows to specify used NAND flash in the platform code and allows to turn
off the old way to specify NAND characteristics in the driver. This way did
not worked well as these characteristics depend on the platform and can not be
derived from NAND id alone.
E.g. some NAND chips share the same ID (e.g. K9K8G08U0A and K9NBG08U5A) but
have different timings (which are written in the common driver currently and
must be modified there).
* adds 'const' annotations at various places
Further patches will be sent to the mtd-list.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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