summaryrefslogtreecommitdiffstats
path: root/drivers/net/dsa/mv88e6xxx/port.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* net: dsa: mv88e6xxx: add PHYLINK supportRussell King2018-05-111-0/+39
* net: dsa: allow XAUI phy interface modeRussell King2017-12-131-0/+1
* net: dsa: mv88e6xxx: better IEEE Prio Mapping Table descriptionVivien Didelot2017-06-201-6/+5
* net: dsa: mv88e6xxx: prefix remaining port macrosVivien Didelot2017-06-131-3/+3
* net: dsa: mv88e6xxx: prefix Port IEEE Priority mapping macrosVivien Didelot2017-06-131-17/+20
* net: dsa: mv88e6xxx: prefix Port Egress Rate Control macrosVivien Didelot2017-06-131-2/+4
* net: dsa: mv88e6xxx: prefix Port Control 2 macrosVivien Didelot2017-06-131-24/+24
* net: dsa: mv88e6xxx: prefix Port Default VLAN macrosVivien Didelot2017-06-131-6/+9
* net: dsa: mv88e6xxx: prefix Port Based VLAN macrosVivien Didelot2017-06-131-5/+5
* net: dsa: mv88e6xxx: prefix Port Control 1 macrosVivien Didelot2017-06-131-7/+10
* net: dsa: mv88e6xxx: prefix Port Control macrosVivien Didelot2017-06-131-41/+41
* net: dsa: mv88e6xxx: prefix Port Jamming macrosVivien Didelot2017-06-131-6/+9
* net: dsa: mv88e6xxx: prefix Port MAC Control macrosVivien Didelot2017-06-131-37/+43
* net: dsa: mv88e6xxx: prefix Port Status macrosVivien Didelot2017-06-131-10/+10
* net: dsa: mv88e6xxx: rework jumbo size operationVivien Didelot2017-06-091-2/+12
* net: dsa: mv88e6xxx: rework pause limit operationVivien Didelot2017-06-091-5/+7
* net: dsa: mv88e6xxx: use bridge state valuesVivien Didelot2017-06-091-0/+20
* net: dsa: mv88e6xxx: add egress mode enumerationVivien Didelot2017-06-091-2/+18
* net: dsa: mv888e6xxx: do not use netdev printingVivien Didelot2017-06-091-21/+18
* net: dsa: mv88e6xxx: fix 6085 frame mode maskingVivien Didelot2017-06-061-1/+1
* net: dsa: mv88e6xxx: rename chip headerVivien Didelot2017-06-051-1/+2
* net: dsa: fix copyright holderVivien Didelot2017-03-291-1/+2
* net: dsa: mv88e6xxx: add port priority override opVivien Didelot2017-03-131-0/+7
* net: dsa: mv88e6xxx: add port ATU learn limit opVivien Didelot2017-03-131-0/+7
* net: dsa: mv88e6xxx: fix port egress flooding modeVivien Didelot2017-03-131-13/+31
* net: dsa: mv88e6xxx: setup message portsVivien Didelot2017-03-131-0/+18
* net: dsa: mv88e6xxx: add port mask helperVivien Didelot2017-03-131-1/+1
* net: dsa: mv88e6xxx: Refactor remaining port setupAndrew Lunn2017-02-071-0/+48
* net: dsa: mv88e6xxx: Set the CMODE for mv88e6390 ports 9 & 10Andrew Lunn2017-02-071-0/+64
* net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5GbpsAndrew Lunn2017-02-031-1/+1
* net: dsa: mv88e6xxx: Implement mv88e6390 pause controlAndrew Lunn2016-12-041-0/+13
* net: dsa: mv88e6xxx: Refactor pause configurationAndrew Lunn2016-12-041-0/+11
* net: dsa: mv88e6xxx: Refactor egress rate limitingAndrew Lunn2016-12-041-0/+12
* net: dsa: mv88e6xxx: Refactor setting of jumbo framesAndrew Lunn2016-12-041-0/+14
* net: dsa: mv88e6xxx: Refactor CPU and DSA port setupAndrew Lunn2016-12-041-0/+118
* net: dsa: mv88e6xxx: Implement mv88e6390 tag remapAndrew Lunn2016-12-041-0/+63
* net: dsa: mv88e6xxx: Respect SPEED_UNFORCED, don't set force bitAndrew Lunn2016-11-161-1/+1
* net: dsa: mv88e6xxx: Don't modify RGMII delays when not RGMII modeAndrew Lunn2016-11-141-2/+3
* net: dsa: mv88e6xxx: add port's MAC speed setterVivien Didelot2016-11-041-0/+138
* net: dsa: mv88e6xxx: add port's RGMII delay setterVivien Didelot2016-11-041-0/+58
* net: dsa: mv88e6xxx: add port duplex setterVivien Didelot2016-11-041-0/+36
* net: dsa: mv88e6xxx: add port link setterVivien Didelot2016-11-041-0/+41
* net: dsa: mv88e6xxx: add port 802.1Q mode setterVivien Didelot2016-11-041-0/+32
* net: dsa: mv88e6xxx: add port PVID accessorsVivien Didelot2016-11-041-0/+38
* net: dsa: mv88e6xxx: add port FID accessorsVivien Didelot2016-11-041-0/+67
* net: dsa: mv88e6xxx: add port vlan map setterVivien Didelot2016-11-041-0/+25
* net: dsa: mv88e6xxx: add port state setterVivien Didelot2016-11-041-0/+31
* net: dsa: mv88e6xxx: add port filesVivien Didelot2016-11-041-0/+31
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 21:05:30 +0100