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* net: phy: Allow building mdio-boardinfo into the kernelFlorian Fainelli2017-03-291-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | mdio-boardinfo contains code that is helpful for platforms to register specific MDIO bus devices independent of how CONFIG_MDIO_DEVICE or CONFIG_PHYLIB will be selected (modular or built-in). In order to make that possible, let's do the following: - descend into drivers/net/phy/ unconditionally - make mdiobus_setup_mdiodev_from_board_info() take a callback argument which allows us not to expose the internal MDIO board info list and mutex, yet maintain the logic within the same file - relocate the code that creates a MDIO device into drivers/net/phy/mdio_bus.c - build mdio-boardinfo.o into the kernel as soon as MDIO_DEVICE is defined (y or m) Fixes: 90eff9096c01 ("net: phy: Allow splitting MDIO bus/device support from PHYs") Fixes: 648ea0134069 ("net: phy: Allow pre-declaration of MDIO devices") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: Allow splitting MDIO bus/device support from PHYsFlorian Fainelli2017-03-241-2/+11
| | | | | | | | | | | | | | | | | | | | | | Introduce a new configuration symbol: MDIO_DEVICE which allows building the MDIO devices and bus code, without pulling in the entire Ethernet PHY library and devices code. PHYLIB nows select MDIO_DEVICE and the relevant Makefile files are updated to reflect that. When MDIO_DEVICE (MDIO bus/device only) is selected, but not PHYLIB, we have mdio-bus.ko as a loadable module, and it does not have a module_exit() function because the safety of removing a bus class is unclear. When both MDIO_DEVICE and PHYLIB are enabled, we need to assemble everything into a common loadable module: libphy.ko because of nasty circular dependencies between phy.c, phy_device.c and mdio_bus.c which are really tough to untangle. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: move phy MMD accessors to phy-core.cRussell King2017-03-221-1/+1
| | | | | | | | | | | | Move the phy_(read|write)__mmd() helpers out of line, they will become our main MMD accessor functions, and so will be a little more complex. This complexity doesn't belong in an inline function. Also move the _indirect variants as well to keep like functionality together. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: Allow pre-declaration of MDIO devicesFlorian Fainelli2017-02-071-1/+2
| | | | | | | | | | | | Allow board support code to collect pre-declarations for MDIO devices by registering them with mdiobus_register_board_info(). SPI and I2C buses have a similar feature, we were missing this for MDIO devices, but this is particularly useful for e.g: MDIO-connected switches which need to provide their port layout (often board-specific) to a MDIO Ethernet switch driver. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: Add Meson GXL Internal PHY driverNeil Armstrong2016-11-091-0/+1
| | | | | | | | | | | | | | | | Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs. This PHY seems to only implement some standard registers and need some workarounds to provide autoneg values from vendor registers. Some magic values are currently used to configure the PHY, and this a temporary setup until clarification about these registers names and registers fields are provided by Amlogic. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: leds: add support for led triggers on phy link state changeZach Brown2016-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Create an option CONFIG_LED_TRIGGER_PHY (default n), which will create a set of led triggers for each instantiated PHY device. There is one LED trigger per link-speed, per-phy. The triggers are registered during phy_attach and unregistered during phy_detach. This allows for a user to configure their system to allow a set of LEDs not controlled by the phy to represent link state changes on the phy. LEDS controlled by the phy are unaffected. For example, we have a board where some of the leds in the RJ45 socket are controlled by the phy, but others are not. Using the triggers provided by this patch the leds not controlled by the phy can be configured to show the current speed of the ethernet connection. The leds controlled by the phy are unaffected. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: Zach Brown <zach.brown@ni.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: Sort Makefile and KconfigAndrew Lunn2016-08-201-37/+39
| | | | | | | | | | Sort the files to reduce merge conflicts and to make it easier to find drivers by name. Also separate the MDIO bus drivers from the PHY drivers, again to help find what you need. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: Add gmiitorgmii converter supportAppana Durga Kedareswara Rao2016-08-131-0/+1
| | | | | | | | | | | | | | | | | | This patch adds support for gmiitorgmii converter. The GMII to RGMII IP core provides the Reduced Gigabit Media Independent Interface (RGMII) between Ethernet physical media Devices and the Gigabit Ethernet controller. This core can Switch dynamically between the three different speed modes of Operation by configuring the converter register through mdio write. MDIO interface is used to set operating speed of Ethernet MAC. This converter sits between the MAC and the external phy MAC <==> GMII2RGMII <==> RGMII_PHY Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Microsemi VSC 8531/41 PHY DriverRaju Lakkaraju2016-08-091-0/+1
| | | | | | | | | | | | | | Hello, I added all review comments and re-sending for review. >From a5017f5878a92d2acec86a6a29b1498c457cb73a Mon Sep 17 00:00:00 2001 From: Nagaraju Lakkaraju <Raju.Lakkaraju@microsemi.com> Date: Wed, 3 Aug 2016 18:28:24 +0530 Subject: [PATCH v2] net: phy: Add drivers for Microsemi PHYs Signed-off-by: Nagaraju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers: net: phy: xgene: Add MDIO driverIyappan Subramanian2016-07-261-0/+1
| | | | | | | | | | | | | | | Currently, SGMII based 1G rely on the hardware registers for link state and sometimes it's not reliable. To get most accurate link state, this interface has to use the MDIO bus to poll the PHY. In X-Gene SoC, MDIO bus is shared across RGMII and SGMII based 1G interfaces, so adding this driver to manage MDIO bus. This driver registers the mdio bus and registers the PHYs connected to it. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Fushen Chen <fchen@apm.com> Tested-by: Toan Le <toanle@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: Add MDIO bus driver for the Hisilicon FEMACDongpo Li2016-07-171-0/+1
| | | | | | | | | | | This patch adds a separate driver for the MDIO interface of the Hisilicon Fast Ethernet MAC. Signed-off-by: Dongpo Li <lidongpo@hisilicon.com> Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: move fixed_phy MII register generation to a libraryRussell King2016-06-271-1/+2
| | | | | | | | | Move the fixed_phy MII register generation to a library to allow other software phy implementations to use this code. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mdio-mux: Add MDIO mux driver for iProc SoCsPramod Kumar2016-06-111-0/+1
| | | | | | | | | | | | | | | iProc based SoCs supports the integrated mdio multiplexer which has the bus selection as well as mdio transaction generation logic inside. This multiplexer has child buses for PCIe, SATA, USB and ETH. These buses could be internal or external to SOC where PHYs are attached. These buses could use C-45 or C-22 mdio transaction. Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* NET: PHY: adds driver for Intel XWAY PHYHauke Mehrtens2016-06-111-0/+1
| | | | | | | | | This adds support for the Intel (former Lantiq) XWAY 11G and 22E PHYs. These PHYs are also named PEF 7061, PEF 7071, PEF 7072. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: mdio-thunder: Add driver for Cavium Thunder SoC MDIO buses.David Daney2016-03-141-0/+1
| | | | | | | | | | | | | | The Cavium Thunder SoCs have multiple MIDO buses that are part of a single PCI device. To model this in the device tree we call the PCI parent device a "cavium,thunder-8890-mdio-nexus", it has several children, one for each MDIO bus. The MDIO bus hardware is identical to that found in the OCTEON SoCs, so we use that code for things that are not part of the PCI driver probe/remove Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: mdio-octeon: Refactor into two files/modulesDavid Daney2016-03-141-0/+1
| | | | | | | | | | | | | | | | | | | A follow-on patch uses PCI probing to find the Thunder MDIO hardware. In preparation for this, split out the common code into a new file mdio-cavium.c, which will be used by both the existing OCTEON driver, and the new Thunder PCI based driver. As part of the refactoring simplify the struct cavium_mdiobus by removing fields that are only ever used in the probe function and can just as well be local variables. Use readq/writeq in preference to readq_relaxed/writeq_relaxed as the relaxed form was an optimization for an early chip revision, and the MDIO drivers are not performance bottlenecks that need optimization in the first place. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mdio: Add support for mdio drivers.Andrew Lunn2016-01-071-1/+1
| | | | | | | | | Not all devices on an MDIO bus are PHYs. Meaning not all MDIO drivers are PHY drivers. Add support for generic MDIO drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2015-10-241-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: net/ipv6/xfrm6_output.c net/openvswitch/flow_netlink.c net/openvswitch/vport-gre.c net/openvswitch/vport-vxlan.c net/openvswitch/vport.c net/openvswitch/vport.h The openvswitch conflicts were overlapping changes. One was the egress tunnel info fix in 'net' and the other was the vport ->send() op simplification in 'net-next'. The xfrm6_output.c conflicts was also a simplification overlapping a bug fix. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: phy: dp83848: Add TI DP83848 Ethernet PHYAndrew F. Davis2015-10-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the TI DP83848 Ethernet PHY device. The DP83848 is a highly reliable, feature rich, IEEE 802.3 compliant single port 10/100 Mb/s Ethernet Physical Layer Transceiver supporting the MII and RMII interfaces. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: Broadcom Cygnus internal Etherent PHY driverArun Parameswaran2015-10-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Broadcom Cygnus SoCs internal PHY's. The PHYs are 1000M/100M/10M capable with support for 'EEE' and 'APD' (Auto Power Down). This driver supports the following Broadcom Cygnus SoCs: - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305) - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360) The PHY's on these SoC's require some workarounds for stable operation, both during configuration time and during suspend/resume. This driver handles the application of the workarounds. Signed-off-by: Arun Parameswaran <arunp@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: Add Broadcom phy library for common interfacesArun Parameswaran2015-10-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | This patch adds the Broadcom phy library to consolidate common interfaces shared by Broadcom phy's. Moved the common interfaces to the 'bcm-phy-lib.c' and updated the Broadcom PHY drivers to use the new APIs. Signed-off-by: Arun Parameswaran <arunp@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: Broadcom iProc MDIO bus driverArun Parameswaran2015-10-081-0/+1
|/ | | | | | | | | | | | This patch adds support for the Broadcom iProc MDIO bus interface. The MDIO interface can be found in the Broadcom iProc family Soc's. The MDIO bus is accessed using a combination of command and data registers. This MDIO driver provides access to the Etherent GPHY's connected to the MDIO bus. Signed-off-by: Arun Parameswaran <arunp@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* add microchip LAN88xx phy driverWoojung.Huh@microchip.com2015-09-101-0/+1
| | | | | | | Add Microchip LAN88XX phy driver for phylib. Signed-off-by: Woojung Huh <woojung.huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: add driver for aquantia phyShaohui Xie2015-08-011-0/+1
| | | | | | | | This patch added driver to support Aquantia PHYs AQ1202, AQ2104, AQR105, AQR405, which accessed through clause 45. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phylib: add driver for Teranetics TN2020Shaohui Xie2015-07-211-0/+1
| | | | | | | Teranetics TN2020 is compliant with IEEE 802.3an 10 Gigabit. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: dp83867: Add TI dp83867 phyDan Murphy2015-06-041-0/+1
| | | | | | | | | | | | | Add support for the TI dp83867 Gigabit ethernet phy device. The DP83867 is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* amd-xgbe: Move the PHY support into amd-xgbeLendacky, Thomas2015-05-151-1/+0
| | | | | | | | | | | | | The AMD XGBE device is intended to work with a specific integrated PHY and that PHY is not meant to be a standalone PHY for use by other devices. As such this patch removes the phylib driver and implements the PHY support in the amd-xgbe driver (the majority of the logic from the phylib driver is moved into the amd-xgbe driver). Update the driver version to 1.0.1. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: Allow FIXED_PHY to be modular.David S. Miller2014-12-161-1/+1
| | | | | | | | | | | Otherwise we get things like: warning: (NET_DSA_BCM_SF2 && BCMGENET && SYSTEMPORT) selects FIXED_PHY which has unmet direct dependencies (NETDEVICES && PHYLIB=y) In order to make this work we have to rename fixed.c to fixed_phy.c because the regulator drivers already have a module named "fixed.o". Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: add generic UniMAC MDIO bus driverFlorian Fainelli2014-08-281-0/+1
| | | | | | | | | Add a generic UniMAC MDIO bus driver and its Device Tree binding, which can be used by the BCMGENET driver as-is, and the upcoming Starfighter 2 Ethernet switch MDIO bus controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* amd-xgbe: Configuration and build supportLendacky, Thomas2014-06-061-0/+1
| | | | | | | | | This patch provides the Kconfig and Makefile changes needed to configure and build the AMD 10GbE platform driver and the AMD 10GbE phylib driver. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: phy: add Broadcom BCM7xxx internal PHY driverFlorian Fainelli2014-02-141-0/+1
| | | | | | | | | | | | | | | This patch adds support for the Broadcom BCM7xxx Set Top Box SoCs internal PHYs. This driver supports the following generation of SoCs: - BCM7366, BCM7439, BCM7445 (28nm process) - all 40nm and 65nm (older MIPS-based SoCs) The PHYs on these SoCs require a bunch of workarounds to operate correctly, both during configuration time and at suspend/resume time, the driver handles that for us. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: Add MOXA MDIO driverJonas Jensen2013-11-071-0/+1
| | | | | | | | | | The MOXA UC-711X hardware(s) has an ethernet controller that seem to be developed internally. The IC used is "RTL8201CP". This patch adds an MDIO driver which handles the MII bus. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: Add MDIO bus driver for the Allwinner EMACMaxime Ripard2013-06-011-0/+1
| | | | | | | | | This patch adds a separate driver for the MDIO interface of the Allwinner ethernet controllers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: add AT803x driverMatus Ujhelyi2012-10-181-0/+1
| | | | | | | This driver add support for wake over lan on AT803x phys. Signed-off-by: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* netdev/phy: add MDIO bus multiplexer driven by a memory-mapped deviceTimur Tabi2012-08-301-0/+1
| | | | | | | | | | | | Add support for an MDIO bus multiplexer controlled by a simple memory-mapped device, like an FPGA. The device must be memory-mapped and contain only 8-bit registers (which keeps things simple). Tested on a Freescale P5020DS board which uses the "PIXIS" FPGA attached to the localbus. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* netdev/phy: Add driver for Broadcom BCM87XX 10G Ethernet PHYsDavid Daney2012-06-281-0/+1
| | | | | | | | | | | | | | Add a driver for BCM8706 and BCM8727 devices. These are a 10Gig PHYs which use MII_ADDR_C45 addressing. They are always 10G full duplex, so there is no autonegotiation. All we do is report link state and send interrupts when it changes. If the PHY has a device tree of_node associated with it, the "broadcom,c45-reg-init" property is used to supply register initialization values when config_init() is called. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* netdev/of/phy: Add MDIO bus multiplexer driven by GPIO lines.David Daney2012-05-081-0/+1
| | | | | | | | | | The GPIO pins select which sub bus is connected to the master. Initially tested with an sn74cbtlv3253 switch device wired into the MDIO bus. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* netdev/of/phy: Add MDIO bus multiplexer support.David Daney2012-05-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a somewhat generic framework for MDIO bus multiplexers. It is modeled on the I2C multiplexer. The multiplexer is needed if there are multiple PHYs with the same address connected to the same MDIO bus adepter, or if there is insufficient electrical drive capability for all the connected PHY devices. Conceptually it could look something like this: ------------------ | Control Signal | --------+--------- | --------------- --------+------ | MDIO MASTER |---| Multiplexer | --------------- --+-------+---- | | C C h h i i l l d d | | --------- A B --------- | | | | | | | PHY@1 +-------+ +---+ PHY@1 | | | | | | | --------- | | --------- --------- | | --------- | | | | | | | PHY@2 +-------+ +---+ PHY@2 | | | | | --------- --------- This framework configures the bus topology from device tree data. The mechanics of switching the multiplexer is left to device specific drivers. The follow-on patch contains a multiplexer driven by GPIO lines. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: add am79c874 PHY supportHeiko Schocher2012-03-191-0/+1
| | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: Micrel KS8995MA 5-ports 10/100 managed Ethernet switch support addedFrederic LAMBERT2011-12-191-0/+1
| | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Frederic Lambert <frdrc66@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ptp: Added a clock driver for the National Semiconductor PHYTER.Richard Cochran2011-05-231-0/+1
| | | | | | | | | This patch adds support for the PTP clock found on the DP83640. The basic clock operations and one external time stamp have been implemented. Signed-off-by: Richard Cochran <richard.cochran@omicron.at> Signed-off-by: John Stultz <john.stultz@linaro.org>
* drivers/net/phy: micrel phy driverDavid J. Choi2010-05-041-0/+1
| | | | | | | This is the first version of phy driver from Micrel Inc. Signed-off-by: David J. Choi <david.choi@micrel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* NET: Add driver for Octeon MDIO buses.David Daney2009-12-171-0/+1
| | | | | | | | | | | | | | | | | The Octeon SOC has two types of Ethernet ports, each type with its own driver. However, the PHYs for all the ports are controlled by a common MDIO bus. Because the mdio driver is not associated with a particular driver, but is instead a system level resource, we create s stand-alone driver for it. As for the driver, we put the register definitions in arch/mips/include/asm/octeon where most of the other Octeon register definitions live. This is a platform driver with the platform device for "mdio-octeon" being registered in the platform startup code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add integrated ethernet PHY support for phylib.Maxime Bizon2009-07-081-0/+1
| | | | | | | | | | | | Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> drivers/net/phy/Kconfig | 6 ++ drivers/net/phy/Makefile | 1 drivers/net/phy/bcm63xx.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 139 insertions(+) create mode 100644 drivers/net/phy/bcm63xx.c Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: Add LSI ET1011C PHY driverChaithrika U S2008-12-101-0/+1
| | | | | | | | Adds LSI ET1011C PHY driver. This driver is used by TI DM646x EVM. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: add the ST ste10Xp PHYsGiuseppe Cavallaro2008-11-291-0/+1
| | | | | | | | | | This patch adds the STMicroelectronics ste10xp PHY device driver. It supports both the ste100p and the ste101p devices. Suspend/resume alredy added. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phy: add natsemi PHY driverGiuseppe Cavallaro2008-11-291-0/+1
| | | | | | | | This patch adds the PHY device driver for the National Semiconductor DP83865 Gig PHYTER. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* phylib: rename mdio-ofgpio to mdio-gpioPaulius Zaleckas2008-11-171-1/+1
| | | | | Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: OpenFirmware GPIO based MDIO bitbang driverLaurent Pinchart2008-05-311-0/+1
| | | | | | | | This patch adds an MDIO bitbang driver that uses the GPIO library and its OF bindings to access the bus I/Os. Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* phylib: Add Realtek 821x eth PHY supportJohnson Leung2008-02-031-0/+1
| | | | | | | | | | | this PHY present on the MPC8315E and MPC837xE RDB boards. Signed-off-by: Johnson Leung <r58129@freescale.com> Signed-off-by: Kevin Lam <r43770@freescale.com> Signed-off-by: Joe D'Abbraccio <ljd015@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 16:29:49 +0100