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path: root/drivers/net/wireless/ath/ath9k/hw.c (follow)
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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2011-11-071-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (47 commits) forcedeth: fix a few sparse warnings (variable shadowing) forcedeth: Improve stats counters forcedeth: remove unneeded stats updates forcedeth: Acknowledge only interrupts that are being processed forcedeth: fix race when unloading module MAINTAINERS/rds: update maintainer wanrouter: Remove kernel_lock annotations usbnet: fix oops in usbnet_start_xmit ixgbe: Fix compile for kernel without CONFIG_PCI_IOV defined etherh: Add MAINTAINERS entry for etherh bonding: comparing a u8 with -1 is always false sky2: fix regression on Yukon Optima netlink: clarify attribute length check documentation netlink: validate NLA_MSECS length i825xx:xscale:8390:freescale: Fix Kconfig dependancies macvlan: receive multicast with local address tg3: Update version to 3.121 tg3: Eliminate timer race with reset_task tg3: Schedule at most one tg3_reset_task run tg3: Obtain PCI function number from device ...
| * ath9k_hw: Fix noise floor calibration timeout on fast channel changeRajkumar Manoharan2011-11-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | During the fast channel change noise floor values are being loaded twice at init_cal and after channel_change. The commit "ath9k_hw: Improve fast channel change for AR9003 chips" overlooked it that caused failure to load nf while doing bgscan. This patch performs noise floor calibration after the fast and full reset. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* | drivers/net: Add module.h to drivers who were implicitly using itPaul Gortmaker2011-11-011-0/+1
|/ | | | | | | | The device.h header was including module.h, making it present for most of these drivers. But we want to clean that up. Call out the include of module.h in the modular network drivers. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* ath9k: Rename AR9480 into AR9462Rajkumar Manoharan2011-10-141-14/+14
| | | | | | | | Renamed to be in sync with Marketing term and to avoid confusion with other chip names. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Do fast channel change based on reusable calibration resultsRajkumar Manoharan2011-10-141-2/+12
| | | | | | | | | | Support the fast channel change across band switch only when there are available of reusable cabliration results. And also observed that doing agc control calibration on fastcc, sometimes causing calibration timeout. Hence changing agc control to be run only on full chip reset. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add radio retention support for AR9480Rajkumar Manoharan2011-10-141-0/+4
| | | | | | | | | | Supported calibrations of radio retention table (RTT) are - DC offset - Filter - Peak detect Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Support fast channel change on 5GHz for AR9003 chipsRajkumar Manoharan2011-10-141-2/+1
| | | | | | | | | | | The commit "ath9k_hw: Improve fast channel change for AR9003 chips" fixes the fast channel change issue for AR9003 chips that was originally observed in AR9382 chip. Hence enabling fastcc support again for 11A channel for AR9003 chips. Cc: Paul Stewart <pstew@google.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Cleanup Tx calibrations for AR9003 chipsRajkumar Manoharan2011-10-141-0/+5
| | | | | | | | | | | | Currently Tx IQ calibration is enabled by default for all AR9003 chips. But for AR9480, the calibration status should be read from chip after processing ini. And also the carrier leak calibration status is checked during init cal. As the init_cal is being called for fast channel change too, the tx_cl status only be read after full reset. Hence moving that into process ini function. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add support to reuse Carrier leak calibrationRajkumar Manoharan2011-10-141-1/+3
| | | | | | | | This patch adds support to reuse Carrier leak calibration during fast channel change for AR9480 chips. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Improve fast channel change for AR9003 chipsRajkumar Manoharan2011-10-141-0/+32
| | | | | | | | | | | | | | | | | In order to reduce the overall scan time, fast channel change should be implemented properly. This patch adds fast channel change support across band switch or channel mode switch instead of doing full chip reset. During the fastcc, tx iqcal measurements are preserved and will be reloaded after successful the channel change. This patch also addressed fast channel issue where the STA can not see APs in higher than operating channel on 5GHz band after the association. Cc: Paul Stewart <pstew@google.com> Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Fix ASPM L1 issue for AR9480Rajkumar Manoharan2011-10-141-2/+4
| | | | | | | | | | Because of not clearing Bit 14 of AR_WA, the ASPM L1 is not enabled when entering into sleep mode. AR9480 does not need bit 14 to be set. Cc: stable@kernel.org Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath: remove ath_regulatory::current_rd_extFelix Fietkau2011-10-111-5/+0
| | | | | | | | It is unused since the previous dead code that was using it had been removed earlier. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: clean up tx power handlingFelix Fietkau2011-10-111-20/+43
| | | | | | | | | | | | | | | The code for handling various restrictions concerning regulatory limits, antenna gain, etc. is very convoluted and duplicated across various EEPROM parsing implementations, making it hard to review. This patch partially cleans up the mess by unifying regulatory limit handling in one function and simplifying handling of antenna gain. It also removes unused transmit power scaling arrays from the EEPROM code, which belonged to an unimplemented API that isn't supposed to be in the driver anyway. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: set pci_express capability true for AR9480Mohammed Shafi Shajakhan2011-10-031-1/+6
| | | | | | | | | | | the AR_SREV register does not seems to indicate whether AR9480 is pci_express capable or not though the other information like macVersion etc can be obtained properly. this fix is essential as ASPM won't be intialized and its related driver functionality ath9k_hw_configpcipowersave won't be called Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Fix number of GPIO pins for AR9287/9300Mohammed Shafi Shajakhan2011-10-031-0/+4
| | | | | | | | | | | | this patch fixes the assumption of maximum number of GPIO pins present in AR9287/AR9300. this fix is essential as we might encounter some functionality issues involved in accessing the status of GPIO pins which are all incorrectly assumed to be not within the range of max_num_gpio of AR9300/AR9287 chipsets Cc: stable@kernel.org Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Do full chip reset on 11A channels for AR9003Rajkumar Manoharan2011-09-161-3/+5
| | | | | | | | | | AR9003 seems to have issues sometimes with fast channel change in 5GHz and this case is handled specifically for AR9280 by doing a full reset. Let's do a full reset for 5GHz channles of AR9380 & for all channels of AR9280 pci chips. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add support for AR946/8x chipsets.Senthil Balasubramanian2011-09-161-8/+65
| | | | | | | This patch adds support for AR946/8x chipets. Signed-off-by: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: eliminate common->{rx,tx}_chainmaskFelix Fietkau2011-09-141-3/+2
| | | | | | | we already have ah->{rx,tx}chainmask for the same purpose Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: ath9k_hw_set_txpowerlimit sets previous txpowerBill Jordan2011-09-131-2/+2
| | | | | | | | | | | | In commit 9c204b46c7af93e334114bea1f5eeaa6fea9ba07 (ath9k_hw: do not limit initial tx power to 20 dbm), setting of txpower was broken. This patch fixes it by initializing reg_pwr from the new power limit, not the previous value. Signed-off-by: Bill Jordan <bjordan@rajant.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Fix rx latency of 11a modeRajkumar Manoharan2011-09-131-2/+5
| | | | | | | | Rx latecy to start signal(usec) of 11a is 41 not 37 and also corrected the rx delay in quarter rate. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: do not apply the 2.4 ghz ack timeout workaround to ctsFelix Fietkau2011-09-131-2/+3
| | | | | | | | | | | It is only used to workaround interoperability issues related to longer delays in receiving the block ack, so it is not necessary to apply it to the CTS exchange. Should improve throughput slightly, especially when there are lots of retransmissions. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: Fix eifs/usec timeout for AR9287 v1.3+Rajkumar Manoharan2011-08-291-2/+8
| | | | | | | | | | For AR9287 v1.3+ chips, MAC runs at 117MHz. But the initvals IFS parameters are loaded based on 44/88MHz clockrate. So eifs/usec from ini should not be used for AR9287 v1.3+. The mentioned values are tested on 2 chain HT40 mode. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Set default slottime as 9usRajkumar Manoharan2011-08-291-1/+1
| | | | | | | | Initialize 9us slot time as that is what is used mostly (for non-ERP cases) and also to be in sync with initvals. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: add missing AR9340 in ath_mac_bb_namesFlorian Fainelli2011-08-291-0/+1
| | | | | | | | AR9340 is not listed in ath_mac_bb_names, which leads to such a message: ieee80211 phy0: Atheros AR???? Rev:0 mem=0xb8100000, irq=2 Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: add AR9580 supportLuis R. Rodriguez2011-08-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here are the AR9580 1.0 initvals checksums using the Atheros initvals-tools [1]. This is useful for when we udate the initvals again with other values. It ensures that we match the same initvals used internally. The tool is documented on the wiki [2]. $ ./initvals -f ar9580-1p0 0x00000000e912711f ar9580_1p0_modes_fast_clock 0x000000004a488fc7 ar9580_1p0_radio_postamble 0x00000000f3888b02 ar9580_1p0_baseband_core 0x0000000003f783bb ar9580_1p0_mac_postamble 0x0000000094be244a ar9580_1p0_low_ob_db_tx_gain_table 0x0000000094be244a ar9580_1p0_high_power_tx_gain_table 0x0000000090be244a ar9580_1p0_lowest_ob_db_tx_gain_table 0x00000000ed9eaac6 ar9580_1p0_baseband_core_txfir_coeff_japan_2484 0x00000000c4d66d1b ar9580_1p0_mac_core 0x00000000e8e9043a ar9580_1p0_mixed_ob_db_tx_gain_table 0x000000003521a300 ar9580_1p0_wo_xlna_rx_gain_table 0x00000000301fc841 ar9580_1p0_soc_postamble 0x00000000a9a06b3a ar9580_1p0_high_ob_db_tx_gain_table 0x00000000a15ccf1b ar9580_1p0_soc_preamble 0x0000000029495000 ar9580_1p0_rx_gain_table 0x0000000037ac0ee8 ar9580_1p0_radio_core 0x00000000603a1b80 ar9580_1p0_baseband_postamble 0x000000003d8b4396 ar9580_1p0_pcie_phy_clkreq_enable_L1 0x00000000398b4396 ar9580_1p0_pcie_phy_clkreq_disable_L1 0x00000000397b4396 ar9580_1p0_pcie_phy_pll_on_clkreq [1] git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.git [2] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool Cc: David Quan <dquan@qca.qualcomm.com> Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix EIFS value to microsecondsAlex Hacker2011-08-241-1/+1
| | | | | | | | | The EIFS value read from AR_D_GBL_IFS_EIFS register in core clocks and then written back as microsecond value. Signed-off-by: Alex Hacker <hacker@epn.ru> Acked-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: do btcoex ASPM disabling at initialization timeStanislaw Gruszka2011-08-221-4/+4
| | | | | | | | | | | | Disable ASPM in pci ->probe on upstream (device) and downstream (PCIe port) component. According to e1000e driver authors this is required. I did not find that requirement in PCIe spec, but it seems to be logical for me. This need to be fixed for CONFIG_PCIEASPM, that will be done later ... Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: calculate a much better approximation of channel noiseFelix Fietkau2011-08-081-0/+1
| | | | | | | | | | | | | | | | | Currently ath9k presents the internal calibrated noise floor as channel noise measurement, however this results in highly chip specific values that are only useful as relative measurements but do not resemble any real channel noise values. In order to give a much better approximation of the real channel noise, add the difference between the measured noise floor and the nominal chip specific noise floor to the default minimum channel noise value, which is currently used to calculate the signal strength from the RSSI value. This may not be 100% accurate, but it's much better than what's there before. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: do not limit initial tx power to 20 dbmFelix Fietkau2011-08-081-3/+6
| | | | | | | When testing for tx power, bypass the default limits. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: skip ->config_pci_powersave() if PCIe port has ASPM disabledStanislaw Gruszka2011-08-011-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We receive many bug reports about system hang during suspend/resume when ath9k driver is in use. Adrian Chadd remarked that this problem happens on systems that have ASPM disabled. To do not hit the bug, skip doing ->config_pci_powersave magic if PCIe downstream port device, which ath9k device is connected to, has ASPM disabled. Bug was introduced by: commit 53bc7aa08b48e5cd745f986731cc7dc24eef2a9f Author: Vivek Natarajan <vnatarajan@atheros.com> Date: Mon Apr 5 14:48:04 2010 +0530 ath9k: Add support for newer AR9285 chipsets. Patch should address: https://bugzilla.kernel.org/show_bug.cgi?id=37462 https://bugzilla.kernel.org/show_bug.cgi?id=37082 https://bugzilla.redhat.com/show_bug.cgi?id=697157 however I did not receive confirmation about that, except from Camilo Mesias, whose system stops hang regularly with this patch (but still hangs from time to time, but this is probably some other bug). Tested-by: Camilo Mesias <camilo@mesias.co.uk> Cc: stable@kernel.org # 2.6.35+ Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: validate and fix broken eeprom chainmask settingsFelix Fietkau2011-07-211-0/+22
| | | | | | | | | | Some devices (e.g. Ubiquiti AirRouter) ship with broken EEPROM chainmask data, which breaks the initial calibration after a hardware reset. To fix this, mask the eeprom chainmask with the chainmask of the chip, and use the chip chainmask if the result is zero. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: remove ar9287 v1.3+ specific hardcoded register hacksFelix Fietkau2011-07-111-3/+7
| | | | | | | | | Now that the clock rate is initialized properly and SIFS, EIFS, USEC, slot time and ACK timeout are properly calculated by the generic code, the 'async FIFO' register hacks are no longer necessary. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: initialize more timing related registers for half/quarter channelsFelix Fietkau2011-07-111-8/+59
| | | | | | | | | | Initialize the the clock-to-TSF field of AR_USEC and the SIFS and EIFS time registers based on the clock rate instead of relying on initvals. With those changes, some of the hardcoded AR9287 1.3+ specific overrides can be dropped. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix MAC clock rate for AR9287 v1.3+Felix Fietkau2011-07-111-1/+4
| | | | | | | This chip uses the async FIFO feature and runs the MAC at 117 MHz Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: fix MAC clock for half/quarter rateFelix Fietkau2011-07-111-0/+7
| | | | | | | Enabling half/quarter rate makes the MAC run at half/quarter clock speed. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: always enable 5 GHz fast clock for AR9280Felix Fietkau2011-07-111-4/+1
| | | | | | | | All devices support this, but some disable it using an EEPROM flag for some reason. Improves 5 GHz performance on those devices. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: enable support for AR9330Gabor Juhos2011-06-221-0/+1
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: add external_reset callback to ath9k_platfom_data for AR9330Gabor Juhos2011-06-221-0/+35
| | | | | | | | | | | | The patch adds a callback to ath9k_platform_data. If the callback is provided by the platform code, then it can be used to hard reset the WMAC device. The callback is required for doing a hard reset of the AR9330 chips to get them working again after a hang. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: enable antenna diversity for AR9330Gabor Juhos2011-06-221-1/+1
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: enable TX/RX data byte swap for AR9330Gabor Juhos2011-06-221-1/+1
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: don't enable LDPC for AR9330Gabor Juhos2011-06-221-1/+1
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: use different BB watchdog timeout value for AR9330Gabor Juhos2011-06-221-1/+4
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: add AR9330 specific PLL initializationGabor Juhos2011-06-221-1/+34
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: add MAC revision detection for AR9330Gabor Juhos2011-06-221-0/+9
| | | | | | | | | | | | | The AR9330 1.0 and 1.1 are using the same revision, thus it is not possible to distinguish the two chips. The platform setup code can distinguish the chips based on the SoC revision. Add a callback function to ath9k_platform_data in order to allow getting the revision number from the platform code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: define mac version for AR9330Gabor Juhos2011-06-221-1/+4
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: Remove ATH9K_BEACON_PERIOD maskRajkumar Manoharan2011-06-011-3/+3
| | | | | | | | | | | Earlier beacon_interval is used to hold interval value and some flags (ATH9K_BEACON_ENA &ATH9K_BEACON_PERIOD). So to extract interval ATH9K_BEACON_PERIOD is used. Those flags were completely removed. So masking beacon_interval is not required. Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: disable phy restart on baseband panic caused by RXSMRajkumar Manoharan2011-05-261-1/+4
| | | | | | | | | | While receiving unsupported rate frame rx state machine gets into a state 0xb and if phy_restart happens in that state, BB would go hang. If RXSM is in 0xb state after first bb panic, ensure to disable the phy_restart. Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k: Drag the driver to the year 2011Sujith Manoharan2011-05-191-1/+1
| | | | | | | The Times They Are a-Changin'. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: enable Antenna diversity for AR9485Mohammed Shafi Shajakhan2011-05-161-0/+16
| | | | | | | | | | | | read antenna diversity and combining information from the EEPROM. Enable antenna diversity/combining feature only when both LNA diversity and fast diversity are supported Cc: Gabriel Tseng <Gabriel.Tseng@Atheros.com> Cc: Senthilkumar Balasubramanian <Senthilkumar.Balasubramanian@Atheros.com> Tested-by: Mohammed Shafi Shajakhan <mshajakhan@atheros.com> Signed-off-by: Mohammed Shafi Shajakhan <mshajakhan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* ath9k_hw: Add support for btcoexistence in AR9300.Vivek Natarajan2011-04-281-8/+16
| | | | | Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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