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path: root/drivers/net/wireless/ath/wil6210/wmi.h (unfollow)
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2013-09-20drm/i915: cleanup a min_t() castDan Carpenter1-1/+1
2013-09-20drm/i915: Pull intel_init_power_well() out of intel_modeset_init_hw()Ville Syrjälä3-2/+4
2013-09-20drm/i915: Add POWER_DOMAIN_VGAVille Syrjälä2-0/+4
2013-09-20drm/i915: Refactor power well refcount inc/dec operationsVille Syrjälä1-18/+21
2013-09-20drm/i915: Add intel_display_power_{get, put} to request power for specific do...Ville Syrjälä2-0/+67
2013-09-20drm/i915: Change i915_request power well handlingVille Syrjälä2-9/+35
2013-09-20drm/i915: POSTING_READ IPS_CTL before waiting for the vblankPaulo Zanoni1-0/+1
2013-09-20drm/i915: don't disable ERR_INT on the IRQ handlerPaulo Zanoni1-19/+0
2013-09-20drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYTJesse Barnes1-0/+4
2013-09-20drm/i915/vlv: honor i915_enable_rc6 boot param on VLVJesse Barnes1-3/+4
2013-09-19drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPFBen Widawsky5-10/+11
2013-09-19drm/i915: Do remaps for all contextsBen Widawsky4-27/+41
2013-09-19drm/i915: Keep a list of all contextsBen Widawsky4-6/+16
2013-09-19drm/i915: Make l3 remapping use the ringBen Widawsky3-22/+23
2013-09-19drm/i915: Add second slice l3 remappingBen Widawsky7-61/+117
2013-09-19drm/i915: Fix HSW parity testBen Widawsky1-1/+13
2013-09-19drm/i915: dump crtc timings from the pipe configDaniel Vetter1-0/+12
2013-09-19drm/i915: register backlight device also when backlight class is a moduleJani Nikula1-1/+1
2013-09-19drm/i915: write D_COMP using the mailboxPaulo Zanoni2-2/+12
2013-09-17drm/i915: check for more ASLC interruptsPaulo Zanoni1-32/+121
2013-09-17drm/i915: only report hpd connector status change when it actually changedJani Nikula1-4/+10
2013-09-17drm/i915: WARN is the DP aux read or write is too bigPaulo Zanoni1-2/+12
2013-09-17drm/i915: Convert overlay double wide check over to pipe configVille Syrjälä1-4/+1
2013-09-17drm/i915: Fix up pipe vs. double wide confusionVille Syrjälä1-3/+3
2013-09-17drm/i915: pipe_src_w must be even in LVDS dual channel, DVO ganged, and doubl...Ville Syrjälä1-0/+10
2013-09-17drm/i915: Check pixel clock limits on pre-gen4Ville Syrjälä1-1/+7
2013-09-17drm/i915: Add double_wide readout and checkingVille Syrjälä1-0/+5
2013-09-17drm/i915: Move double wide mode handling into pipe_configVille Syrjälä2-11/+22
2013-09-17drm/i915: garbage-collect vlv refclk functionDaniel Vetter1-23/+1
2013-09-17drm/i915: Fix cursor visibility checks also for the right/bottom screen edgesVille Syrjälä1-9/+6
2013-09-17drm/i915: Fix cursor visibility check with negative coordinatesVille Syrjälä1-2/+2
2013-09-17drm/i915: Document the inteded use of requested_modeVille Syrjälä1-0/+5
2013-09-17drm/i915: re-layout intel_panel.c to obey 80 char limitDaniel Vetter1-64/+88
2013-09-16drm/i915: Add explicit pipe src size to pipe configVille Syrjälä5-58/+67
2013-09-16drm/i915: Use adjusted_mode in DSI PLL calculationsVille Syrjälä1-2/+2
2013-09-16drm/i915: Use pipe config in sprite codeVille Syrjälä1-2/+2
2013-09-16drm/i915: Make intel_crtc_active() available outside intel_pm.cVille Syrjälä4-13/+20
2013-09-16drm/i915: Use adjusted_mode when checking conditions for PSRVille Syrjälä1-2/+3
2013-09-16drm/i915: Check the clock from adjusted mode in intel_crtc_active()Ville Syrjälä1-1/+4
2013-09-16drm/i915: Use adjusted_mode appropriately when computing watermarksVille Syrjälä1-22/+33
2013-09-16drm/i915: Use adjusted_mode in intel_update_fbc()Ville Syrjälä1-4/+8
2013-09-16drm/i915: Use adjusted_mode in HDMI 12bpc clock checkVille Syrjälä1-1/+1
2013-09-16drm/i915: Use adjusted_mode->clock in lpt_program_iclkipVille Syrjälä1-4/+5
2013-09-16drm/i915: Grab the pixel clock from adjusted_mode not requested_modeVille Syrjälä1-1/+1
2013-09-16drm/i915: Add fuzzy clock check for port_clockVille Syrjälä1-1/+4
2013-09-16drm/i915: Add PIPE_CONF_CHECK_CLOCK_FUZZY()Ville Syrjälä1-10/+13
2013-09-16drm/i915: Fix port_clock and adjusted_mode.clock readout all overVille Syrjälä10-40/+86
2013-09-16drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLsVille Syrjälä1-11/+21
2013-09-16drm/i915: Make i9xx_crtc_clock_get() use dpll_hw_stateVille Syrjälä1-5/+8
2013-09-16drm/i915: Add intel_dotclock_calculate()Ville Syrjälä2-21/+24
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