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* nvmem: add explicit config option to read old syntax fixed OF cellsRafał Miłecki2023-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Binding for fixed NVMEM cells defined directly as NVMEM device subnodes has been deprecated. It has been replaced by the "fixed-layout" NVMEM layout binding. New syntax is meant to be clearer and should help avoiding imprecise bindings. NVMEM subsystem already supports the new binding. It should be a good idea to limit support for old syntax to existing drivers that actually support & use it (we can't break backward compatibility!). That way we additionally encourage new bindings & drivers to ignore deprecated binding. It wasn't clear (to me) if rtc and w1 code actually uses old syntax fixed cells. I enabled them to don't risk any breakage. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> [for meson-{efuse,mx-efuse}.c] Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [for mtk-efuse.c, nvmem/core.c, nvmem-provider.h] Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> [MT8192, MT8195 Chromebooks] Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> [for microchip-otpc.c] Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> [SAMA7G5-EK] Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20231020105545.216052-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Explicitly include correct DT includesRob Herring2023-08-231-1/+1
| | | | | | | | | | | | | | | | The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230823132744.350618-14-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: scu: correct the fuse word indexPeng Fan2020-01-101-5/+5
| | | | | | | | | | | | | | | | | | | i.MX8 fuse word row index represented as one 4-bytes word. Exp: - MAC0 address layout in fuse: offset 708: MAC[3] MAC[2] MAC[1] MAC[0] offset 709: XX xx MAC[5] MAC[4] The original code takes row index * 4 as the offset, this not exactly match i.MX8 fuse map documentation. So update code the reflect the truth. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200109104017.6249-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: scu: fix write SIPPeng Fan2020-01-101-4/+2
| | | | | | | | | | | | SIP number 0xC200000A is for reading, 0xC200000B is for writing. And the following two args for write are word index, data to write. Fixes: 885ce72a09d0 ("nvmem: imx: scu: support write") Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200109104017.6249-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: scu: support writePeng Fan2019-11-051-1/+72
| | | | | | | | | | | | | The fuse programming from non-secure world is blocked, so we could only use Arm Trusted Firmware SIP call to let ATF program fuse. Because there is ECC region that could only be programmed once, so add a heler in_ecc to check the ecc region. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-5-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: scu: support hole region checkPeng Fan2019-11-051-5/+42
| | | | | | | | | | | | Introduce HOLE/ECC_REGION flag and in_hole helper to ease the check of hole region. The ECC_REGION is also introduced here which is preparing for programming support. ECC_REGION could only be programmed once, so need take care. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: add i.MX8QM platform supportFugang Duan2019-08-181-0/+7
| | | | | | | | | | i.MX8QM efuse table has some difference with i.MX8QXP platform, so add i.MX8QM platform support. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20190818093345.29647-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: add i.MX8 nvmem driverPeng Fan2019-06-191-0/+161
This patch adds i.MX8 nvmem ocotp driver to access fuse via RPC to i.MX8 system controller. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>