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path: root/drivers/pci/controller/dwc/pcie-designware.h (follow)
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* | PCI: dwc: Simplify in/outbound iATU setup methodsSerge Semin2022-08-011-29/+19
* | PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OBSerge Semin2022-08-011-10/+3
* | PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IOSerge Semin2022-08-011-8/+1
* | PCI: dwc: Add dw_pcie_ops.host_deinit() callbackSerge Semin2022-08-011-0/+1
* | PCI: dwc: Add macros to compare Synopsys IP core versionsSerge Semin2022-08-011-0/+15
* | PCI: dwc: Read DWC IP core version from registerSerge Semin2022-08-011-0/+6
* | PCI: dwc: Use native DWC IP core version representationSerge Semin2022-08-011-1/+9
* | PCI: dwc: Rename struct pcie_port to dw_pcie_rpSerge Semin2022-07-061-15/+15
* | PCI: dwc: Move io_cfg_atu_shared to struct pcie_portSerge Semin2022-07-061-1/+1
* | PCI: dwc: Add start_link/stop_link inlinesSerge Semin2022-07-061-0/+14
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* PCI: dwc: Move iATU detection earlierHou Zhiqiang2021-04-291-0/+1
* PCI: dwc: Add upper limit address for outbound iATUShradha Todi2021-02-241-0/+1
* PCI: dwc: Change size to u64 for EP outbound iATUShradha Todi2021-02-241-1/+1
* PCI: dwc: Work around ECRC configuration issueVidya Sagar2021-02-241-0/+1
* PCI: dwc: Detect number of iATU windowsRob Herring2020-11-191-1/+1
* PCI: dwc: Move inbound and outbound windows to common structRob Herring2020-11-191-2/+2
* PCI: dwc: Move dw_pcie_msi_init() into coreRob Herring2020-11-191-10/+0
* PCI: dwc: Rework MSI initializationRob Herring2020-11-191-0/+1
* PCI: dwc: Drop the .set_num_vectors() host opRob Herring2020-11-191-1/+0
* PCI: dwc: Add support to program ATU for >4GB memoryVidya Sagar2020-11-181-1/+2
* PCI: dwc: Support multiple ATU memory regionsRob Herring2020-11-181-4/+2
* PCI: dwc: Fix MSI page leakage in suspend/resumeJisheng Zhang2020-10-131-1/+1
* PCI: designware-ep: Modify MSI and MSIX CAP way of findingXiaowei Bao2020-09-211-2/+16
* PCI: designware-ep: Add the doorbell mode of MSI-X in EP modeXiaowei Bao2020-09-211-0/+12
* PCI: designware-ep: Add multiple PFs support for DWCXiaowei Bao2020-09-211-2/+16
* PCI: dwc: Move N_FTS setup to common setupRob Herring2020-09-101-1/+2
* PCI: dwc: Centralize link gen settingRob Herring2020-09-101-1/+1
* PCI: dwc: Make ATU accessors privateRob Herring2020-09-081-12/+0
* PCI: dwc: Remove read_dbi2 codeRob Herring2020-09-081-8/+0
* PCI: dwc/tegra: Use common Designware port logic register definitionsRob Herring2020-09-081-0/+6
* PCI: dwc: Ensure FAST_LINK_MODE is clearedRob Herring2020-09-081-0/+1
* PCI: dwc: Add a 'num_lanes' field to struct dw_pcieRob Herring2020-09-081-0/+1
* PCI: dwc: Simplify config space handlingRob Herring2020-09-081-4/+0
* PCI: dwc: Remove storing of PCI resourcesRob Herring2020-09-081-6/+0
* PCI: dwc: Remove root_bus pointerRob Herring2020-09-081-1/+0
* PCI: dwc: Convert to use pci_host_probe()Rob Herring2020-09-081-1/+0
* PCI: dwc: Remove dwc specific config accessor opsRob Herring2020-09-081-6/+0
* PCI: dwc: Add a default pci_ops.map_bus for root portRob Herring2020-09-081-0/+8
* PCI: dwc: Allow overriding bridge pci_opsRob Herring2020-09-071-0/+1
* Merge branch 'pci/host-probe-refactor'Bjorn Helgaas2020-08-061-1/+0
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| * PCI: designware: Use pci_is_root_bus() to check if bus is root busRob Herring2020-07-231-1/+0
* | PCI: Replace http:// links with https://Alexander A. Klimov2020-06-301-1/+1
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* PCI: dwc: Program outbound ATU upper limit registerAlan Mikhak2020-05-221-1/+2
* PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table addressKishon Vijay Abraham I2020-04-021-0/+1
* PCI: dwc: Add API to notify core initialization completionVidya Sagar2020-02-251-0/+5
* PCI: dwc: Refactor core initialization code for EP modeVidya Sagar2020-02-251-0/+6
* PCI: dwc: intel: PCIe RC controller driverDilip Kota2020-01-091-0/+12
* PCI: Add PCI_STD_NUM_BARS for the number of standard BARsDenis Efremov2019-10-141-1/+1
* PCI: dwc: Add support to enable CDM register checkVidya Sagar2019-08-131-0/+9
* PCI: dwc: Add extended configuration space capability search APIVidya Sagar2019-08-131-0/+1
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