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path: root/drivers/pci/host/pci-imx6.c (follow)
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* PCI: Move DesignWare IP support to new drivers/pci/dwc/ directoryKishon Vijay Abraham I2017-02-211-757/+0
| | | | | | | | | | | | | | | | | | | | | | | Group all the PCI drivers that use DesignWare core in dwc directory. dwc IP is capable of operating in both host mode and device mode and keeping it inside the *host* directory is misleading. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Minghuan Lian <minghuan.Lian@freescale.com> Cc: Mingkai Hu <mingkai.hu@freescale.com> Cc: Roy Zang <tie-fei.zang@freescale.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Pratyush Anand <pratyush.anand@gmail.com> Cc: Niklas Cassel <niklas.cassel@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Zhou Wang <wangzhou1@hisilicon.com> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com> Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
* PCI: imx6: Remove unused return valuesBjorn Helgaas2016-10-121-8/+4
| | | | | Remove unused return values. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Reorder struct imx6_pcieBjorn Helgaas2016-10-121-1/+1
| | | | | | | Reorder struct imx6_pcie to put generic fields first. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Use generic DesignWare accessorsBjorn Helgaas2016-10-121-34/+33
| | | | | | | The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces already add in pp->dbi_base, so use those instead of doing it ourselves in the imx6 driver. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Pass device-specific struct to internal functionsBjorn Helgaas2016-10-121-29/+28
| | | | | | | | Only interfaces used from outside the driver, e.g., those called by the DesignWare core, need to accept pointers to the generic struct pcie_port. Internal interfaces can accept pointers to the device-specific struct, which makes them more straightforward. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Pass struct imx6_pcie to PHY accessorsBjorn Helgaas2016-10-121-18/+23
| | | | | | Pass the struct imx6_pcie pointer, not dbi_base address, to PHY accessors. This enables future simplifications. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Removed unused struct imx6_pcie.mem_baseBjorn Helgaas2016-10-121-1/+0
| | | | | | | Removed the unused struct imx6_pcie.mem_base member. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Remove redundant of_node pointerBjorn Helgaas2016-10-121-4/+3
| | | | | | | "np" and "node" are redundant copies of the of_node pointer. Remove "np" and use "node" instead. Replace the "fsl,max-link-speed" use with "node" as well. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Add local struct device pointersBjorn Helgaas2016-10-121-37/+42
| | | | | | Use a local "struct device *dev" for brevity and consistency with other drivers. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: imx6: Make explicitly non-modularPaul Gortmaker2016-08-231-8/+1
| | | | | | | | | | | | | | | | | | | This code is not being built as a module by anyone: drivers/pci/host/Kconfig:config PCI_IMX6 drivers/pci/host/Kconfig: bool "Freescale i.MX6 PCIe controller" Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(), etc., so that when reading the driver there is no doubt it is builtin-only. The information is preserved in comments at the top of the file. Note that for non-modular code, MODULE_DEVICE_TABLE is a no-op and module_init() translates to device_initcall(). [bhelgaas: changelog] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Richard Zhu <Richard.Zhu@freescale.com> CC: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Implement reset sequence for i.MX6+Andrey Smirnov2016-05-021-2/+21
| | | | | | | | | | | | | I.MX6+ has a dedicated bit for resetting PCIe core, which should be used instead of a regular reset sequence since using the latter will hang the SoC. This commit is based on c34068d48273e24d392d9a49a38be807954420ed from http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git Tested-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* PCI: imx6: Use enum instead of bool for variant indicatorAndrey Smirnov2016-05-021-58/+69
| | | | | | | | | | | Use enumerated type instead of a boolean flag to specify the variant of the PCIe IP block (6Q, 6SX, etc). This patch has zero functional impact, however it makes the code easier to extend for the case of more than 2 possible variants of an IP block (of which there are). [bhelgaas: rewrap comment, remove extra blank line] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* PCI: imx6: Add DT property for link gen, default to Gen1Tim Harvey2016-04-201-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale has stated [1] that the LVDS clock source of the IMX6 does not pass the PCI Gen2 clock jitter test, therefore unless an external Gen2 compliant external clock source is present and supplied back to the IMX6 PCIe core via LVDS CLK1/CLK2 you can not claim Gen2 compliance. Add a DT property to specify Gen1 vs Gen2 and check this before allowing a Gen2 link. We default to Gen1 if the property is not present because at this time there are no IMX6 boards in mainline that 'input' a clock on LVDS CLK1/CLK2. In order to be Gen2 compliant on IMX6 you need to: - Have a Gen2 compliant external clock generator and route that clock back to either LVDS CLK1 or LVDS CLK2 as an input (see IMX6SX-SabreSD reference design). - Specify this clock in the PCIe node in the DT (i.e., IMX6QDL_CLK_LVDS1_IN or IMX6QDL_CLK_LVDS2_IN instead of IMX6QDL_CLK_LVDS1_GATE which configures it as a CLK output). [1] https://community.freescale.com/message/453209 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Zhu Richard <Richard.Zhu@freescale.com> CC: Akshay Bhat <akshay.bhat@timesys.com> CC: Rob Herring <robh+dt@kernel.org> CC: Shawn Guo <shawnguo@kernel.org>
* PCI: imx6: Add reset-gpio-active-high boolean property to DTPetr Štetiar2016-04-201-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the reset-gpio DT property which controls the PCI bus device reset signal defaults to active-low reset sequence (L=reset state, H=operation state) plus the code in reset function isn't GPIO polarity aware - it doesn't matter if the defined reset-gpio is active-low or active-high, it will always result into active-low reset sequence. I've tried to fix it properly and change the reset-gpio reset sequence to be polarity-aware, but this patch has been accepted and then reverted as it has introduced few backward incompatible issues: 1. Some DTBs, for example, imx6qdl-sabresd, don't define reset-gpio polarity correctly: reset-gpio = <&gpio7 12 0>; which means that it's defined as active-high, but in reality it's active-low; thus it wouldn't work without a DTS fix. 2. The logic in the reset function is inverted: gpio_set_value_cansleep(imx6_pcie->reset_gpio, 0) msleep(100); gpio_set_value_cansleep(imx6_pcie->reset_gpio, 1); so even if some of the i.MX6 boards had reset-gpio polarity defined correctly in their DTSes, they would stop working. As we can't break old DTBs, we can't fix them, so we need to introduce this new DT reset-gpio-active-high boolean property so we can support boards with active-high reset sequence. This active-high reset sequence is for example needed on Apalis SoMs, where GPIO1_IO28, used to PCIe reset is not connected directly to PERST# PCIe signal, but it's ORed with RESETBMCU coming off the PMIC, and thus is inverted, active-high. Tested-by: Tim Harvey <tharvey@gateworks.com> # Gateworks Ventana boards (which have active-low PERST#) Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org>
* PCI: imx6: Add initial imx6sx supportChristoph Fritz2016-04-201-0/+53
| | | | | | | | | | | | Add initial PCIe support for the imx6 SoC derivate imx6sx. PCI MSI support is untested as the necessary suspend/resume quirk is not included in this patch. This patch is heavily based on patches by Richard Zhu. [bhelgaas: factor out refclk enable, fix adjacent typos in imx6q-pcie.txt] Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Acked-by: Richard Zhu <Richard.Zhu@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Factor out ref clock enableBjorn Helgaas2016-04-201-12/+24
| | | | | | | Factor out ref clock enable to make it cleaner to add imx6sx support. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
* Revert "PCI: imx6: Add support for active-low reset GPIO"Fabio Estevam2016-04-051-6/+14
| | | | | | | | | | | | | | | | | | | | | Commit 5c5fb40de8f1 ("PCI: imx6: Add support for active-low reset GPIO") cause regressions on some boards like MX6 Gateworks Ventana, for example. The reason for the breakage is that this commit sets the GPIO polarity in the wrong logic level. Also, the commit log is wrong because active-low reset GPIO is what the driver used to support since the beginning. So keep the old behavior that ignores the GPIO polarity specified in the device tree and treat the PCI reset GPIO as active-low. Reported-by: Krzysztof Hałasa <khalasa@piap.pl> Tested-by: Tim Harvey <tharvey@gateworks.com> # Gateworks Ventana Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> CC: stable@vger.kernel.org # v4.5+
* Merge branch 'pci/host-designware' into nextBjorn Helgaas2016-03-151-26/+7
|\ | | | | | | | | | | | | | | * pci/host-designware: PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() ARC: Add PCI support
| * PCI: designware: Add generic dw_pcie_wait_for_link()Joao Pinto2016-03-151-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and spear13xx) had similar loops waiting for the link to come up. Add a generic dw_pcie_wait_for_link() for use by all these drivers so the waiting is done consistently, e.g., always using usleep_range() rather than mdelay() and using similar timeouts and retry counts. Note that this changes the Keystone link training/wait for link strategy, so we initiate link training, then wait longer for the link to come up before re-initiating link training. [bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c] Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
* | PCI: imx6: Add DT bindings to configure PHY Tx driver settingsJustin Waters2016-03-011-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | The settings in GPR8 are dependent upon the particular layout of the hardware platform. As such, they should be configurable via the device tree. Look up PHY Tx driver settings from the device tree. Fall back to the original hard-coded values if they are not specified in the device tree. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
* | PCI: imx6: Move link up check into imx6_pcie_wait_for_link()Lucas Stach2016-01-251-38/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx6_pcie_link_up() previously used usleep_range() to wait for the link to come up. Since it may be called while holding the config spinlock, the sleep causes a "BUG: scheduling while atomic" error. Instead of waiting for the link to come up in imx6_pcie_link_up(), do the waiting in imx6_pcie_wait_for_link(), where we're not holding a lock and sleeping is allowed. [bhelgaas: changelog, references to bugzilla and f95d3ae77191] Link: https://bugzilla.kernel.org/show_bug.cgi?id=100031 Fixes: f95d3ae77191 ("PCI: imx6: Wait for retraining") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: imx6: Remove broken Gen2 workaroundLucas Stach2016-01-251-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove the remnants of the workaround for erratum ERR005184 which was never completely implemented. The checks alone don't carry any value as we don't act properly on the result. A workaround should be added to the lane speed change in establish_link later. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: imx6: Move PHY reset into imx6_pcie_establish_link()Lucas Stach2016-01-251-13/+15
| | | | | | | | | | | | | | | | | | | | This adds the PHY reset into a common error path of imx6_pcie_establish_link(), deduplicating some of the debug prints. Also reduce the severity of the "no-link" message in the one place where it is expected to be hit when no peripheral is attached. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: imx6: Move imx6_pcie_reset_phy() near other PHY handling functionsLucas Stach2016-01-251-17/+17
|/ | | | | | | | | Move imx6_pcie_reset_phy() near the other PHY related functions in the file. This is a cosmetic change, but also allows to do the following changes without introducing needless forward declarations. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Merge branch 'pci/trivial' into nextBjorn Helgaas2016-01-201-1/+1
|\ | | | | | | | | | | | | | | | | * pci/trivial: PCI: shpchp: Constify hpc_ops structure PCI: Use kobj_to_dev() instead of open-coding it PCI: Use to_pci_dev() instead of open-coding it PCI: Fix all whitespace issues PCI/MSI: Fix typos in <linux/msi.h>
| * PCI: Fix all whitespace issuesBogicevic Sasa2016-01-081-1/+1
| | | | | | | | | | | | | | | | | | Fix all whitespace issues (missing or needed whitespace) in all files in drivers/pci. Code is compiled with allyesconfig before and after code changes and objects are recorded and checked with objdiff and they are not changed after this commit. Signed-off-by: Bogicevic Sasa <brutallesale@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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*-. | Merge branches 'pci/host', 'pci/host-designware', 'pci/host-hisi', ↵Bjorn Helgaas2016-01-151-1/+2
|\ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pci/host-qcom' and 'pci/host-rcar' into next * pci/host: PCI: host: Add of_pci_get_host_bridge_resources() stub PCI: host: Mark PCIe/PCI (MSI) IRQ cascade handlers as IRQF_NO_THREAD * pci/host-designware: PCI: designware: Make config accessor override checking symmetric PCI: designware: Simplify control flow * pci/host-hisi: PCI: hisi: Add support for HiSilicon Hip06 PCIe host controllers * pci/host-qcom: ARM: dts: ifc6410: enable PCIe DT node for this board ARM: dts: apq8064: add PCIe devicetree node PCI: qcom: Add Qualcomm PCIe controller driver PCI: qcom: Document PCIe devicetree bindings PCI: designware: Ensure ATU is enabled before IO/conf space accesses * pci/host-rcar: PCI: rcar: Add Gen2 PHY setup to pcie-rcar PCI: rcar: Add runtime PM support to pcie-rcar PCI: rcar: Remove unused pci_sys_data struct from pcie-rcar
| * | PCI: host: Mark PCIe/PCI (MSI) IRQ cascade handlers as IRQF_NO_THREADGrygorii Strashko2016-01-061-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On -RT and if kernel is booting with "threadirqs" cmd line parameter, PCIe/PCI (MSI) IRQ cascade handlers (like dra7xx_pcie_msi_irq_handler()) will be forced threaded and, as result, will generate warnings like this: WARNING: CPU: 1 PID: 82 at kernel/irq/handle.c:150 handle_irq_event_percpu+0x14c/0x174() irq 460 handler irq_default_primary_handler+0x0/0x14 enabled interrupts Backtrace: (warn_slowpath_common) from (warn_slowpath_fmt+0x38/0x40) (warn_slowpath_fmt) from (handle_irq_event_percpu+0x14c/0x174) (handle_irq_event_percpu) from (handle_irq_event+0x84/0xb8) (handle_irq_event) from (handle_simple_irq+0x90/0x118) (handle_simple_irq) from (generic_handle_irq+0x30/0x44) (generic_handle_irq) from (dra7xx_pcie_msi_irq_handler+0x7c/0x8c) (dra7xx_pcie_msi_irq_handler) from (irq_forced_thread_fn+0x28/0x5c) (irq_forced_thread_fn) from (irq_thread+0x128/0x204) This happens because all of them invoke generic_handle_irq() from the requested handler. generic_handle_irq() grabs raw_locks and thus needs to run in raw-IRQ context. This issue was originally reproduced on TI dra7-evem, but, as was identified during discussion [1], other hosts can also suffer from this issue. Fix all them at once by marking PCIe/PCI (MSI) IRQ cascade handlers IRQF_NO_THREAD explicitly. [1] http://lkml.kernel.org/r/1448027966-21610-1-git-send-email-grygorii.strashko@ti.com [bhelgaas: add stable tag, fix typos] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> (for imx6) CC: stable@vger.kernel.org CC: Kishon Vijay Abraham I <kishon@ti.com> CC: Jingoo Han <jingoohan1@gmail.com> CC: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Richard Zhu <Richard.Zhu@freescale.com> CC: Thierry Reding <thierry.reding@gmail.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Alexandre Courbot <gnurou@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Pratyush Anand <pratyush.anand@gmail.com> CC: Michal Simek <michal.simek@xilinx.com> CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com> CC: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
* | PCI: imx6: Add support for active-low reset GPIOPetr Štetiar2015-12-041-14/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | We previously used of_get_named_gpio(), which ignores the OF flags cell, so the reset GPIO defaulted to "active high." This doesn't work on the Toradex Apalis SoM with Ixora base board, which has an active-low reset GPIO. Use devm_gpiod_get_optional() instead so we pay attention to the active high/low flag. This also adds support for GPIOs described via ACPI. [bhelgaas: changelog] Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
* | PCI: imx6: Use gpio_set_value_cansleep()Fabio Estevam2015-11-251-2/+2
|/ | | | | | | | | | We are in a context where we can sleep, and the PCIe reset gpio may be on an I2C expander. Use the cansleep() variant when setting the GPIO value. Based on a patch from Russell King for pci-mvebu.c. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Add PCIE_PHY_RX_ASIC_OUT_VALID definitionFabio Estevam2015-09-251-1/+2
| | | | | | | | | Add a #define for PCIE_PHY_RX_ASIC_OUT_VALID and use it instead of a hardcoded value. [bhelgaas: drop PCIE_PHY_DEBUG_R0_LTSSM_MASK; updated in future patch] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Return real error code from imx6_add_pcie_port()Fabio Estevam2015-09-251-1/+1
| | | | | | | | When devm_request_irq() fails, imx6_add_pcie_port() should return the real error code instead of always returning -ENODEV. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Simplify a trivial if-return sequenceFabio Estevam2015-08-201-10/+2
| | | | | | | | | | | | Simplify a trivial if-return sequence by combining it with a preceding function call. The semantic patch that makes this change is available in scripts/coccinelle/misc/simple_return.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Lucas Stach <l.stach@pengutronix.de>
*-. Merge branches 'pci/host-designware', 'pci/host-designware-common', ↵Bjorn Helgaas2015-06-161-39/+49
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pci/host-generic', 'pci/host-imx6', 'pci/host-iproc' and 'pci/host-xgene' into next * pci/host-designware: PCI: designware: Use iATU0 for cfg and IO, iATU1 for MEM PCI: designware: Consolidate outbound iATU programming functions PCI: designware: Add support for x8 links * pci/host-designware-common: PCI: designware: Wait for link to come up with consistent style PCI: layerscape: Factor out ls_pcie_establish_link() PCI: layerscape: Use dw_pcie_link_up() consistently PCI: dra7xx: Use dw_pcie_link_up() consistently PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link() * pci/host-generic: of/pci: Fix pci_address_to_pio() conversion of CPU address to I/O port * pci/host-imx6: PCI: imx6: Add #define PCIE_RC_LCSR PCI: imx6: Use "u32", not "uint32_t" PCI: imx6: Add speed change timeout message * pci/host-iproc: PCI: iproc: Free resource list after registration PCI: iproc: Directly add PCI resources PCI: iproc: Add BCMA PCIe driver PCI: iproc: Allow override of device tree IRQ mapping function * pci/host-xgene: arm64: dts: Add APM X-Gene PCIe MSI nodes PCI: xgene: Add APM X-Gene v1 PCIe MSI/MSIX termination driver
| | * PCI: imx6: Add #define PCIE_RC_LCSRBjorn Helgaas2015-06-161-1/+3
| | | | | | | | | | | | | | | | | | Define PCIE_RC_LCSR and use it instead of the bare offset "0x80." No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * PCI: imx6: Use "u32", not "uint32_t"Bjorn Helgaas2015-06-161-10/+10
| | | | | | | | | | | | | | | | | | | | | Use "u32", not "uint32_t", for consistency. Use "tmp", not "temp", for consistency within the driver. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Richard Zhu <Richard.Zhu@freescale.com>
| | * PCI: imx6: Add speed change timeout messageTroy Kisky2015-06-121-17/+27
| |/ |/| | | | | | | | | | | | | | | Currently, the timeout is never detected as count has a value of -1 if a timeout happens, but the code is checking for 0. Also, this patch removes the unneeded final wait if a timeout occurs. [bhelgaas: reworked starting from http://lkml.kernel.org/r/1433543864-7252-1-git-send-email-troy.kisky@boundarydevices.com] Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: designware: Wait for link to come up with consistent styleBjorn Helgaas2015-06-101-11/+9
| | | | | | | | | | | | | | | | | | | | All the DesignWare-based host drivers loop waiting for the link to come up, but they do it several ways that are needlessly different. Wait for the link to come up in a consistent style across all the DesignWare drivers. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
| * PCI: imx6: Rename imx6_pcie_start_link() to imx6_pcie_establish_link()Bjorn Helgaas2015-06-021-2/+2
|/ | | | | | | Rename imx6_pcie_start_link() to imx6_pcie_establish_link() to follow the convention of other DesignWare-based host drivers. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
* Merge tag 'driver-core-3.19-rc1' of ↵Linus Torvalds2014-12-151-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
| * Merge branch 'platform/remove_owner' of ↵Greg Kroah-Hartman2014-11-041-1/+0
| |\ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into driver-core-next Remove all .owner fields from platform drivers
| | * pci: host: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0
| | | | | | | | | | | | | | | | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | | Merge tag 'pci-v3.19-changes' of ↵Linus Torvalds2014-12-111-2/+2
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: "Here are the PCI changes intended for v3.19. I don't think there's anything very exciting here, but there was a lot of MSI-related stuff coming via Thomas. Details: NUMA - Allow numa_node override via sysfs (Prarit Bhargava) Resource management - Restore detection of read-only BARs (Myron Stowe) - Shrink decoding-disabled window while sizing BARs (Myron Stowe) - Add informational printk for invalid BARs (Myron Stowe) - Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe) MSI - Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang) - Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang) - s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang) Virtualization - xen: Process failure for pcifront_(re)scan_root() (Chen Gang) - Make FLR and AF FLR reset warning messages different (Gavin Shan) Generic host bridge driver - Allocate config space windows after limiting bus number range (Lorenzo Pieralisi) - Convert to DT resource parsing API (Lorenzo Pieralisi) Freescale Layerscape - Add Freescale Layerscape PCIe driver (Minghuan Lian) NVIDIA Tegra - Do not build on 64-bit ARM (Thierry Reding) - Add Kconfig help text (Thierry Reding) Renesas R-Car - Make rcar_pci static (Jingoo Han) Samsung Exynos - Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han) ST Microelectronics SPEAr13xx - Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han) - Make spear13xx_add_pcie_port() __init (Jingoo Han) - Remove unnecessary OOM message (Jingoo Han) TI DRA7xx - Add dra7xx prefix to add_pcie_port() (Jingoo Han) - Make dra7xx_add_pcie_port() __init (Jingoo Han) TI Keystone - Make ks_dw_pcie_msi_domain_ops static (Jingoo Han) - Remove unnecessary OOM message (Jingoo Han) Miscellaneous - Delete unnecessary NULL pointer checks (Markus Elfring) - Remove unused to_hotplug_slot() (Gavin Shan) - Whitespace cleanup (Jingoo Han) - Simplify if-return sequences (Quentin Lambert)" * tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (28 commits) PCI: Remove fixed parameter in pci_iov_resource_bar() PCI: Add informational printk for invalid BARs PCI: tegra: Add Kconfig help text PCI: tegra: Do not build on 64-bit ARM PCI: spear: Remove unnecessary OOM message PCI: mvebu: Add a blank line after declarations PCI: designware: Add a blank line after declarations PCI: exynos: Remove unnecessary return statement PCI: imx6: Use tabs for indentation PCI: keystone: Remove unnecessary OOM message PCI: Remove unused and broken to_hotplug_slot() PCI: Make FLR and AF FLR reset warning messages different PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port() PCI: spear: Add __init annotation to spear13xx_add_pcie_port() PCI: spear: Rename add_pcie_port(), pcie_init() to spear13xx_add_pcie_port(), etc. PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port() PCI: layerscape: Add Freescale Layerscape PCIe driver PCI: Simplify if-return sequences PCI: Delete unnecessary NULL pointer checks PCI: Shrink decoding-disabled window while sizing BARs ...
| * | PCI: imx6: Use tabs for indentationJingoo Han2014-11-131-2/+2
| |/ | | | | | | | | | | | | | | This patch fixes the following checkpatch error: ERROR: code indent should use tabs where possible Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* / PCI: imx6: Wait for clocks to stabilize after ref_enRichard Zhu2014-10-291-3/+10
|/ | | | | | | | | | | | | | | | | | | | | | | For boards without a reset GPIO we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. This hangs the system if there isn't a proper delay to ensure the clocks are settled in the DW PCIe core. Also iMX6Q always needs an additional 10us delay to make sure the reset is propagated through the core, as we don't have an explicitly controlled reset input on this SoC. This fixes a problem with 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes"): the kernel doesn't boot on systems that don't pass the PCI GPIO reset in the DTB. This regression affects mx6 nitrogen boards. [bhelgaas: add regression info in changelog] Fixes: 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes") Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Richard Zhu <richard.zhu@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Delay enabling reference clock for SS until it stabilizesTim Harvey2014-09-051-5/+6
| | | | | | | | | | | | | | | | According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable for SS function) must remain deasserted until the reference clock is running at the appropriate frequency. Delay enabling the reference clock for the SS function until it has stabilized. This prevents a high link failure rate (>5%) on certain IMX6 boards at various temperatures. [bhelgaas: reword changelog slightly] Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lucas Stach <l.stach@pengutronix.de>
* PCI: imx6: Probe in module_init(), not fs_initcall()Lucas Stach2014-09-051-1/+1
| | | | | | | | | | | This effectively reverts f216f57ffe6e ("PCI: imx6: Probe the PCIe in fs_initcall()") as the resource allocation issue that prevented the driver from working properly at module_initcall level is now fixed in pcie-designware.c. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Richard Zhu <r65037@freescale.com>
* PCI: imx6: Put LTSSM in "Detect" state before disabling itLucas Stach2014-09-041-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | This fixes a boot hang observed when the bootloader already enabled the PCIe link for its own use. The fundamental problem is that Freescale forgot to wire up the core reset, so software doesn't have a sane way to get the core into a defined state. According to the DW PCIe core reference manual, configuration of the core may only happen when the LTSSM is disabled, so this is one of the first things we need to do. Apparently this isn't safe to do when the LTSSM is in any state other than "detect" as we observe an instant machine hang when trying to do so while the link is already up. As a workaround, force LTSSM into detect state right before hitting the disable switch. There is still a race window because the LTSSM may transition out of "detect" before we can disable it, but it's the best we can do for now. [bhelgaas: mention race window] Link: http://lkml.kernel.org/r/1406830565-23450-3-git-send-email-l.stach@pengutronix.de Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tim Harvey <tharvey@gateworks.com>
*-. Merge branches 'pci/host-designware', 'pci/host-imx6', 'pci/host-mvebu' and ↵Bjorn Helgaas2014-06-031-1/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pci/host-tegra' into next * pci/host-designware: PCI: designware: Remove unnecessary use of 'conf_lock' spinlock PCI: designware: Use new OF interrupt mapping when possible PCI: designware: Fix iATU programming for cfg1, io and mem viewport PCI: designware: Fix comment for setting number of lanes * pci/host-imx6: PCI: designware: Split Exynos and i.MX bindings * pci/host-mvebu: PCI: mvebu: Use '%pa' for printing 'phys_addr_t' type PCI: mvebu: Remove unnecessary use of 'conf_lock' spinlock PCI: mvebu: split PCIe BARs into multiple MBus windows when needed bus: mvebu-mbus: allow several windows with the same target/attribute bus: mvebu-mbus: Avoid setting an undefined window size PCI: mvebu: fix off-by-one in the computed size of the mbus windows * pci/host-tegra: PCI: tegra: Use new OF interrupt mapping when possible
| * | PCI: designware: Remove unnecessary use of 'conf_lock' spinlockAndrew Murray2014-04-161-1/+0
| |/ | | | | | | | | | | | | | | | | | | Serialization of configuration accesses is provided by 'pci_lock' in drivers/pci/access.c thus making the driver's 'conf_lock' superfluous. Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Richard Zhu <r65037@freescale.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-21 00:28:20 +0100