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* PCI: Clear saved_state after the state has been restoredRafael J. Wysocki2009-09-141-0/+3
| | | | | | | | | | | | | | | | Some PCI devices fail if their standard configuration registers are restored twice in a row. Prevent this from happening by making pci_restore_state() clear the saved_state flag of the device right after the device's standard configuration registers have been populated with the previously saved values. Simplify PCI PM callbacks by removing the direct clearing of state_saved from them, as it shouldn't be necessary any more (except in pci_pm_thaw(), where it has to be cleared, so that the values saved during the "freeze" phase of hibernation are not used later by mistake). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pcie: Ensure hotplug ports have a minimum number of resourcesEric W. Biederman2009-09-091-0/+18
| | | | | | | | | | | | | | | | | | | In general a BIOS may goof or we may hotplug in a hotplug controller. In either case the kernel needs to reserve resources for plugging in more devices in the future instead of creating a minimal resource assignment. We already do this for cardbus bridges I am just adding a variant for pcie bridges. v2: Make testing for pcie hotplug bridges based on a flag. So far we only set the flag for pcie but a header_quirk could easily be added for the non-standard pci hotplug bridges. Signed-off-by: Eric W. Biederman <ebiederm@aristanetworks.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: print out pref if mmio is prefetchableYinghai Lu2009-09-091-2/+7
| | | | | | | We already print it out for pci bridges, so also print it out for pci devices. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: remove pcibios_scan_all_fns()Alex Chiang2009-09-091-2/+1
| | | | | | | | | | | | | | | | | | | | | | | This was #define'd as 0 on all platforms, so let's get rid of it. This change makes pci_scan_slot() slightly easier to read. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Tony Luck <tony.luck@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jeff Dike <jdike@addtoit.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Russell King <linux@arm.linux.org.uk> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: use pci_is_root_bus() in pci_read_bridge_bases()Kenji Kaneshige2009-06-161-1/+1
| | | | | | | | | | Use pci_is_root_bus() in pci_read_bridge_bases() to check if the pci bus is root, for code consistency. Reviewed-by: Alex Chiang <achiang@hp.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI/x86: don't assume prefetchable ranges are 64bitYinghai Lu2009-06-111-2/+7
| | | | | | | | | | | | | | | We should not assign 64bit ranges to PCI devices that only take 32bit prefetchable addresses. Try to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge and make the bus resource only have that bit set when all devices under it support 64bit prefetchable memory. Use that flag to allocate resources from that range. Reported-by: Yannick <yannick.roehlly@free.fr> Reviewed-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: use fixed-up device class when configuring deviceYu Zhao2009-06-041-0/+2
| | | | | | | | | | | | The device class may be changed after the fixup, so re-read the class value from pci_dev when configuring the device. Otherwise some devices such as JMicron SATA controller won't work. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Tested-by: Marc Dionne <marc.c.dionne@gmail.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: Move set_pci_bus_resources_arch_default into arch/x86Matthew Wilcox2009-04-221-6/+0
| | | | | | | | | | | | | | Commit 30a18d6c3f1e774de656ebd8ff219d53e2ba4029 introduced a new function to set the PCI bus resources. Unfortunately, neither the author, nor the committers seemed to know that we already have somewhere to do that -- pcibios_fixup_bus(). This patch moves the hook (used only by the K8 code) into x86-specific code where it should have been in the first place. Cc: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: annotate pci_rescan_bus as __ref, not __devinitAlex Chiang2009-04-061-1/+1
| | | | | | | | | | | | | | | | | pci_rescan_bus was annotated as __devinit, which is wrong, because it will never be part of device initialization. Howevever, we can't simply drop the annotation, because then we get section warnings about calling pci_scan_child_bus (which is correctly marked as __devinit). pci_rescan_bus will only get built when CONFIG_HOTPLUG is set, meaning that __devinit is a nop, so we know that pci_scan_child_bus has not been freed. Annotate as __ref to silence modpost. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix conflict between SR-IOV and config space sizingYu Zhao2009-03-261-4/+3
| | | | | | | | New pci_cfg_space_size() needs invalid pdev->class, put it in the right place in the pci_setup_device(). Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Introduce /sys/bus/pci/rescanAlex Chiang2009-03-201-2/+2
| | | | | | | | | | | | | | This interface allows the user to force a rescan of all PCI buses in system, and rediscover devices that have been removed earlier. pci_bus_attrs implementation from Trent Piepho. Thanks to Vegard Nossum for discovering locking issues with the sysfs interface. Cc: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Introduce pci_rescan_bus()Alex Chiang2009-03-201-0/+32
| | | | | | | | | | | | This API is used by the PCI core to rescan a bus and rediscover newly added devices. Over time, it is expected that the various PCI hotplug drivers will migrate to this interface and away from the old pci_do_scan_bus() interface. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: always scan child busesAlex Chiang2009-03-201-14/+20
| | | | | | | | | | | | | | | | | | | | | While scanning bridges, we stop our scan if we encounter a bus that we've seen before, to work around some buggy chipsets. This is a good idea, but prevents us from fully scanning the PCI bus at a future time (to find newly hot-added devices, for example). Change the logic so that we skip _re-adding_ an existing bus that we've seen before, but also allow the scan to descend to all child buses. Now that we're potentially scanning our child buses again, we also need to be sure not to attempt re-initializing their BARs so we avoid that. This patch lays the groundwork to allow the user to issue a rescan of the PCI bus at any time. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pci_scan_slot() returns newly found devicesTrent Piepho2009-03-201-24/+16
| | | | | | | | | | | | | | | | | | | | pci_scan_slot() has been rewritten to be less complex and will now return the number of *new* devices found. Existing callers need not worry because they already assume that they can't call pci_scan_slot() on an already-scanned slot. Thus, there is no semantic change for existing callers: returning newly found devices (this patch) is exactly equal to returning all found devices (before this patch). This patch adds some more groundwork to allow us to rescan the PCI bus during runtime to discover newly added devices. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Reviewed-by: Alex Chiang <achiang@hp.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: don't scan existing devicesTrent Piepho2009-03-201-0/+6
| | | | | | | | | | | | | pci_scan_single_device is supposed to add newly discovered devices to pci_bus->devices, but doesn't check to see if the device has already been added. This can cause problems if we ever want to use this interface to rescan the PCI bus. If the device is already added, just return it. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: centralize device setup codeYu Zhao2009-03-201-38/+40
| | | | | | | | | Move the device setup stuff into pci_setup_device() which will be used to setup the Virtual Function later. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: reserve bus range for SR-IOV deviceYu Zhao2009-03-201-0/+3
| | | | | | | | | Reserve the bus number range used by the Virtual Function when pcibios_assign_all_busses() returns true. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: initialize and release SR-IOV capabilityYu Zhao2009-03-201-0/+4
| | | | | | | | | | | | If a device has the SR-IOV capability, initialize it (set the ARI Capable Hierarchy in the lowest numbered PF if necessary; calculate the System Page Size for the VF MMIO, probe the VF Offset, Stride and BARs). A lock for the VF bus allocation is also initialized if a PF is the lowest numbered PF. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI/x86: detect host bridge config space size w/o using quirksYinghai Lu2009-03-201-1/+8
| | | | | | | | | | | | | | | | | | | | | | Many host bridges support a 4k config space, so check them directy instead of using quirks to add them. We only need to do this extra check for host bridges at this point, because only host bridges are known to have extended address space without also having a PCI-X/PCI-E caps. Other devices with this property could be done with quirks (if there are any). As a bonus, we can remove the quirks for AMD host bridges with family 10h and 11h since they're not needed any more. With this patch, we can get correct pci cfg size of new Intel CPUs/IOHs with host bridges. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Acked-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Cc: <stable@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Use kzalloc() in pci_create_bus()Geert Uytterhoeven2009-03-201-2/+1
| | | | | Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix wrong assumption in pci_read_bridge_basesKenji Kaneshige2009-03-201-1/+1
| | | | | | | | | | Current pci_read_bridge_bases() has an assumption that pci_bus->self is NULL on the pci root bus (It checks pci_bus->self to see if the pci bus is root bus). But is might not true on some platforms. We must check pci_bus->parent instead. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'cpus4096-for-linus' of ↵Linus Torvalds2009-01-101-4/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: [IA64] fix typo in cpumask_of_pcibus() x86: fix x86_32 builds for summit and es7000 arch's cpumask: use work_on_cpu in acpi-cpufreq.c for read_measured_perf_ctrs cpumask: use work_on_cpu in acpi-cpufreq.c for drv_read and drv_write cpumask: use cpumask_var_t in acpi-cpufreq.c cpumask: use work_on_cpu in acpi/cstate.c cpumask: convert struct cpufreq_policy to cpumask_var_t cpumask: replace CPUMASK_ALLOC etc with cpumask_var_t x86: cleanup remaining cpumask_t ops in smpboot code cpumask: update pci_bus_show_cpuaffinity to use new cpumask API cpumask: update local_cpus_show to use new cpumask API ia64: cpumask fix for is_affinity_mask_valid()
| * cpumask: update pci_bus_show_cpuaffinity to use new cpumask APIMike Travis2009-01-041-4/+4
| | | | | | | | | | | | | | | | | | | | Impact: use new cpumask API to reduce stack usage Replace the local cpumask_t variable with a pointer to the const cpumask that needs to be printed. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | PCI: set device wakeup capable flag if platform support is presentJesse Barnes2009-01-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When PCI devices are initialized, we check whether they support PCI PM caps and set the device can_wakeup flag if so. However, some devices may have platform provided wakeup events rather than PCI PME signals, so we need to set can_wakeup in that case too. Doing so should allow wakeups from many more devices, especially on cost constrained systems. Reported-by: Alan Stern <stern@rowland.harvard.edu> Tested-by: Joseph Chan <JosephChan@via.com.tw> Acked-by: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: allow pci_alloc_child_bus() to handle a NULL bridgeYu Zhao2009-01-071-2/+6
| | | | | | | | | | | | | | | | | | Allow pci_alloc_child_bus() to allocate buses without bridge devices. Some SR-IOV devices can occupy more than one bus number, but there is no explicit bridges because that have internal routing mechanism. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: export __pci_read_base()Yu Zhao2009-01-071-11/+9
| | | | | | | | | | | | | | Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: define PCI resource names in an 'enum'Yu Zhao2009-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | This patch moves all definitions of the PCI resource names to an 'enum', and also replaces some hard-coded resource variables with symbol names. This change eases introduction of device specific resources. Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: handle PCI state saving with interrupts disabledRafael J. Wysocki2009-01-071-0/+3
| | | | | | | | | | | | | | | | | | | | Since interrupts will soon be disabled at PCI resume time, we need to pre-allocate memory to save/restore PCI config space (or use GFP_ATOMIC, but this is safer). Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2009-01-071-3/+3
|/ | | | | | | | | | | | | | | | | | | | | | This patch is part of a larger patch series which will remove the "char bus_id[20]" name string from struct device. The device name is managed in the kobject anyway, and without any size limitation, and just needlessly copied into "struct device". To set and read the device name dev_name(dev) and dev_set_name(dev) must be used. If your code uses static kobjects, which it shouldn't do, "const char *init_name" can be used to statically provide the name the registered device should have. At registration time, the init_name field is cleared, to enforce the use of dev_name(dev) to access the device name at a later time. We need to get rid of all occurrences of bus_id in the entire tree to be able to enable the new interface. Please apply this patch, and possibly convert any remaining remaining occurrences of bus_id. Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-Off-By: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* cpumask: change cpumask_scnprintf, cpumask_parse_user, cpulist_parse, and ↵Rusty Russell2008-12-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | cpulist_scnprintf to take pointers. Impact: change calling convention of existing cpumask APIs Most cpumask functions started with cpus_: these have been replaced by cpumask_ ones which take struct cpumask pointers as expected. These four functions don't have good replacement names; fortunately they're rarely used, so we just change them over. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: paulus@samba.org Cc: mingo@redhat.com Cc: tony.luck@intel.com Cc: ralf@linux-mips.org Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: cl@linux-foundation.org Cc: srostedt@redhat.com
* PCI: remove unused resource assignment in pci_read_bridge_bases()Zhao, Yu2008-10-241-3/+0
| | | | | | | | | | | | | | This cleanup removes the resource assignment in pci_read_bridge_bases() since it has taken care by pci_alloc_child_bus() when allocating the bus: /* Set up default resource pointers and names.. */ for (i = 0; i < PCI_BRIDGE_RES_NUM; i++) { child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i]; child->resource[i]->name = child->name; } Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Workaround invalid P2P bridge bus numbersBenjamin Herrenschmidt2008-10-231-2/+10
| | | | | | | | | | | | | | | | | | | Some firmware fail to properly configure P2P bridges, leaving them with invalid bus numbers. In some cases, this happens on some embedded 4xx boards as the result of the kernel allocating different bus space than the firmware does to host bridges while not setting pcibios_assign_all_busses() for various reasons. In other cases, it can just be bogus firmware. This adds some sanity checking to the PCI probing code. If a bridge is found whose primary bus number doesn't match the bus it's sitting on, or whose secondary bus number not strictly above it's primary bus number, then the bridge bus numbers are deconfigured in the first pass of pci_scan_bridge() to be re-assigned in the second pass. Tested-by: "Ayman El-Khashab" <AymanE@tanisys.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Add ability to mmap legacy_io on some platformsBenjamin Herrenschmidt2008-10-201-66/+0
| | | | | | | | | | | | | | This adds the ability to mmap legacy IO space to the legacy_io files in sysfs on platforms that support it. This will allow to clean up X to use this instead of /dev/mem for legacy IO accesses such as those performed by Int10. While at it I moved pci_create/remove_legacy_files() to pci-sysfs.c where I think they belong, thus making more things statis in there and cleaned up some spurrious prototypes in the ia64 pci.h file Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: probing debug message uniformizationVincent Legoll2008-10-201-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | | This patch uniformizes PCI probing debug boot messages with dev_printk() intead of manual printk() It changes adress range output from [%llx, %llx] to [%#llx-%#llx], like in pci_request_region(). For example, it goes from the mixed-style: PCI: 0000:00:1b.0 reg 10 64bit mmio: [f4280000, f4283fff] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold to uniform: pci 0000:00:1b.0: reg 10 64bit mmio: [0xf4280000-0xf4283fff] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold This patch has been runtime tested, boot log messages diffed, everything looks OK. Acked-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: support PCIe ARI capabilityYu Zhao2008-10-201-0/+3
| | | | | | | | | | | | This patch adds support for PCI Express Alternative Routing-ID Interpretation (ARI) capability. The ARI capability extends the Function Number field of the PCI Express Endpoint by reusing the Device Number which is otherwise hardwired to 0. With ARI, an Endpoint can have up to 256 functions. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: centralize the capabilities code in probe.cZhao, Yu2008-10-201-7/+20
| | | | | | | | | This patch centralizes the initialization and release functions of various PCI capabilities in probe.c, which makes the introduction of new capability support functions cleaner in the future. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix 64-vbit prefetchable memory resource BARsPeter Chubb2008-10-201-1/+1
| | | | | | | | | | | | | | | | Since patch 6ac665c63dcac8fcec534a1d224ecbb8b867ad59 my infiniband controller hasn't worked. This is because it has 64-bit prefetchable memory, which was mistakenly being taken to be 32-bit memory. The resource flags in this case are PCI_BASE_ADDRESS_MEM_TYPE_64 | PCI_BASE_ADDRESS_MEM_PREFETCH. This patch checks only for the PCI_BASE_ADDRESS_MEM_TYPE_64 bit; thus whether the region is prefetchable or not is ignored. This fixes my Infiniband. Reviewed-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: replace cfg space size (256/4096) by macros.Zhao, Yu2008-10-201-3/+2
| | | | | | | | | | This is a cleanup that changes all PCI configuration space size representations to the macros (PCI_CFG_SPACE_SIZE and PCI_CFG_SPACE_EXP_SIZE). And the macros are also moved from drivers/pci/probe.c to drivers/pci/pci.h. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: connect struct pci_dev to struct pci_slotAlex Chiang2008-10-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The introduction of struct pci_slot (f46753c5e354b857b20ab8e0fe7b25) added a struct pci_slot pointer to struct pci_dev, but we forgot to associate the two. Connect the two structs together; the interesting portions of the object lifetimes are: - when a new pci_slot is created, connect it to the appropriate pci_dev's. A single pci_slot may be associated with multiple pci_dev's, e.g. any multi-function PCI device. - when a pci_slot is released, look for all the pci_dev's it was associated with, and set their pci_slot pointers to NULL - when a pci_dev is created, look for slots to associate with. Note -- when a pci_dev is released, we don't need to do any bookkeeping, since pci_slot's do not have pointers to pci_dev's. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: follow lspci device/vendor styleBjorn Helgaas2008-10-201-1/+1
| | | | | | | | Use "[%04x:%04x]" for PCI vendor/device IDs to follow the format used by lspci(8). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* pci: Use new %pR to print resource rangesBenjamin Herrenschmidt2008-10-201-15/+13
| | | | | | | | | This converts things in drivers/pci to use %pR to printout the content of a struct resource instead of hand-casted %llx or other variants. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Driver core: add bus_sort_breadthfirst() functionGreg Kroah-Hartman2008-10-161-45/+5
| | | | | | | | | | | | The PCI core wants to reorder the devices in the bus list. So move this functionality out of the pci core and into the driver core so that anyone else can also do this if needed. This also lets us change how struct device is attached to drivers in the future without messing with the PCI core. Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: re-add debug prints for unmodified BARsYinghai Lu2008-09-131-4/+11
| | | | | | | | Print out for device BAR values before the kernel tries to update them. Also make related output use KERN_DEBUG. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Fix printk warnings in probe.cJohann Felix Soden2008-09-091-3/+8
| | | | | | | | | | | | | | | | The cleaned up resource code in probe.c introduced some warnings: drivers/pci/probe.c: In function 'pci_read_bridge_bases': drivers/pci/probe.c:386: warning: format '%llx' expects type 'long long unsigned int', but argument 3 has type 'resource_size_t' drivers/pci/probe.c:386: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:398: warning: format '%llx' expects type 'long long unsigned int', but argument 3 has type 'resource_size_t' drivers/pci/probe.c:398: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:434: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:434: warning: format '%llx' expects type 'long long unsigned int', but argument 5 has type 'resource_size_t' So fix them up. Signed-off-by: Johann Felix Soden <johfel@users.sourceforge.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'pci-for-jesse' of ↵Jesse Barnes2008-08-181-0/+3
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip into x86-merge Conflicts: drivers/pci/probe.c
| * Merge branch 'linus' into pci-for-jesseIngo Molnar2008-07-181-16/+22
| |\
| * | pci: debug extra pci resources rangeYinghai Lu2008-06-231-0/+6
| | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | PCI: check the return value of device_create_bin_file() in pci_create_bus()Simon Horman2008-08-071-16/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the return value of device_create_bin_file in pci_create_bus and unwind if necessary. Don't propagate error to caller, as failure to create these files shouldn't prevent PCI from being initialised. Instead, just log a warning. Cc: Sven Wegener <sven.wegener@stealer.net> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: disable ASPM on pre-1.1 PCIe devicesShaohua Li2008-07-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Disable ASPM on pre-1.1 PCIe devices, as many of them don't implement it correctly. Tested-by: Jack Howarth <howarth@bromo.msbb.uc.edu> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: handle 64-bit resources better on 32-bit machinesMatthew Wilcox2008-07-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the kernel is configured to support 64-bit resources on a 32-bit machine, we can support 64-bit BARs properly. Just change the condition to check sizeof(resource_size_t) instead of BITS_PER_LONG. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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