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* Merge branch 'pci/misc' into nextBjorn Helgaas2015-04-101-1/+1
|\ | | | | | | | | | | | | | | | | | | | | * pci/misc: PCI: Read capability list as dwords, not bytes PCI: Don't clear ASPM bits when the FADT declares it's unsupported PCI: Clarify policy for vendor IDs in pci.txt PCI/ACPI: Optimize device state transition delays PCI: Export pci_find_host_bridge() for use inside PCI core PCI: Make a shareable UUID for PCI firmware ACPI _DSM PCI: Fix typo in Thunderbolt kernel message
| * PCI: Fix typo in Thunderbolt kernel messageDarrick J. Wong2015-04-081-1/+1
| | | | | | | | | | | | Fix a typo in one of the kernel messages. Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: Add ACS quirks for Intel 1G NICsAlex Williamson2015-03-231-0/+32
|/ | | | | | | | | | | | Intel has verified that there is no peer-to-peer between functions for the below selection of 82580, 82576, 82575, I350, and 82571 multi-port devices. This adds the necessary quirks to consider the functions isolated from each other. 82571 quad-port devices are omitted due to likely lack of ACS/isolation in the onboard switch, rendering quirks for the downstream endpoints useless. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: John Ronciak <john.ronciak@intel.com>
* Merge tag 'pci-v3.20-changes' of ↵Linus Torvalds2015-02-101-0/+64
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: "Enumeration - Move domain assignment from arm64 to generic code (Lorenzo Pieralisi) - ARM: Remove artificial dependency on pci_sys_data domain (Lorenzo Pieralisi) - ARM: Move to generic PCI domains (Lorenzo Pieralisi) - Generate uppercase hex for modalias var in uevent (Ricardo Ribalda Delgado) - Add and use generic config accessors on ARM, PowerPC (Rob Herring) Resource management - Free resources on failure in of_pci_get_host_bridge_resources() (Lorenzo Pieralisi) - Fix infinite loop with ROM image of size 0 (Michel Dänzer) PCI device hotplug - Handle surprise add even if surprise removal isn't supported (Bjorn Helgaas) Virtualization - Mark AMD/ATI VGA devices that don't reset on D3hot->D0 transition (Alex Williamson) - Add DMA alias quirk for Adaptec 3405 (Alex Williamson) - Add Wellsburg (X99) to Intel PCH root port ACS quirk (Alex Williamson) - Add ACS quirk for Emulex NICs (Vasundhara Volam) MSI - Fail MSI-X mappings if there's no space assigned to MSI-X BAR (Yijing Wang) Freescale Layerscape host bridge driver - Fix platform_no_drv_owner.cocci warnings (Julia Lawall) NVIDIA Tegra host bridge driver - Remove unnecessary tegra_pcie_fixup_bridge() (Lucas Stach) Renesas R-Car host bridge driver - Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov) TI Keystone host bridge driver - Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov) - Fix misspelling of current function in debug output (Julia Lawall) Xilinx AXI host bridge driver - Fix harmless format string warning (Arnd Bergmann) Miscellaneous - Use standard parsing functions for ASPM sysfs setters (Chris J Arges) - Add pci_device_to_OF_node() stub for !CONFIG_OF (Kevin Hao) - Delete unnecessary NULL pointer checks (Markus Elfring) - Add and use defines for PCIe Max_Read_Request_Size (Rafał Miłecki) - Include clk.h instead of clk-private.h (Stephen Boyd)" * tag 'pci-v3.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits) PCI: Add pci_device_to_OF_node() stub for !CONFIG_OF PCI: xilinx: Convert to use generic config accessors PCI: xgene: Convert to use generic config accessors PCI: tegra: Convert to use generic config accessors PCI: rcar: Convert to use generic config accessors PCI: generic: Convert to use generic config accessors powerpc/powermac: Convert PCI to use generic config accessors powerpc/fsl_pci: Convert PCI to use generic config accessors ARM: ks8695: Convert PCI to use generic config accessors ARM: sa1100: Convert PCI to use generic config accessors ARM: integrator: Convert PCI to use generic config accessors PCI: versatile: Add DT-based ARM Versatile PB PCIe host driver ARM: dts: versatile: add PCI controller binding of/pci: Free resources on failure in of_pci_get_host_bridge_resources() PCI: versatile: Add DT docs for ARM Versatile PB PCIe driver PCI: Fail MSI-X mappings if there's no space assigned to MSI-X BAR r8169: use PCI define for Max_Read_Request_Size [SCSI] esas2r: use PCI define for Max_Read_Request_Size tile: use PCI define for Max_Read_Request_Size rapidio/tsi721: use PCI define for Max_Read_Request_Size ...
| * PCI: Add Wellsburg (X99) to Intel PCH root port ACS quirkAlex Williamson2015-01-241-0/+3
| | | | | | | | | | | | | | | | | | Intel has confirmed that the Wellsburg chipset, while not reporting ACS, does provide the proper isolation through the RCBA/BSPR registers, so the same quirk works for this set of device IDs. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Don Dugger <donald.d.dugger@intel.com>
| * PCI: Add DMA alias quirk for Adaptec 3405Alex Williamson2015-01-231-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Adaptec 3405 is actually an Intel 80333 I/O processor where the exposed device at 0e.0 is actually the address translation unit of the I/O processor and a hidden, private device at 01.0 masters the DMA for the device. Create a fixed alias between the exposed and hidden devfn so we can enable the IOMMU. Scenarios like this are potentially likely for any device incorporating this I/O processor, so this little bit of abstraction with the fixed alias table should make future additions trivial. Without this fix, booting a system with the Intel IOMMU enabled and an Adaptec 3405 at 02:0e.0 results in a flood of errors like this: dmar: DRHD: handling fault status reg 3 dmar: DMAR:[DMA Write] Request device [02:01.0] fault addr ffbff000 DMAR:[fault reason 02] Present bit in context entry is clear [bhelgaas: changelog, comment] Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Adaptec OEM Raid Solutions <aacraid@adaptec.com>
| * PCI: Add ACS quirk for Emulex NICsVasundhara Volam2015-01-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As Skyhawk and BE3-R (both multi-function devices) don't advertise the PCI-ACS capability, the vfio driver places all the functions of these devices in a single IOMMU group. Attaching (via PCI-passthru) two different Skyhawk/BE3-R partitions (nPAR, Flex, etc. PFs) using vfio, to different guests doesn't work as vfio only allows functions in *different* IOMMU groups to be assigned to different guests. As peer-to-peer access between PFs in Skyhawk/BE3-R is not possible, we can treat them as "fully isolated" even though the device doesn't advertise ACS. Add a PCI quirk for Skyhawk and BE3-R chips to fix this problem. Signed-off-by: Vasundhara Volam <vasundhara.volam@emulex.com> Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Williamson <alex.williamson@redhat.com>
| * PCI: Mark AMD/ATI VGA devices that don't reset on D3hot->D0 transitionAlex Williamson2015-01-161-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some AMD/ATI GPUs report NoSoftRst- to indicate that they perform a reset when software transitions them from D3hot to D0, but there is no apparent effect on the device: the monitor remains synced and the framebuffer contents are retained. Callers of pci_reset_function() don't necessarily have a way to validate whether a reset was effective, so we don't want to rely on NoSoftRst if it's known to be inaccurate. Returning an error in such cases appears to be the better option. For users like vfio-pci, this allows the driver to escalate to the bus reset interfaces. If a device lives on the root bus, there's really no further escalation path, so we exempt PM reset as potentially better than nothing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
* | PCI: Handle read-only BARs on AMD CS553x devicesMyron Stowe2015-02-041-3/+37
|/ | | | | | | | | | | | | | | | | | | | | | | | | | Some AMD CS553x devices have read-only BARs because of a firmware or hardware defect. There's a workaround in quirk_cs5536_vsa(), but it no longer works after 36e8164882ca ("PCI: Restore detection of read-only BARs"). Prior to 36e8164882ca, we filled in res->start; afterwards we leave it zeroed out. The quirk only updated the size, so the driver tried to use a region starting at zero, which didn't work. Expand quirk_cs5536_vsa() to read the base addresses from the BARs and hard-code the sizes. On Nix's system BAR 2's read-only value is 0x6200. Prior to 36e8164882ca, we interpret that as a 512-byte BAR based on the lowest-order bit set. Per datasheet sec 5.6.1, that BAR (MFGPT) requires only 64 bytes; use that to avoid clearing any address bits if a platform uses only 64-byte alignment. [bhelgaas: changelog, reduce BAR 2 size to 64] Fixes: 36e8164882ca ("PCI: Restore detection of read-only BARs") Link: https://bugzilla.kernel.org/show_bug.cgi?id=85991#c4 Link: http://support.amd.com/TechDocs/31506_cs5535_databook.pdf Link: http://support.amd.com/TechDocs/33238G_cs5536_db.pdf Reported-and-tested-by: Nix <nix@esperi.org.uk> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v.2.6.27+
* PCI: Mark Atheros AR93xx to avoid bus resetAlex Williamson2015-01-161-0/+14
| | | | | | | | | | | | | | | | | | | | Reports against the TL-WDN4800 card indicate that PCI bus reset of this Atheros device cause system lock-ups and resets. I've also been able to confirm this behavior on multiple systems. The device never returns from reset and attempts to access config space of the device after reset result in hangs. Blacklist bus reset for the device to avoid this issue. [bhelgaas: This regression appeared in v3.14. Andreas bisected it to 425c1b223dac ("PCI: Add Virtual Channel to save/restore support"), but we don't understand the mechanism by which that commit affects the reset path.] [bhelgaas: changelog, references] Link: http://lkml.kernel.org/r/20140923210318.498dacbd@dualc.maya.org Reported-by: Andreas Hartmann <andihartmann@freenet.de> Tested-by: Andreas Hartmann <andihartmann@freenet.de> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.14+
* PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD deviceHuang Rui2014-11-031-0/+20
| | | | | | | | | | | | | | | | | | | The AMD Nolan (NL) SoC contains a DesignWare USB3 Dual-Role Device that can be operated either as a USB Host or a USB Device. In the AMD NL platform, this device ([1022:7912]) has a class code of PCI_CLASS_SERIAL_USB_XHCI (0x0c0330), which means the xhci driver will claim it. But the dwc3 driver is a more specific driver for this device, and we'd prefer to use it instead of xhci. To prevent xhci from claiming the device, change the class code to 0x0c03fe, which the PCI r3.0 spec defines as "USB device (not host controller)". The dwc3 driver can then claim it based on its Vendor and Device ID. Suggested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jason Chang <jason.chang@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* Merge branch 'pci/virtualization' into nextBjorn Helgaas2014-10-061-0/+7
|\ | | | | | | | | * pci/virtualization: PCI: Add ACS quirk for AMD A88X southbridge devices
| * PCI: Add ACS quirk for AMD A88X southbridge devicesMarti Raudsepp2014-10-021-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | AMD has confirmed that peer-to-peer between two southbridge functions does not occur. Add a quirk to indicate that these functions are isolated even though they don't have an ACS capability. Link: https://bugzilla.kernel.org/show_bug.cgi?id=81841 Signed-off-by: Marti Raudsepp <marti@juffo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joel Schopp <joel.schopp@amd.com>
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*-. | Merge branches 'pci/aer' and 'pci/virtualization' into nextBjorn Helgaas2014-10-011-6/+28
|\ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/aer: PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND PCI/AER: Add additional PCIe AER error strings trace, RAS: Add additional PCIe AER error strings trace, RAS: Replace bare numbers with #defines for PCIe AER error strings * pci/virtualization: PCI: Add ACS quirk for Intel 10G NICs
| | * PCI: Add ACS quirk for Intel 10G NICsAlex Williamson2014-09-291-6/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel has verified there is no peer-to-peer between functions for the below selection of 82598, 82599, and X520 10G NICs. These NICs lack an ACS capability, so we're not able to determine this isolation without the help of quirks. Generalize the Solarflare quirk and add these Intel 10G NICs. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: John Ronciak <John.ronciak@intel.com>
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*-. \ \ Merge branches 'pci/enumeration', 'pci/virtualization' and 'pci/cleanup' ↵Bjorn Helgaas2014-09-251-51/+17
|\ \ \ \ | | |/ / | |/| / | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next * pci/enumeration: PCI: Generate uppercase hex for modalias interface class * pci/virtualization: PCI: Add ACS quirk for Solarflare SFC9120 & SFC9140 PCI: Remove unused pci_get_dma_source() PCI: Remove unused pci_find_upstream_pcie_bridge() * pci/cleanup: PCI: Remove assignment from complicated "if" conditions PCI: Remove assignment from "if" conditions PCI: Remove unnecessary curly braces PCI: Add space before open parenthesis
| | * PCI: Add ACS quirk for Solarflare SFC9120 & SFC9140Alex Williamson2014-09-221-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | Solarflare confirms that these devices do not allow peer-to-peer between functions. Quirk them to allow IOMMU grouping to expose this isolation. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Robert Stonehouse <rstonehouse@solarflare.com>
| | * PCI: Remove unused pci_get_dma_source()Alex Williamson2014-09-221-51/+0
| | | | | | | | | | | | | | | | | | | | | pci_get_dma_source() is unused, so remove it. We now have dma_alias_devfn() to describe this. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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*-. \ \ Merge branches 'pci/enumeration', 'pci/misc' and 'pci/virtualization' into nextBjorn Helgaas2014-09-221-0/+22
|\ \ \ \ | |_|/ / |/| | / | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/enumeration: PCI: Enable CRS Software Visibility for root port if it is supported PCI: Check only the Vendor ID to identify Configuration Request Retry * pci/misc: PCI: Parenthesize PCI_DEVID and PCI_VPD_LRDT_ID parameters PCI: Increase IBM ipr SAS Crocodile BARs to at least system page size PCI/AER: Make <linux/aer.h> standalone includable * pci/virtualization: PCI: Use device flag helper functions xen/pciback: Use PCI device flag helper functions KVM: Use PCI device flag helper functions PCI: Add device flag helper functions PCI: Assume all Mellanox devices have broken INTx masking
| | * PCI: Assume all Mellanox devices have broken INTx maskingGavin Shan2014-09-081-0/+2
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VFIO driver routes LSI interrupts by capturing, masking, and then delivering. When passing though Mellanox adapters from host to guest, interrupt storm are reported from host and guest. That's because the PCI command register INTx Disable bit doesn't work on Mellanox devices. # lspci | grep Mellanox 0001:05:00.0 Ethernet controller: Mellanox Technologies MT27500 Family [ConnectX-3] 0005:01:00.0 Ethernet controller: Mellanox Technologies MT26448 [ConnectX EN 10GigE, PCIe 2.0 5GT/s] (rev b0) Amir Vadai confirmed that all Mellanox devices have same problem. The patch marks broken INTx masking for all Mellanox adapters. Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Amir Vadai <amirv@mellanox.com>
| * PCI: Increase IBM ipr SAS Crocodile BARs to at least system page sizeDouglas Lehr2014-09-171-0/+20
|/ | | | | | | | | | | | | | | | | The Crocodile chip occasionally comes up with 4k and 8k BAR sizes. Due to an erratum, setting the SR-IOV page size causes the physical function BARs to expand to the system page size. Since ppc64 uses 64k pages, when Linux tries to assign the smaller resource sizes to the now 64k BARs the address will be truncated and the BARs will overlap. Force Linux to allocate the resource as a full page, which avoids the overlap. [bhelgaas: print expanded resource, too] Signed-off-by: Douglas Lehr <dllehr@us.ibm.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Milton Miller <miltonm@us.ibm.com> CC: stable@vger.kernel.org
* Merge tag 'char-misc-3.17-rc1' of ↵Linus Torvalds2014-08-051-0/+104
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char / misc driver patches from Greg KH: "Here's the big driver misc / char pull request for 3.17-rc1. Lots of things in here, the thunderbolt support for Apple laptops, some other new drivers, testing fixes, and other good things. All have been in linux-next for a long time" * tag 'char-misc-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (119 commits) misc: bh1780: Introduce the use of devm_kzalloc Lattice ECP3 FPGA: Correct endianness drivers/misc/ti-st: Load firmware from ti-connectivity directory. dt-bindings: extcon: Add support for SM5502 MUIC device extcon: sm5502: Change internal hardware switch according to cable type extcon: sm5502: Detect cable state after completing platform booting extcon: sm5502: Add support new SM5502 extcon device driver extcon: arizona: Get MICVDD against extcon device extcon: Remove unnecessary OOM messages misc: vexpress: Fix sparse non static symbol warnings mei: drop unused hw dependent fw status functions misc: bh1770glc: Use managed functions pcmcia: remove DEFINE_PCI_DEVICE_TABLE usage misc: remove DEFINE_PCI_DEVICE_TABLE usage ipack: Replace DEFINE_PCI_DEVICE_TABLE macro use drivers/char/dsp56k.c: drop check for negativity of unsigned parameter mei: fix return value on disconnect timeout mei: don't schedule suspend in pm idle mei: start disconnect request timer consistently mei: reset client connection state on timeout ...
| * PCI: Suspend/resume quirks for Apple thunderboltAndreas Noever2014-06-191-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two quirks to support thunderbolt suspend/resume on Apple systems. We need to perform two different actions during suspend and resume: The whole controller has to be powered down before suspend. If this is not done then the native host interface device will be gone after resume if a thunderbolt device was plugged in before suspending. The controller represents itself as multiple PCI devices/bridges. To power it down we hook into the upstream bridge of the controller and call the magic ACPI methods. Power will be restored automatically during resume (by the firmware presumably). During resume we have to wait for the native host interface to reestablish all pci tunnels. Since there is no parent-child relationship between the NHI and the bridges we have to explicitly wait for them using device_pm_wait_for_dev. We do this in the resume_noirq phase of the downstream bridges of the controller (which lead into the thunderbolt tunnels). Signed-off-by: Andreas Noever <andreas.noever@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * PCI: Add pci_fixup_suspend_late quirk passAndreas Noever2014-06-191-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pci_fixup_suspend_late as a new pci_fixup_pass. The pass is called from suspend_noirq and poweroff_noirq. Using the same pass for suspend and hibernate is consistent with resume_early which is called by resume_noirq and restore_noirq. The new quirk pass is required for Thunderbolt support on Apple hardware. Signed-off-by: Andreas Noever <andreas.noever@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | PCI: Add bridge DMA alias quirk for Intel 82801 bridgeAlex Williamson2014-07-051-0/+2
|/ | | | | | | | | | | This bridge sometimes shows up as a root complex device and sometimes as a discrete PCIe-to-PCI bridge. Testing indicates that in the latter case, we need to enable the PCIe bridge DMA alias quirk. Reported-by: Milos Kaurin <milos.kaurin@gmail.com> Tested-by: Milos Kaurin <milos.kaurin@gmail.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
*-. Merge branches 'pci/msi', 'pci/iommu' and 'pci/cleanup' into nextBjorn Helgaas2014-06-111-84/+73
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/msi: PCI/MSI: Fix memory leak in free_msi_irqs() * pci/iommu: PCI: Add function 1 DMA alias quirk for HighPoint RocketRaid 642L PCI: Add bridge DMA alias quirk for ITE bridge * pci/cleanup: PCI: Merge multi-line quoted strings PCI: Whitespace cleanup PCI: Move EXPORT_SYMBOL so it immediately follows function/variable
| | * PCI: Merge multi-line quoted stringsRyan Desfosses2014-06-111-46/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge quoted strings that are broken across lines into a single entity. The compiler merges them anyway, but checkpatch complains about it, and merging them makes it easier to grep for strings. No functional change. [bhelgaas: changelog, do the same for everything under drivers/pci] Signed-off-by: Ryan Desfosses <ryan@desfo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * PCI: Whitespace cleanupRyan Desfosses2014-06-111-38/+36
| |/ |/| | | | | | | | | | | | | | | Fix various whitespace errors. No functional change. [bhelgaas: fix other similar problems] Signed-off-by: Ryan Desfosses <ryan@desfo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: Add function 1 DMA alias quirk for HighPoint RocketRaid 642LJérôme Carretero2014-06-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This device uses function 1 as the PCIe requester ID. This vendor has similar boards based on the same Marvell 88SE9235 chipset, but this patch was only tested with the 642L. Tested on ASUS Sabertooth 990FX (AMD). Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679 Signed-off-by: Jérôme Carretero <cJ-ko@zougloub.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Williamson <alex.williamson@redhat.com>
| * PCI: Add bridge DMA alias quirk for ITE bridgeAlex Williamson2014-06-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The ITE 8892 is a PCIe-to-PCI bridge but doesn't have a PCIe capability. Quirk it so we can figure out the DMA alias for devices below the bridge, so they work correctly with an IOMMU. [bhelgaas: add changelog] Link: https://bugzilla.kernel.org/show_bug.cgi?id=73551 Reported-by: Ronald <rwarsow@gmx.de> Tested-by: Ronald <rwarsow@gmx.de> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge branch 'pci/iommu' into nextBjorn Helgaas2014-06-031-0/+75
|\| | | | | | | | | | | | | | | | | | | | | * pci/iommu: PCI: Add bridge DMA alias quirk for ASMedia and Tundra bridges PCI: Add support for PCIe-to-PCI bridge DMA alias quirks PCI: Add function 1 DMA alias quirk for Marvell devices PCI: Add function 0 DMA alias quirk for Ricoh devices PCI: Add support for DMA alias quirks PCI: Convert pci_dev_flags definitions to bit shifts PCI: Add DMA alias iterator
| * PCI: Add bridge DMA alias quirk for ASMedia and Tundra bridgesAlex Williamson2014-05-281-0/+23
| | | | | | | | | | | | | | | | The quirk is intended to be extremely generic, but we only apply it to known offending devices. Link: https://bugzilla.kernel.org/show_bug.cgi?id=44881 Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: Add function 1 DMA alias quirk for Marvell devicesAlex Williamson2014-05-281-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Several Marvell devices and a JMicron device have a similar DMA requester ID problem to Ricoh, except they use function 1 as the PCIe requester ID. Add a quirk for these to populate the DMA alias with the correct devfn. Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679 Tested-by: George Spelvin <linux@horizon.com> Tested-by: Andreas Schrägle <ajs124.ajs124@gmail.com> Tested-by: Tobias N <qemu@suppser.de> Tested-by: <daxcore@online.de> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * PCI: Add function 0 DMA alias quirk for Ricoh devicesAlex Williamson2014-05-281-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing quirk for these devices (pci_get_dma_source()) doesn't really solve the problem; re-implement it using the DMA alias iterator. We'll come back later and remove the existing quirk and dma_source interface. Note that device ID 0xe822 is typically function 0 and 0xe230 has been tested to not need the quirk and are therefore removed versus the equivalent dma_source quirk. If there exist in other configurations we can re-add them. Link: https://bugzilla.redhat.com/show_bug.cgi?id=605888 Tested-by: Pat Erley <pat-lkml@erley.org> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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*---. \ Merge branches 'dma-api', 'pci/virtualization', 'pci/msi', 'pci/misc' and ↵Bjorn Helgaas2014-05-271-0/+8
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pci/resource' into next * dma-api: iommu/exynos: Remove unnecessary "&" from function pointers DMA-API: Update dma_pool_create ()and dma_pool_alloc() descriptions DMA-API: Fix duplicated word in DMA-API-HOWTO.txt DMA-API: Capitalize "CPU" consistently sh/PCI: Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_coherent_memory() DMA-API: Change dma_declare_coherent_memory() CPU address to phys_addr_t DMA-API: Clarify physical/bus address distinction * pci/virtualization: PCI: Mark RTL8110SC INTx masking as broken * pci/msi: PCI/MSI: Remove pci_enable_msi_block() * pci/misc: PCI: Remove pcibios_add_platform_entries() s390/pci: use pdev->dev.groups for attribute creation PCI: Move Open Firmware devspec attribute to PCI common code * pci/resource: PCI: Add resource allocation comments PCI: Simplify __pci_assign_resource() coding style PCI: Change pbus_size_mem() return values to be more conventional PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources PCI: Support BAR sizes up to 8GB resources: Clarify sanity check message PCI: Don't add disabled subtractive decode bus resources PCI: Don't print anything while decoding is disabled PCI: Don't set BAR to zero if dma_addr_t is too small PCI: Don't convert BAR address to resource if dma_addr_t is too small PCI: Reject BAR above 4GB if dma_addr_t is too small PCI: Fail safely if we can't handle BARs larger than 4GB x86/gart: Tidy messages and add bridge device info x86/gart: Replace printk() with pr_info() x86/PCI: Move pcibios_assign_resources() annotation to definition x86/PCI: Mark ATI SBx00 HPET BAR as IORESOURCE_PCI_FIXED x86/PCI: Don't try to move IORESOURCE_PCI_FIXED resources x86/PCI: Fix Broadcom CNB20LE unintended sign extension
| | * | PCI: Mark RTL8110SC INTx masking as brokenAlex Williamson2014-05-201-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | INTx masking does not work on this device. To see this, configure the network device UP on an active network, note that the interrupt count continues to increment for the device in /proc/interrupts. Use setpci to set the PCI_COMMAND_INTX_DISABLE bit in the PCI_COMMAND register. As expected, the interrupt count ceases to increment. However, reading the PCI_STATUS_INTERRUPT bit of the PCI_STATUS register does not indicate that interrupts are pending and clearing PCI_COMMAND_INTX_DISABLE in the PCI_COMMAND register does not allow the device to continue operation. This does not affect operation of the host r8169 driver, but it does prevent the device from being functional when assigned to a VM, such as with QEMU and VFIO. The guest driver successfully probes the device, but there is no traffic. Mark INTx masking as broken, allowing the more restrictive APIC masking to be used instead. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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*-. \ \ \ Merge branches 'pci/hotplug', 'pci/msi', 'pci/virtualization' and 'pci/misc' ↵Bjorn Helgaas2014-04-301-0/+3
|\ \ \ \ \ | |_|/ / / |/| | / / | | |/ / | |/| / | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next * pci/hotplug: PCI: rphahp: Fix endianess issues PCI: Allow hotplug service drivers to operate in polling mode PCI: pciehp: Acknowledge spurious "cmd completed" event PCI: pciehp: Use PCI_EXP_SLTCAP_PSN define PCI: hotplug: Remove unnecessary "dev->bus" test * pci/msi: GenWQE: Use pci_enable_msi_exact() instead of pci_enable_msi_block() PCI/MSI: Simplify populate_msi_sysfs() PCI/portdrv: Use pci_enable_msix_exact() instead of pci_enable_msix() * pci/virtualization: PCI: Add Patsburg (X79) to Intel PCH root port ACS quirk * pci/misc: PCI: Fix use of uninitialized MPS value PCI: Remove dead code MAINTAINERS: Add arch/x86/kernel/quirks.c to PCI file patterns PCI: Remove unnecessary __ref annotations PCI: Fail new_id for vendor/device values already built into driver PCI: Add new ID for Intel GPU "spurious interrupt" quirk PCI: Update my email address PCI: Fix incorrect vgaarb conditional in WARN_ON() PCI: Use designated initialization in PCI_VDEVICE PCI: Remove old serial device IDs PCI: Remove unnecessary includes of <linux/init.h> powerpc/PCI: Fix NULL dereference in sys_pciconfig_iobase() list traversal
| | * PCI: Add new ID for Intel GPU "spurious interrupt" quirkThomas Jarosch2014-04-291-0/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After a CPU upgrade while keeping the same mainboard, we faced "spurious interrupt" problems again. It turned out that the new CPU also featured a new GPU with a different PCI ID. Add this PCI ID to the quirk table. Probably all other Intel GPU PCI IDs are affected, too, but I don't want to add them without a test system. See f67fd55fa96f ("PCI: Add quirk for still enabled interrupts on Intel Sandy Bridge GPUs") for some history. [bhelgaas: add f67fd55fa96f reference, stable tag] Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.4+
| * PCI: Add Patsburg (X79) to Intel PCH root port ACS quirkAlex Williamson2014-04-151-0/+2
|/ | | | | | | | | | | Intel has updated Red Hat bz1037684 to note that X79 PCH root ports also provide isolation and the same ACS quirks apply. Some sources indicate additional device IDs for X79, but this patch includes only the ones specifically identified by Intel: https://bugzilla.redhat.com/show_bug.cgi?id=1037684#c11 Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Don Dugger <donald.d.dugger@intel.com>
* Merge branch 'pci/resource' into nextBjorn Helgaas2014-03-191-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/resource: (26 commits) Revert "[PATCH] Insert GART region into resource map" PCI: Log IDE resource quirk in dmesg PCI: Change pci_bus_alloc_resource() type_mask to unsigned long PCI: Check all IORESOURCE_TYPE_BITS in pci_bus_alloc_from_region() resources: Set type in __request_region() PCI: Don't check resource_size() in pci_bus_alloc_resource() s390/PCI: Use generic pci_enable_resources() tile PCI RC: Use default pcibios_enable_device() sparc/PCI: Use default pcibios_enable_device() (Leon only) sh/PCI: Use default pcibios_enable_device() microblaze/PCI: Use default pcibios_enable_device() alpha/PCI: Use default pcibios_enable_device() PCI: Add "weak" generic pcibios_enable_device() implementation PCI: Don't enable decoding if BAR hasn't been assigned an address PCI: Mark 64-bit resource as IORESOURCE_UNSET if we only support 32-bit PCI: Don't try to claim IORESOURCE_UNSET resources PCI: Check IORESOURCE_UNSET before updating BAR PCI: Don't clear IORESOURCE_UNSET when updating BAR PCI: Mark resources as IORESOURCE_UNSET if we can't assign them PCI: Remove pci_find_parent_resource() use for allocation ...
| * PCI: Mark resources as IORESOURCE_UNSET if we can't assign themBjorn Helgaas2014-02-271-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | When assigning addresses to resources, mark them with IORESOURCE_UNSET before we start and clear IORESOURCE_UNSET if assignment is successful. That means that if we print the resource during assignment, we will show the size, not a meaningless address. Also, clear IORESOURCE_UNSET if we do assign an address, so we print the address when it is valid. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | PCI: Enable quirks for PCIe ACS on Intel PCH root portsAlex Williamson2014-02-111-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the currently available Intel PCH-based root ports do not provide PCIe ACS capabilities. Without this, we must assume that peer-to-peer traffic between multifunction root ports and between devices behind root ports is possible. This lack of isolation is exposed by grouping the devices together in the same IOMMU group. If we want to expose these devices to userspace, vfio uses IOMMU groups as the unit of ownership, thus making it very difficult to assign individual devices to separate users. The good news is that the chipset does provide ACS-like isolation capabilities, but we do need to verify and enable those capabilities if the BIOS has not done so. This patch implements the device specific enabling and testing of equivalent ACS function for these devices. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Don Dugger <donald.d.dugger@intel.com>
* | PCI: Add device-specific PCI ACS enableAlex Williamson2014-02-111-0/+25
|/ | | | | | | | | Some devices support PCI ACS-like features, but don't report it using the standard PCIe capabilities. We already provide hooks for device-specific testing of ACS, but not for device-specific enabling of ACS. This provides that setup hook. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Merge tag 'pci-v3.14-changes' of ↵Linus Torvalds2014-01-231-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes for the v3.14 merge window: Resource management - Change pci_bus_region addresses to dma_addr_t (Bjorn Helgaas) - Support 64-bit AGP BARs (Bjorn Helgaas, Yinghai Lu) - Add pci_bus_address() to get bus address of a BAR (Bjorn Helgaas) - Use pci_resource_start() for CPU address of AGP BARs (Bjorn Helgaas) - Enforce bus address limits in resource allocation (Yinghai Lu) - Allocate 64-bit BARs above 4G when possible (Yinghai Lu) - Convert pcibios_resource_to_bus() to take pci_bus, not pci_dev (Yinghai Lu) PCI device hotplug - Major rescan/remove locking update (Rafael J. Wysocki) - Make ioapic builtin only (not modular) (Yinghai Lu) - Fix release/free issues (Yinghai Lu) - Clean up pciehp (Bjorn Helgaas) - Announce pciehp slot info during enumeration (Bjorn Helgaas) MSI - Add pci_msi_vec_count(), pci_msix_vec_count() (Alexander Gordeev) - Add pci_enable_msi_range(), pci_enable_msix_range() (Alexander Gordeev) - Deprecate "tri-state" interfaces: fail/success/fail+info (Alexander Gordeev) - Export MSI mode using attributes, not kobjects (Greg Kroah-Hartman) - Drop "irq" param from *_restore_msi_irqs() (DuanZhenzhong) SR-IOV - Clear NumVFs when disabling SR-IOV in sriov_init() (ethan.zhao) Virtualization - Add support for save/restore of extended capabilities (Alex Williamson) - Add Virtual Channel to save/restore support (Alex Williamson) - Never treat a VF as a multifunction device (Alex Williamson) - Add pci_try_reset_function(), et al (Alex Williamson) AER - Ignore non-PCIe error sources (Betty Dall) - Support ACPI HEST error sources for domains other than 0 (Betty Dall) - Consolidate HEST error source parsers (Bjorn Helgaas) - Add a TLP header print helper (Borislav Petkov) Freescale i.MX6 - Remove unnecessary code (Fabio Estevam) - Make reset-gpio optional (Marek Vasut) - Report "link up" only after link training completes (Marek Vasut) - Start link in Gen1 before negotiating for Gen2 mode (Marek Vasut) - Fix PCIe startup code (Richard Zhu) Marvell MVEBU - Remove duplicate of_clk_get_by_name() call (Andrew Lunn) - Drop writes to bridge Secondary Status register (Jason Gunthorpe) - Obey bridge PCI_COMMAND_MEM and PCI_COMMAND_IO bits (Jason Gunthorpe) - Support a bridge with no IO port window (Jason Gunthorpe) - Use max_t() instead of max(resource_size_t,) (Jingoo Han) - Remove redundant of_match_ptr (Sachin Kamat) - Call pci_ioremap_io() at startup instead of dynamically (Thomas Petazzoni) NVIDIA Tegra - Disable Gen2 for Tegra20 and Tegra30 (Eric Brower) Renesas R-Car - Add runtime PM support (Valentine Barshak) - Fix rcar_pci_probe() return value check (Wei Yongjun) Synopsys DesignWare - Fix crash in dw_msi_teardown_irq() (Bjørn Erik Nilsen) - Remove redundant call to pci_write_config_word() (Bjørn Erik Nilsen) - Fix missing MSI IRQs (Harro Haan) - Add dw_pcie prefix before cfg_read/write (Pratyush Anand) - Fix I/O transfers by using CPU (not realio) address (Pratyush Anand) - Whitespace cleanup (Jingoo Han) EISA - Call put_device() if device_register() fails (Levente Kurusa) - Revert EISA initialization breakage ((Bjorn Helgaas) Miscellaneous - Remove unused code, including PCIe 3.0 interfaces (Stephen Hemminger) - Prevent bus conflicts while checking for bridge apertures (Bjorn Helgaas) - Stop clearing bridge Secondary Status when setting up I/O aperture (Bjorn Helgaas) - Use dev_is_pci() to identify PCI devices (Yijing Wang) - Deprecate DEFINE_PCI_DEVICE_TABLE (Joe Perches) - Update documentation 00-INDEX (Erik Ekman)" * tag 'pci-v3.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (119 commits) Revert "EISA: Initialize device before its resources" Revert "EISA: Log device resources in dmesg" vfio-pci: Use pci "try" reset interface PCI: Check parent kobject in pci_destroy_dev() xen/pcifront: Use global PCI rescan-remove locking powerpc/eeh: Use global PCI rescan-remove locking PCI: Fix pci_check_and_unmask_intx() comment typos PCI: Add pci_try_reset_function(), pci_try_reset_slot(), pci_try_reset_bus() MPT / PCI: Use pci_stop_and_remove_bus_device_locked() platform / x86: Use global PCI rescan-remove locking PCI: hotplug: Use global PCI rescan-remove locking pcmcia: Use global PCI rescan-remove locking ACPI / hotplug / PCI: Use global PCI rescan-remove locking ACPI / PCI: Use global PCI rescan-remove locking in PCI root hotplug PCI: Add global pci_lock_rescan_remove() PCI: Cleanup pci.h whitespace PCI: Reorder so actual code comes before stubs PCI/AER: Support ACPI HEST AER error sources for PCI domains other than 0 ACPICA: Add helper macros to extract bus/segment numbers from HEST table. PCI: Make local functions static ...
| * PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_devYinghai Lu2013-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These interfaces: pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource) pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region) took a pci_dev, but they really depend only on the pci_bus. And we want to use them in resource allocation paths where we have the bus but not a device, so this patch converts them to take the pci_bus instead of the pci_dev: pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource) pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region) In fact, with standard PCI-PCI bridges, they only depend on the host bridge, because that's the only place address translation occurs, but we aren't going that far yet. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | remove obsolete references to powertweakDave Jones2013-11-281-4/+0
|/ | | | | | | | | | This tool hasn't been maintained in over a decade, and is pretty much useless these days. Let's pretend it never happened. Also remove a long-dead email address. Signed-off-by: Dave Jones <davej@fedoraproject.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Fix whitespace, capitalization, and spelling errorsBjorn Helgaas2013-11-141-52/+52
| | | | | | | | | Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* PCI: Remove Intel Haswell D3 delaysTodd E Brandt2013-09-251-0/+23
| | | | | | | | | | | | | | | | | | The latest Intel Haswell chipsets have a hardware optimization which allows on-chip PCI devices to ignore the 10ms delay before entering or exiting D3 suspend. This patch implements the optimization as a PCI quirk, since we want tight control over which devices use it. This way we can test each device individually to be sure there are no issues before we enable the quirk. The first set of devices are from the Haswell platform, which includes every PCI device that is on the northbridge and southbridge. This patch reduces the Haswell suspend time from 93 ms to 47 ms and resume time from 160 ms to 64 ms. Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Merge branch 'pci/vipul-chelsio-reset-v2' into nextBjorn Helgaas2013-08-121-16/+81
|\ | | | | | | | | | | | | | | * pci/vipul-chelsio-reset-v2: PCI: Use pci_wait_for_pending_transaction() instead of for loop bnx2x: Use pci_wait_for_pending_transaction() instead of for loop PCI: Chelsio quirk: Enable Bus Master during Function-Level Reset PCI: Add pci_wait_for_pending_transaction()
| * PCI: Use pci_wait_for_pending_transaction() instead of for loopCasey Leedom2013-08-121-16/+2
| | | | | | | | | | | | | | | | New routine has been added to avoid duplication of code to wait for pending PCI transactions to complete. This makes use of that function. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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