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path: root/drivers/phy/cadence/phy-cadence-sierra.c (follow)
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* phy: cadence: sierra: Fix for USB3 U1/U2 stateSanket Parmar2020-05-181-13/+14
* phy: cadence: Sierra: add phy_reset hookRoger Quadros2020-01-141-0/+10
* phy: cadence: Sierra: remove redundant initialization of pointer regmapColin Ian King2020-01-141-1/+1
* phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove()Kishon Vijay Abraham I2020-01-081-1/+1
* phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to...Kishon Vijay Abraham I2020-01-081-0/+21
* phy: cadence: Sierra: Change MAX_LANES of Sierra to 16Kishon Vijay Abraham I2020-01-081-1/+21
* phy: cadence: Sierra: Check for PLL lock during PHY power onKishon Vijay Abraham I2020-01-081-1/+32
* phy: cadence: Sierra: Get reset control "array" for each linkKishon Vijay Abraham I2020-01-081-1/+1
* phy: cadence: Sierra: Configure both lane cdb and common cdb registers for ex...Anil Varughese2020-01-081-96/+254
* phy: cadence: Sierra: Modify register macro names to be in sync with Sierra u...Kishon Vijay Abraham I2020-01-081-83/+84
* phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_opsKishon Vijay Abraham I2020-01-081-6/+9
* phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoCKishon Vijay Abraham I2020-01-081-0/+14
* phy: cadence: Sierra: Use "regmap" for read and write to Sierra registersKishon Vijay Abraham I2020-01-081-54/+237
* phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resourcesKishon Vijay Abraham I2020-01-081-2/+2
* phy: cadence: Add driver for Sierra PHYAlan Douglas2018-12-121-0/+395