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path: root/drivers/phy/phy-rockchip-emmc.c (follow)
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* phy: rockchip-emmc: Wait even longer for the DLL to lockDouglas Anderson2016-07-251-1/+11
* phy: rockchip-emmc: Be tolerant to card clock of 0 in power onDouglas Anderson2016-07-251-22/+37
* phy: rockchip-emmc: Set phyctrl_frqsel based on card clockDouglas Anderson2016-07-251-12/+89
* phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off()Douglas Anderson2016-07-251-12/+2
* phy: rockchip-emmc: Increase lock time allowanceDouglas Anderson2016-07-251-8/+20
* phy: rockchip-emmc: reindent the register definitionsBrian Norris2016-07-251-38/+38
* phy: rockchip-emmc: configure default output tap delayBrian Norris2016-07-251-0/+19
* phy: rockchip-emmc: configure frequency range and drive impedanceShawn Lin2016-07-251-0/+27
* phy: rockchip-emmc: give DLL some extra time to be readyShawn Lin2016-07-251-3/+4
* phy: rockchip-emmc: should be a child device of the GRFHeiko Stuebner2016-04-131-1/+4
* phy: add a driver for the Rockchip SoC internal eMMC PHYShawn Lin2016-03-011-0/+229