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path: root/drivers/phy/socionext (follow)
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* phy: uniphier-usb3ss: fix unintended writing zeros to PHY registerRyuta NAKANISHI2021-12-241-4/+6
* phy: uniphier-ahci: Add support for Pro4 SoCKunihiko Hayashi2021-11-232-5/+198
* phy: uniphier-pcie: Add dual-phy support for NX1 SoCKunihiko Hayashi2021-11-231-14/+34
* phy: uniphier-pcie: Set VCOPLL clamp mode in PHY registerKunihiko Hayashi2021-11-231-0/+5
* phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoCKunihiko Hayashi2021-11-231-0/+19
* phy: uniphier-usb3: Add compatible string for NX1 SoCKunihiko Hayashi2021-11-232-0/+8
* phy: uniphier-pcie: Fix updating phy parametersKunihiko Hayashi2021-06-211-4/+7
* phy: socionext: Add UniPhier AHCI PHY driver supportKunihiko Hayashi2020-08-313-0/+332
* phy: uniphier-pcie: Add SoC-dependent phy-mode function supportKunihiko Hayashi2020-03-201-7/+10
* phy: uniphier-pcie: Add legacy SoC support for Pro5Kunihiko Hayashi2020-03-201-11/+72
* phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failureKunihiko Hayashi2020-03-201-4/+16
* phy: uniphier-usb3hs: Add legacy SoC support for Pro5Kunihiko Hayashi2020-03-201-15/+53
* phy: uniphier-usb3ss: Add Pro5 supportKunihiko Hayashi2020-03-201-0/+4
* phy: socionext: Use devm_platform_ioremap_resource()Kunihiko Hayashi2020-03-203-9/+3
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
* phy: socionext: get optional clock by devm_clk_get_optional()Chunfeng Yun2019-04-172-14/+6
* phy: uniphier-pcie: Depend on HAS_IOMEMKunihiko Hayashi2018-11-121-1/+2
* phy: socionext: add PCIe PHY driver supportKunihiko Hayashi2018-09-253-0/+250
* phy: socionext: add USB2 PHY driver for UniPhier SoCKunihiko Hayashi2018-09-103-0/+258
* phy: socionext: add USB3 PHY driver for UniPhier SoCKunihiko Hayashi2018-09-104-0/+789