| Commit message (Expand) | Author | Age | Files | Lines |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 2019-05-30 | 1 | -11/+1 |
* | phy: ti-pipe3: Fix PCIe power up sequence | Roger Quadros | 2019-04-17 | 1 | -6/+6 |
* | phy: ti-pipe3: Fix SATA & USB PHY power up sequence | Roger Quadros | 2019-04-17 | 1 | -14/+30 |
* | phy: ti-pipe3: improve DPLL stability for SATA & USB | Roger Quadros | 2019-04-17 | 1 | -42/+173 |
* | phy: ti-pipe3: Introduce mode property in driver data | Roger Quadros | 2019-04-17 | 1 | -36/+57 |
* | phy: ti-pipe3: fix missing bit-wise or operator when assigning val | Colin Ian King | 2019-04-17 | 1 | -1/+1 |
* | phy: ti-pipe3: Update pcie phy settings | Kishon Vijay Abraham I | 2017-10-23 | 1 | -1/+100 |
* | phy: ti-pipe3: Use TRM recommended settings for SATA DPLL | Roger Quadros | 2017-08-20 | 1 | -5/+5 |
* | phy: Group vendor specific phy drivers | Vivek Gautam | 2017-06-01 | 1 | -0/+697 |