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* Merge 5.9-rc8 into usb-nextGreg Kroah-Hartman2020-10-051-2/+4
|\ | | | | | | | | | | We need the USB fixes in here as well for testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * phy: ti: am654: Fix a leak in serdes_am654_probe()Dan Carpenter2020-09-081-2/+4
| | | | | | | | | | | | | | | | | | | | If devm_phy_create() fails then we need to call of_clk_del_provider(node) to undo the call to of_clk_add_provider(). Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200905124648.GA183976@mwanda Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: gmii-sel: retrieve ports number and base offset from dtGrygorii Strashko2020-09-081-11/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On K3 AM654x/J721E platforms the Port MII mode selection register(s) have similar format and placed in the System Control Module (SCM) module sequentially as one register per port, but, depending SOC and CPSW instance, the base offset and number of ports can be different. Hence, add possibility to retrieve number of ports and base registers offset from DT and support for max possible number of ports supported by K3 SoCs like J721E. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: gmii-sel: use features mask during initGrygorii Strashko2020-09-081-8/+2
| | | | | | | | | | | | | | | | Use features mask during PHYs initialization to simplify code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: gmii-sel: move phy init in separate functionGrygorii Strashko2020-09-081-47/+64
| | | | | | | | | | | | | | | | | | Move phy initialization in separate function to improve code readability and simplify future changes. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: omap-usb2-phy: fix coding style issuesRoger Quadros2020-08-311-19/+17
| | | | | | | | | | | | | | | | Fix checkpatch warnings and sort the include files alphabetically. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200824075127.14902-3-rogerq@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge branch 'fixes' into nextVinod Koul2020-08-311-7/+40
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| * phy: omap-usb2-phy: disable PHY charger detectRoger Quadros2020-08-311-7/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20200824075127.14902-2-rogerq@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: j721e-wiz: Remove duplicate includeYueHaibing2020-08-231-1/+0
| | | | | | | | | | | | | | | | Remove duplicate include file Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200818114721.55464-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: am654: update PCIe serdes configSekhar Nori2020-08-231-5/+135
| | | | | | | | | | | | | | | | | | | | | | Update PCIe serdes config to latest suggested for hardware. This fixes cases of failure to enumerate in Gen2 mode with some cards. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-4-nsekhar@ti.com [fix typo threshold] Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: am654: simplify return handlingSekhar Nori2020-08-231-28/+20
| | | | | | | | | | | | | | | | | | | | | | Checking return value after each regfield write becomes hard to read quickly as number of writes increase. Simplify by checking for error only once. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-3-nsekhar@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: am654: simplify regfield handlingSekhar Nori2020-08-231-93/+68
|/ | | | | | | | | | | | | | regfield handling in current driver code is made complicated by having a separate regfield variable for each field which is allocated individually. This quickly gets unwieldy once number of regfields increase. Instead, use an array of regfields which are allocated in a loop. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-2-nsekhar@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge branch 'fixes' into nextVinod Koul2020-07-172-6/+6
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| * phy: ti: j721e-wiz: Constify structsRikard Falkeborn2020-06-241-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_div_table and wiz_regmap_config are not modified and can therefore be made const to allow the compiler to put them in read-only memory. Before: text data bss dec hex filename 20265 7044 64 27373 6aed drivers/phy/ti/phy-j721e-wiz.o After: text data bss dec hex filename 20649 6660 64 27373 6aed drivers/phy/ti/phy-j721e-wiz.o Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200524095516.25227-3-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: ti: am654-serdes: Constify regmap_configRikard Falkeborn2020-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | regmap_config is not modified and can be made static to allow the compiler to put it in read-only memory. Before: text data bss dec hex filename 12328 3644 64 16036 3ea4 drivers/phy/ti/phy-am654-serdes.o After: text data bss dec hex filename 12648 3324 64 16036 3ea4 drivers/phy/ti/phy-am654-serdes.o Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200524095516.25227-2-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti-pipe3: remove set but unused variableVinod Koul2020-07-081-3/+2
| | | | | | | | | | | | | | | | | | | | ti_pipe3_power_on() sets variable 'ret' but never uses it, so remove it. drivers/phy/ti/phy-ti-pipe3.c:340:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Link: https://lore.kernel.org/r/20200629145010.122675-4-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: ti: dm816x: remove set but unused variableVinod Koul2020-07-081-6/+5
|/ | | | | | | | | | | dm816x_usb_phy_init() sets variable 'error' but never uses it, so remove it. drivers/phy/ti/phy-dm816x-usb.c:85:6: warning: variable ‘error’ set but not used [-Wunused-but-set-variable] Link: https://lore.kernel.org/r/20200629145010.122675-3-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* phy: ti: am654: add support for USB super-speedRoger Quadros2020-05-181-2/+101
| | | | | | | | | The SERDES PHY can support USB super-speed lane. Add support for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200513131254.10497-3-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: am654: show up in regmap debugfsRoger Quadros2020-05-181-0/+1
| | | | | | | | | The max_register property must be set in order to show up the registers in debugfs. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200513131254.10497-2-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: omap-usb2: Clean up exported headerRoger Quadros2020-05-181-4/+56
| | | | | | | | | Move private definitions from header to phy-omap-usb2.c file. Get rid of unused data structures usb_dpll_params and omap_usb_phy_type. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200515080518.26870-2-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: j721e-wiz: Fix some error return code in wiz_probe()Wei Yongjun2020-05-131-1/+5
| | | | | | | | | | | | Fix to return negative error code from some error handling cases instead of 0, as done elsewhere in this function. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200507054109.110849-1-weiyongjun1@huawei.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driverJyri Sarha2020-04-241-4/+55
| | | | | | | | | | | | | | | | For DisplayPort use we need to set WIZ_CONFIG_LANECTL register's P_STANDARD_MODE bits to "mode 3". In the DisplayPort use also the P_ENABLE bits of the same register are set to P_ENABLE instead of P_ENABLE_FORCE, so that the DisplayPort driver can enable and disable the lane as needed. The DisplayPort mode is selected according to "cdns,phy-type"-properties found in link subnodes under the managed serdes (see "ti,sierra-phy-t0" and "ti,j721e-serdes-10g" devicetree bindings for details). All other values of "cdns,phy-type"-property but PHY_TYPE_DP will set P_STANDARD_MODE bits to 0 and P_ENABLE bits to force enable. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-nextLinus Torvalds2020-04-011-3/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking updates from David Miller: "Highlights: 1) Fix the iwlwifi regression, from Johannes Berg. 2) Support BSS coloring and 802.11 encapsulation offloading in hardware, from John Crispin. 3) Fix some potential Spectre issues in qtnfmac, from Sergey Matyukevich. 4) Add TTL decrement action to openvswitch, from Matteo Croce. 5) Allow paralleization through flow_action setup by not taking the RTNL mutex, from Vlad Buslov. 6) A lot of zero-length array to flexible-array conversions, from Gustavo A. R. Silva. 7) Align XDP statistics names across several drivers for consistency, from Lorenzo Bianconi. 8) Add various pieces of infrastructure for offloading conntrack, and make use of it in mlx5 driver, from Paul Blakey. 9) Allow using listening sockets in BPF sockmap, from Jakub Sitnicki. 10) Lots of parallelization improvements during configuration changes in mlxsw driver, from Ido Schimmel. 11) Add support to devlink for generic packet traps, which report packets dropped during ACL processing. And use them in mlxsw driver. From Jiri Pirko. 12) Support bcmgenet on ACPI, from Jeremy Linton. 13) Make BPF compatible with RT, from Thomas Gleixnet, Alexei Starovoitov, and your's truly. 14) Support XDP meta-data in virtio_net, from Yuya Kusakabe. 15) Fix sysfs permissions when network devices change namespaces, from Christian Brauner. 16) Add a flags element to ethtool_ops so that drivers can more simply indicate which coalescing parameters they actually support, and therefore the generic layer can validate the user's ethtool request. Use this in all drivers, from Jakub Kicinski. 17) Offload FIFO qdisc in mlxsw, from Petr Machata. 18) Support UDP sockets in sockmap, from Lorenz Bauer. 19) Fix stretch ACK bugs in several TCP congestion control modules, from Pengcheng Yang. 20) Support virtual functiosn in octeontx2 driver, from Tomasz Duszynski. 21) Add region operations for devlink and use it in ice driver to dump NVM contents, from Jacob Keller. 22) Add support for hw offload of MACSEC, from Antoine Tenart. 23) Add support for BPF programs that can be attached to LSM hooks, from KP Singh. 24) Support for multiple paths, path managers, and counters in MPTCP. From Peter Krystad, Paolo Abeni, Florian Westphal, Davide Caratti, and others. 25) More progress on adding the netlink interface to ethtool, from Michal Kubecek" * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2121 commits) net: ipv6: rpl_iptunnel: Fix potential memory leak in rpl_do_srh_inline cxgb4/chcr: nic-tls stats in ethtool net: dsa: fix oops while probing Marvell DSA switches net/bpfilter: remove superfluous testing message net: macb: Fix handling of fixed-link node net: dsa: ksz: Select KSZ protocol tag netdevsim: dev: Fix memory leak in nsim_dev_take_snapshot_write net: stmmac: add EHL 2.5Gbps PCI info and PCI ID net: stmmac: add EHL PSE0 & PSE1 1Gbps PCI info and PCI ID net: stmmac: create dwmac-intel.c to contain all Intel platform net: dsa: bcm_sf2: Support specifying VLAN tag egress rule net: dsa: bcm_sf2: Add support for matching VLAN TCI net: dsa: bcm_sf2: Move writing of CFP_DATA(5) into slicing functions net: dsa: bcm_sf2: Check earlier for FLOW_EXT and FLOW_MAC_EXT net: dsa: bcm_sf2: Disable learning for ASP port net: dsa: b53: Deny enslaving port 7 for 7278 into a bridge net: dsa: b53: Prevent tagged VLAN on port 7 for 7278 net: dsa: b53: Restore VLAN entries upon (re)configuration net: dsa: bcm_sf2: Fix overflow checks hv_netvsc: Remove unnecessary round_up for recv_completion_cnt ...
| * phy: ti: gmii-sel: simplify config dependencies between net drivers and gmii phyGrygorii Strashko2020-03-271-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The phy-gmii-sel can be only auto selected in Kconfig and now the pretty complex Kconfig dependencies are defined for phy-gmii-sel driver, which also need to be updated every time phy-gmii-sel is re-used for any new networking driver. Simplify Kconfig definition for phy-gmii-sel PHY driver - drop all dependencies and from networking drivers and rely on using 'imply PHY_TI_GMII_SEL' in Kconfig definitions for networking drivers instead. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge tag 'phy-for-5.7' of ↵Greg Kroah-Hartman2020-03-211-0/+19
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 5.7 *) Rename and Re-design phy-cadence-dp driver to phy-cadence-torrent driver *) Add new PHY driver for Qualcomm 28nm Hi-Speed USB PHY *) Add new PHY driver for Qualcomm Super Speed PHY in QCS404 *) Add support for Qualcomm PCIe QMP/QHP PHY in SDM845 to phy-qcom-qmp driver *) Add support for Qualcomm UFS PHY in MSM8996 to phy-qcom-qmp driver *) Add support for an additional reference clock in Mediatek phy-mtk-tphy driver *) Add support for configuring tuning parameters in Mediatek phy-mtk-tphy driver *) Add support for GMII PHY in TI K3 AM654x/J721E SoCs to phy-gmii-sel driver *) Add support for USB2 PHY in Amlogic A1 SoC Family to phy-meson-g12a-usb2 driver *) Add support for USB3/USB2/PCIe PHY in Socionext Pro5 SoC to phy-uniphier-usb3ss/phy-uniphier-usb3hs/phy-uniphier-pcie driver respectively *) Add support for QUSB2 PHY in Qualcomm SC7180 in driver *) Convert dt-bindings of Cadence DP, Qualcomm QUSB2 to YAML format Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (52 commits) phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters phy: qcom-qusb2: Add generic QUSB2 V2 PHY support dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180 dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml phy: rk-inno-usb2: Decrease verbosity of repeating log. phy: amlogic: Add Amlogic A1 USB2 PHY Driver dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings phy: ti: gmii-sel: add support for am654x/j721e soc dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc phy: qualcomm: usb: Add SuperSpeed PHY driver dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding dt-bindings: phy: remove qcom-dwc3-usb-phy phy: phy-mtk-tphy: add a new reference clock phy: phy-mtk-tphy: remove unused u3phya_ref clock phy: phy-mtk-tphy: make the ref clock optional phy: phy-mtk-tphy: add a property for internal resistance ...
| * phy: ti: gmii-sel: add support for am654x/j721e socGrygorii Strashko2020-03-201-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | TI AM654x/J721E SoCs have the same PHY interface selection mechanism for CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields placement is different. This patch adds corresponding support for TI AM654x/J721E SoCs PHY interface selection. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: ti: gmii-sel: do not fail in case of gmiiGrygorii Strashko2020-02-201-0/+1
| | | | | | | | | | | | | | | | The "gmii" PHY interface mode is supported on TI AM335x/437x/5xx SoCs, so don't fail if it's selected. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: ti: gmii-sel: fix set of copy-paste errorsGrygorii Strashko2020-02-201-5/+4
|/ | | | | | | | | | | | | | | - under PHY_INTERFACE_MODE_MII the 'mode' func parameter is assigned instead of 'gmii_sel_mode' and it's working only because the default value 'gmii_sel_mode' is set to 0. - console outputs use 'rgmii_id' and 'mode' values to print PHY mode instead of using 'submode' value which is representing PHY interface mode now. This patch fixes above two cases. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESSHongbo Yao2020-01-181-0/+1
| | | | | | | | | | | | | | | | | | If CONFIG_OF_ADDRESS is not set and COMPILE_TEST=y, the following error is seen while building phy-j721e-wiz.c drivers/phy/ti/phy-j721e-wiz.o: In function `wiz_remove': phy-j721e-wiz.c:(.text+0x1a): undefined reference to `of_platform_device_destroy' Fix the config dependency for PHY_J721E_WIZ here. Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Hongbo Yao <yaohongbo@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20200117212310.2864-1-kishon@ti.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* phy: ti: j721e-wiz: Fix return value check in wiz_probe()Wei Yongjun2020-01-171-1/+1
| | | | | | | | | | In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: j721e-wiz: Manage typec-gpio-dirRoger Quadros2020-01-141-0/+61
| | | | | | | | | | | | | | | | | | | | Based on this GPIO state we need to configure LN10 bit to swap lane0 and lane1 if required (flipped connector). Type-C companions typically need some time after the cable is plugged before and before they reflect the correct status of Type-C plug orientation on the DIR line. Type-C Spec specifies CC attachment debounce time (tCCDebounce) of 100 ms (min) to 200 ms (max). Use the DT property to figure out if we need to add delay or not before sampling the Type-C DIR line. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: Enable compile testing for some of driversKrzysztof Kozlowski2020-01-141-2/+2
| | | | | | | | | Some of the phy drivers can be compile tested to increase build coverage. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoCKishon Vijay Abraham I2020-01-143-0/+914
| | | | | | | | | | | | Add support for WIZ module present in TI's J721E SoC. WIZ is a SERDES wrapper used to configure some of the input signals to the SERDES. It is used with both Sierra(16G) and Torrent(10G) SERDES. This driver configures three clock selects (pll0, pll1, dig), two divider clocks and supports resets for each of the lanes. [jsarha@ti.com: Add support for Torrent(10G) SERDES wrapper] Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: ti-pipe3: make clk operations symmetric in probe and removeChuhong Yuan2019-12-201-11/+7
| | | | | | | | | | The driver calls clk_prepare_enable in probe but the corresponding clk_disable_unprepare() is in ti_pipe3_disable_clocks(). Move clk_disable_unprepare() to remove to make them symmetric. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge tag 'char-misc-5.5-rc1' of ↵Linus Torvalds2019-11-272-4/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big set of char/misc and other driver patches for 5.5-rc1 Loads of different things in here, this feels like the catch-all of driver subsystems these days. Full details are in the shortlog, but nothing major overall, just lots of driver updates and additions. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (198 commits) char: Fix Kconfig indentation, continued habanalabs: add more protection of device during reset habanalabs: flush EQ workers in hard reset habanalabs: make the reset code more consistent habanalabs: expose reset counters via existing INFO IOCTL habanalabs: make code more concise habanalabs: use defines for F/W files habanalabs: remove prints on successful device initialization habanalabs: remove unnecessary checks habanalabs: invalidate MMU cache only once habanalabs: skip VA block list update in reset flow habanalabs: optimize MMU unmap habanalabs: prevent read/write from/to the device during hard reset habanalabs: split MMU properties to PCI/DRAM habanalabs: re-factor MMU masks and documentation habanalabs: type specific MMU cache invalidation habanalabs: re-factor memory module code habanalabs: export uapi defines to user-space habanalabs: don't print error when queues are full habanalabs: increase max jobs number to 512 ...
| * phy: ti: gmii-sel: fix mac tx internal delay for rgmii-rxidGrygorii Strashko2019-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | Now phy-gmii-sel will disable MAC TX internal delay for PHY interface mode "rgmii-rxid" which is incorrect. Hence, fix it by enabling MAC TX internal delay in the case of "rgmii-rxid" mode. Fixes: 92b58b34741f ("phy: ti: introduce phy-gmii-sel driver") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * phy: ti: dm816x: remove set but not used variable 'phy_data'YueHaibing2019-10-251-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/phy/ti/phy-dm816x-usb.c:192:29: warning: variable phy_data set but not used [-Wunused-but-set-variable] It is never used, so can be removed. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: ti: phy-gmii-sel: dependency from ti cpsw-switchdev driverGrygorii Strashko2019-11-201-2/+2
|/ | | | | | | Add dependency from TI_CPSW_SWITCHDEV. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'clk-for-linus' of ↵Linus Torvalds2019-09-211-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ...
| * phy: ti: am654-serdes: Don't reference clk_init_data after registrationStephen Boyd2019-08-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | A future patch is going to change semantics of clk_register() so that clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid referencing this member here so that we don't run into NULL pointer exceptions. Cc: Roger Quadros <rogerq@ti.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190731193517.237136-9-sboyd@kernel.org Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: ti: am654-serdes: fix an use-after-free in serdes_am654_clk_register()Wen Yang2019-08-261-11/+22
|/ | | | | | | | | | | | The regmap_node variable is still being used in the syscon_node_to_regmap() call after the of_node_put() call, which may result in use-after-free. Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Roger Quadros <rogerq@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge tag 'phy-for-5.3' of ↵Greg Kroah-Hartman2019-07-011-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next phy: for 5.3 *) Add a new PHY driver for Qualcomm PCIe2 PHY *) Add a new PHY driver for Mixel DPHY present in i.MX8 *) Fix Qualcomm QMP UFS PHY driver from incorrectly reporting that PHY enable failed *) Fix _BUG_ on Amlogic G12A USB3 + PCIE Combo PHY Driver due to calling a sleeping function from invalid context *) Fix WARN_ON dump on rcar-gen3-usb2 PHY driver caused due to imbalance powered flag *) Fix .cocci and sparse warnings Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: phy: qcom-qmp: Raise qcom_qmp_phy_enable() polling delay phy: meson-g12a-usb3-pcie: disable locking for cr_regmap phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs dt-bindings: phy: Add documentation for mixel dphy dt-bindings: phy-pxa-usb: add bindings phy: renesas: rcar-gen3-usb2: fix imbalance powered flag phy: qcom-qmp: Drop useless msm8998_pciephy_cfg setting phy: qcom-qmp: Correct READY_STATUS poll break condition phy: ti: am654-serdes: Make serdes_am654_xlate() static phy: usb: phy-brcm-usb: Fix platform_no_drv_owner.cocci warnings phy: samsung: Use struct_size() in devm_kzalloc() phy: qcom: Add Qualcomm PCIe2 PHY driver dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY
| * phy: ti: am654-serdes: Make serdes_am654_xlate() staticYueHaibing2019-06-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix sparse warning: drivers/phy/ti/phy-am654-serdes.c:250:12: warning: symbol 'serdes_am654_xlate' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285Thomas Gleixner2019-06-051-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 100 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-303-33/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 61Thomas Gleixner2019-05-241-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
|/ | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'usb-5.2-rc1' of ↵Linus Torvalds2019-05-084-97/+936
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big set of USB and PHY driver patches for 5.2-rc1 There is the usual set of: - USB gadget updates - PHY driver updates and additions - USB serial driver updates and fixes - typec updates and new chips supported - mtu3 driver updates - xhci driver updates - other tiny driver updates Nothing really interesting, just constant forward progress. All of these have been in linux-next for a while with no reported issues. The usb-gadget and usb-serial trees were merged a bit "late", but both of them had been in linux-next before they got merged here last Friday" * tag 'usb-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (206 commits) USB: serial: f81232: implement break control USB: serial: f81232: add high baud rate support USB: serial: f81232: clear overrun flag USB: serial: f81232: fix interrupt worker not stop usb: dwc3: Rename DWC3_DCTL_LPM_ERRATA usb: dwc3: Fix default lpm_nyet_threshold value usb: dwc3: debug: Print GET_STATUS(device) tracepoint usb: dwc3: Do core validation early on probe usb: dwc3: gadget: Set lpm_capable usb: gadget: atmel: tie wake lock to running clock usb: gadget: atmel: support USB suspend usb: gadget: atmel_usba_udc: simplify setting of interrupt-enabled mask dwc2: gadget: Fix completed transfer size calculation in DDMA usb: dwc2: Set lpm mode parameters depend on HW configuration usb: dwc2: Fix channel disable flow usb: dwc2: Set actual frame number for completed ISOC transfer usb: gadget: do not use __constant_cpu_to_le16 usb: dwc2: gadget: Increase descriptors count for ISOC's usb: introduce usb_ep_type_string() function usb: dwc3: move synchronize_irq() out of the spinlock protected block ...
| * phy: ti: am654-serdes: Support all clksel valuesRoger Quadros2019-04-171-49/+83
| | | | | | | | | | | | | | | | Add support to select all 16 CLKSEL combinations that are shown in "SerDes Reference Clock Distribution" in AM65 TRM. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 10:37:00 +0100