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* Merge tag 'dt-for-3.17' of ↵Linus Torvalds2014-08-081-0/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree changes from Olof Johansson: "Unlike the board branch, this keeps having large sets of changes for every release, but that's quite expected and is so far working well. Most of this is plumbing for various device bindings and new platforms, but there's also a bit of cleanup and code removal for things that are moved from platform code to DT contents (some OMAP clock code in particular). There's also a pinctrl driver for tegra here (appropriately acked), that's introduced this way to make it more bisectable. I'm happy to say that there were no conflicts at all with this branch this release, which means that changes are flowing through our tree as expected instead of merged through driver maintainers (or at least not done with conflicts). There are several new boards added, and a couple of SoCs. In no particular order: - Rockchip RK3288 SoC support, including DTS for a dev board that they have seeded with some community developers. - Better support for Hardkernel Exynos4-based ODROID boards. - CCF conversions (and dtsi contents) for several Renesas platforms. - Gumstix Pepper (TI AM335x) board support - TI eval board support for AM437x - Allwinner A23 SoC, very similar to existing ones which mostly has resulted in DT changes for support. Also includes support for an Ippo tablet with the chipset. - Allwinner A31 Hummingbird board support, not to be confused with the SolidRun i.MX-based Hummingboard. - Tegra30 Apalis board support" * tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits) ARM: dts: Enable USB host0 (EHCI) on rk3288-evb ARM: dts: add rk3288 ehci usb devices ARM: dts: Turn on USB host vbus on rk3288-evb ARM: tegra: apalis t30: fix device tree compatible node ARM: tegra: paz00: Fix some indentation inconsistencies ARM: zynq: DT: Clarify Xilinx Zynq platform ARM: dts: rockchip: add watchdog node ARM: dts: rockchip: remove pinctrl setting from radxarock uart2 ARM: dts: Add missing pinctrl for uart0/1 for exynos3250 ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250 ARM: dts: Add TMU dt node to monitor the temperature for exynos3250 ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250 ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only ARM: dts: max77686 is exynos5250-snow only ARM: zynq: DT: Remove DMA from board DTs ARM: zynq: DT: Add CAN node ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table ARM: dts: Add PMU DT node for exynos5260 SoC ARM: EXYNOS: Add support for Exynos5410 PMU ARM: dts: Add PMU to exynos5410 ...
| * pinctrl: Add NVIDIA Tegra XUSB pad controller supportThierry Reding2014-07-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads that lanes can be assigned to in order to support a variety of interface options: USB 2.0, USB 3.0, PCIe and SATA. In addition to the pin controller used to assign lanes to pads two PHYs are exposed to allow the bricks for PCIe and SATA to be powered up and down by PCIe and SATA drivers. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | pinctrl: baytrail: Convert to use gpiolib irqchipMika Westerberg2014-07-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: nomadik: move all Nomadik drivers to subdirLinus Walleij2014-07-111-44/+1
| | | | | | | | | | | | | | We have a bunch of Nomadik family pin control drivers, so let's move them into their own subdirectory. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: samsung: Group all drivers in a sub-dirSachin Kamat2014-07-111-26/+1
| | | | | | | | | | | | | | | | Group all pin control drivers of Samsung platform together in a sub-directory for easy maintenance. Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: msm: move all qualcomm drivers to subdirLinus Walleij2014-07-111-39/+1
| | | | | | | | | | | | | | | | | | | | We have four Qualcomm-related pin control drivers, and now there are drivers coming in for the PMICs on these systems, so let's create a qcom subdirectory to hold all the Qualcomm stuff. Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: msm: Add msm8960 definitionsBjorn Andersson2014-07-111-0/+8
| | | | | | | | | | Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Add i.MX1 pincontrol driverAlexander Shiyan2014-07-111-0/+7
| | | | | | | | | | | | | | | | This patch adds pincontrol driver for Freescale i.MX1 SOCs. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: hide CONFIG_PINMUX and CONFIG_PINCONFUwe Kleine-König2014-07-111-2/+2
|/ | | | | | | | | | These symbols are supposed to be selected by the drivers actually needing them. The only situation where it would make sense to enable them without a driver selecting them is when an out-of-tree pinctrl driver is used or for compile testing. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pinctrl driver for imx6sxAnson Huang2014-05-271-0/+7
| | | | | | | | | Add a pinctrl driver for i.MX6 SoloX based on pinctrl-imx core driver. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm: switch to using generic GPIO irqchip helpersLinus Walleij2014-05-231-0/+1
| | | | | | | | | | This switches the Qualcomm MSM pin control driver over to using the generic GPIO irqchip helpers. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Josh Cartwright <joshc@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: add the core pinctrl driver for Marvell Berlin SoCsAntoine Tenart2014-05-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Marvell Berlin boards have a group based pinmuxing mechanism. This adds the core driver support. We actually do not need any information about the pins here and only have the definition of the groups. Let's take the example of the uart0 pinmuxing on the BG2Q. Balls BK4 and BH6 are muxed to respectively UART0 RX and TX if the group GSM12 is set to mode 0: Group Modes Offset Base Offset LSB Bit Width GSM12 3 sm_base 0x40 0x10 0x2 Ball Group Mode 0 Mode 1 Mode 2 BK4 GSM12 UART0_RX IrDA0_RX GPIO9 BH6 GSM12 UART0_TX IrDA0_TX GPIO10 So in order to configure BK4 -> UART0_TX and BH6 -> UART0_RX, we need to set (sm_base + 0x40 + 0x10) &= ff3fffff. As pin control registers are part of either chip control or system control registers, that deal with a bunch of other functions we rely on a regmap instead of exclusively remapping any resources. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: rockchip: use regmaps instead of raw mappingsHeiko Stübner2014-05-091-0/+1
| | | | | | | | This allows us to use syscons in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Move the Allwinner pinctrl driver to its own directoryMaxime Ripard2014-05-041-5/+1
| | | | | | | This will allow to create numerous files without crippling the main pinctrl directory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* pinctrl: sirf: switch driver to use gpiolib irqchip helpersLinus Walleij2014-04-231-0/+1
| | | | | | | | This switches the SiRF pinctrl driver over to using the gpiolib irqchip helpers simplifying some of the code. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Add definitions for IPQ8064Andy Gross2014-04-231-0/+8
| | | | | | | | | This adds pinctrl definitions for the GPIO pins of the TLMM v2 block in the Qualcomm IPQ8064 platform. Signed-off-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/at91: convert driver to use gpiolib irqchipAlexander Stein2014-04-221-0/+3
| | | | | | | | | This converts the AT91 pin control driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Alexander Stein <alexanders83@web.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm8x74: make Kconfig dependency more strictUwe Kleine-König2014-04-221-1/+1
| | | | | | | | | | This driver is only useful on MSM8x74, so let the driver depend on ARCH_QCOM but allow compile coverage testing. The main benefit is that the driver isn't available to be selected for machines that don't have the matching hardware. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm: Add definitions for the APQ8064 platformBjorn Andersson2014-04-221-0/+8
| | | | | | | | This adds pinctrl definitions for the GPIO pins of the TLMM v2 block in the Qualcomm APQ8064 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: use gpiolib irqchip helpersLinus Walleij2014-04-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This lets the gpiolib core handle the irqchip set-up and chained IRQ on the primary (behind the mux) IRQ chip in the st pinctrl driver. Default irq type is set to level low at irqchip add time. The v1 was sent by Linus (https://lkml.org/lkml/2014/4/4/287). Two changes were necessary to make it to work properly on STiH416: 1 - dev reference was not passed to the gpio_chip struct, causing a panic. 2 - gpiochip_irqchip_add passed IRQ_TYPE_NONE as default type, which caused lot of warnings at init time. I choose IRQ_TYPE_LEVEL_LOW as default. Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime COQUELIN <maxime.coquelin@st.com>
* pinctrl: Rename Broadcom Capri pinctrl driverSherman Yin2014-04-141-4/+4
| | | | | | | | | | | | | | | | | To be consistent with other Broadcom drivers, the Broadcom Capri pinctrl driver and its related CONFIG option are renamed to bcm281xx. Devicetree compatible string and binding documentation use "brcm,bcm11351-pinctrl" to match the machine binding here: Documentation/devicetree/bindings/arm/bcm/bcm11351.txt This driver supports pinctrl on BCM11130, BCM11140, BCM11351, BCM28145 and BCM28155 SoCs. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Matt Porter <mporter@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'gpio-v3.15-1' of ↵Linus Torvalds2014-04-041-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull bulk of gpio updates from Linus Walleij: "A pretty big chunk of changes this time, but it has all been on rotation in linux-next and had some testing. Of course there will be some amount of fixes on top... - Merged in a branch of irqchip changes from Thomas Gleixner: we need to have new callbacks from the irqchip to determine if the GPIO line will be eligible for IRQs, and this callback must be able to say "no". After some thinking I got the branch from tglx and have switched all current users over to use this. - Based on tglx patches, we have added some generic irqchip helpers in the gpiolib core. These will help centralize code when GPIO drivers have simple chained/cascaded IRQs. Drivers will still define their irqchip vtables, but the gpiolib core will take care of irqdomain set-up, mapping from local offsets to Linux irqs, and reserve resources by marking the GPIO lines for IRQs. - Initially the PL061 and Nomadik GPIO/pin control drivers have been switched over to use the new gpiochip-to-irqchip infrastructure with more drivers expected for the next kernel cycle. The factoring of just two drivers still makes it worth it so it is already a win. - A new driver for the Synopsys DesignWare APB GPIO block. - Modify the DaVinci GPIO driver to be reusable also for the new TI Keystone architecture. - A new driver for the LSI ZEVIO SoCs. - Delete the obsolte tnetv107x driver. - Some incremental work on GPIO descriptors: have gpiod_direction_output() use a logical level, respecting assertion polarity through ACTIVE_LOW flags, adding gpiod_direction_output_raw() for the case where you want to set that very value. Add gpiochip_get_desc() to fetch a GPIO descriptor from a specific offset on a certain chip inside driver code. - Switch ACPI GPIO code over to using gpiochip_get_desc() and get rid of gpio_to_desc(). - The ACPI GPIO event handling code has been reworked after encountering an actual real life implementation. - Support for ACPI GPIO operation regions. - Generic GPIO chips can now be assigned labels/names from platform data. - We now clamp values returned from GPIO drivers to the boolean [0,1] range. - Some improved documentation on how to use the polarity flag was added. - a large slew of incremental driver updates and non-critical fixes. Some targeted for stable" * tag 'gpio-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (80 commits) gpio: rcar: Add helper variable dev = &pdev->dev gpio-lynxpoint: force gpio_get() to return "1" and "0" only gpio: unmap gpio irqs properly pch_gpio: set value before enabling output direction gpio: moxart: Actually set output state in moxart_gpio_direction_output() gpio: moxart: Avoid forward declaration gpio: mxs: Allow for recursive enable_irq_wake() call gpio: samsung: Add missing "break" statement gpio: twl4030: Remove redundant assignment gpio: dwapb: correct gpio-cells in binding document gpio: iop: fix devm_ioremap_resource() return value checking pinctrl: coh901: convert driver to use gpiolib irqchip pinctrl: nomadik: convert driver to use gpiolib irqchip gpio: pl061: convert driver to use gpiolib irqchip gpio: add IRQ chip helpers in gpiolib pinctrl: nomadik: factor in platform data container pinctrl: nomadik: rename secondary to latent gpio: Driver for SYSCON-based GPIOs gpio: generic: Use platform_device_id->driver_data field for driver flags pinctrl: coh901: move irq line locking to resource callbacks ...
| * pinctrl: coh901: convert driver to use gpiolib irqchipLinus Walleij2014-03-261-0/+1
| | | | | | | | | | | | | | | | This converts the COH901 pin control driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: nomadik: convert driver to use gpiolib irqchipLinus Walleij2014-03-261-0/+3
| | | | | | | | | | | | | | | | This converts the Nomadik pin control driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'pinctrl-v3.15-1' of ↵Linus Torvalds2014-04-011-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk changes from Linus Walleij: "Pin control bulk changes for the v3.15 series, no new core functionality this time, just incremental driver updates: - A large refactoring of the MVEBU (Marvell) driver. - A large refactoring of the Tegra (nVidia) driver. - GPIO interrupt including soft edges support in the STi driver. - Misc updates to PFC (Renesas), AT91, ADI2 (Blackfin), pinctrl-single, sirf (CSR), msm (Qualcomm), Exynos (Samsung), sunxi (AllWinner), i.MX (Freescale), Baytrail" * tag 'pinctrl-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits) pinctrl: tegra: add some missing Tegra114 entries pinctrl: tegra: fix some mistakes in Tegra124 pinctrl: msm: fix up out-of-order merge conflict pinctrl: st: Fix error check for of_irq_to_resource usage pinctrl: tegra: consistency cleanup pinctrl: tegra: dynamically calculate function list of groups pinctrl: tegra: init Tegra20/30 at module_init time pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delays pinctrl: st: add pinctrl support for the STiH407 SoC pinctrl: st: Enhance the controller to manage unavailable registers pinctrl: msm: Simplify msm_config_reg() and callers pinctrl: msm: Remove impossible WARN_ON()s pinctrl: msm: Replace lookup tables with math pinctrl: msm: Drop OF_IRQ dependency pinctrl: msm: Drop unused includes pinctrl: msm: Check for ngpios > MAX_NR_GPIO pinctrl: msm: Silence recursive lockdep warning pinctrl: mvebu: silence WARN to dev_warn pinctrl: msm: drop wake_irqs bitmap pinctrl-baytrail: add function mux checking in gpio pin request ...
| * pinctrl: msm: Drop OF_IRQ dependencyStephen Boyd2014-03-121-1/+1
| | | | | | | | | | | | | | | | | | This driver doesn't rely on any functionality living in drivers/of/irq.c to compile. Drop this dependency. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: msm: make PINCTRL_MSM bool instead of tristateJosh Cartwright2014-03-051-1/+1
|/ | | | | | | | | Modular builds of pinctrl-msm break due to handle_bad_irq being unexported for module use. For now, make PINCTRL_MSM 'bool'. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: capri: add dependency on OFLinus Walleij2014-01-161-0/+1
| | | | | | | | | As this driver is using pinconf_generic_dt_node_to_map_pin() it needs to depend on OF so as not to cause build problems on archs that do not support OF. Cc: Sherman Yin <syin@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: pinctrl: Add Broadcom Capri pinctrl driverSherman Yin2014-01-161-0/+12
| | | | | | | | | | | | | | | | | Adds pinctrl driver for Broadcom Capri (BCM281xx) SoCs. v4: - PINCTRL selected in Kconfig, PINCTRL_CAPRI selected in bcm_defconfig - make use of regmap - change CAPRI_PIN_UPDATE from macro to inline function. - Handle pull-up strength arg in Ohm instead of enum v3: Re-work driver to be based on generic pin config. Moved config selection from Kconfig to bcm_defconfig. v2: Use hyphens instead of underscore in DT property names. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <bcm@fixthebug.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: msm: Update Kconfig for PINCTRL_MSM8X74Bjorn Andersson2013-12-161-3/+6
| | | | | | | | | | | | Add GPIOLIB and OF as dependencies for PINCTRL_MSM8X74, to fix build errors from i386-randconfig. Also add help text and make the entries tristate, while touching these entries. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> [Rebased on top of pin control development branch] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: add pinmux controller driver for Tegra124Ashwini Ghuge2013-12-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | This adds a driver for the Tegra124 pinmux, and required parameterization data for Tegra124. The driver uses the common Tegra pincontrol driver utility functions to implement the majority of the driver. This driver is not compatible with the earlier NVIDIA's SoCs, hence add new compatibile as "nvidia,tegra124-pinmux". Originally written by Ashwini Gguhe. Thierry: - Cleanups in patches. ldewangan: - Fix some entries for groups. - Fix MUX enums and group sequence. Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> CC: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: make the MSM SoC driver depend on OFLinus Walleij2013-12-111-0/+1
| | | | | | | | | We had a compilation failure on x86_64 due to missing OF support as this was an implicit dependency. Add an explicit dependency on OF and OF_IRQ on the SoC driver. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add msm8x74 configurationBjorn Andersson2013-12-061-0/+4
| | | | | | | | Add initial definition of parameters for pinctrl-msm for the msm8x74 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add Qualcomm TLMM driverBjorn Andersson2013-12-061-0/+6
| | | | | | | | This adds a pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm TLMM block. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-imx: add imx25 pinctrl driverDenis Carikli2013-11-251-0/+9
| | | | | | | | | | | | | | | | | | | | | | This is mostly cut and paste from the imx35 pinctrl driver. The data was generated using sed and awk on arch/arm/plat-mxc/include/mach/iomux-mx25.h. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: drop redundant OF dependencyShawn Guo2013-11-251-8/+0
| | | | | | | | The IMX/MXC selects USE_OF at architecture level, so the OF dependency at individual SoC pinctrl driver level can just be dropped. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx50: add pinctrl support code for the IMX50 SoCGreg Ungerer2013-11-061-0/+8
| | | | | | | | Add code to support the specific pin arrangements of the Freescale IMX50 SoC. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx27: imx27 pincontrol driverMarkus Pargmann2013-10-291-0/+8
| | | | | | | | | | imx27 pincontrol driver using the imx1 core driver. The DT bindings are similar to other imx pincontrol drivers. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx1 core driverMarkus Pargmann2013-10-291-0/+5
| | | | | | | | | | | | | Core driver for register formats of imx1/imx21/imx27 processors. The pins of those processors are grouped into ports. Each port has 32 pins. The pins mux configuration is controlled by registers with 1 or 2 bit per pin, depending on the specific control register. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add TB10x pin control driverChristian Ruppert2013-10-161-0/+4
| | | | | | | | | The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs. Used to control the pinmux and is a prerequisite for the GPIO driver. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pincntrl: add support for ams AS3722 pin control driverLaxman Dewangan2013-10-101-0/+11
| | | | | | | | | | | | | The AS3722 is a compact system PMU suitable for mobile phones, tablets etc. Add a driver to support accessing the GPIO, pinmux and pin configuration of 8 GPIO pins found on the ams AS3722 through pin control driver and gpiolib. The driver will register itself as the pincontrol driver and gpio driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-adi2: Add dependency to arch BLACKFIN in Kconfig.Sonic Zhang2013-09-231-0/+1
| | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.Sonic Zhang2013-09-191-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new ADI GPIO2 controller was introduced since the BF548 and BF60x processors. It differs a lot from the old one on BF5xx processors. So, create a pinctrl driver under the pinctrl framework. - Define gpio ports and pin interrupt controllers as individual platform devices. - Register a pinctrl driver for the whole GPIO ports and pin interrupt devices. - Probe pint devices before port devices. Put device instances into the global gpio and pint lists. - Define peripheral, irq and gpio reservation bit masks for each gpio port as runtime resources. - Save and restore gpio port and pint status MMRs in syscore PM functions. - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Handle peripheral and gpio requests in pinctrl operation functions. - Demux gpio IRQs via the irq_domain created by each GPIO port. v2-changes: - Remove unlinke() directive. v3-changes: - Rename struct adi_pmx to adi_pinctrl. - Fix the comments of struct gpio_pint. - Remove unused pin_base in struct gpio_port. - Change pint_assign into bool type. - Add comments about the relationship between pint device and port device to the driver header. - Use BIT macro to shift bit. - Remove all bitmap reservation help functions. Inline reservation functions into the actual code. - Remove gpio and offset mutual reference help functions. - Remove all help functions to find gpio_port and adi_pinctrl structs. Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Pass bool type usage variable to port_setup help function. - Separate long bit operations into several lines and add comments. - Use debugfs to output all GPIO request information. - Avoid to set drvdata to NULL - Add explanation to function adi_gpio_init_int() - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Remove the reference to pin control device from the gpio_port struct. Remove the reference list to gpio device from the adi_pinctrl struct. Replace the global adi_pinctrl list with adi_gpio_port_list. Walk through the gpio list to do power suspend and resume operations. - Remove the global GPIO base from struct adi_pinctrl, define pin base in the platform data for each GPIO port device. - Initialize adi_pinctrl_setup in arch_initcall(). - print the status of triggers, whether it is in GPIO mode, if it is flagged to be used as IRQ, etc in adi_pin_dbg_show(). - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. v4-changes: - remove useless system_state checking. - replace dev_err with dev_warn in both irq and gpio pin cases. - comment on relationship between irq type and invert operation. - It is not necessary to check the reservation mode of the requested pin in IRQ chip operation. Remove the reservation map. - Use existing gpio/pinctrl subsystem debugfs files. Remove pinctrl-adi2 driver specific debugfs output. - Add linkport group and function information for bf60x. - Separate uart and ctsrts pins into 2 groups. - Separate APAPI and alternative ATAPI pins into 2 groups. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add s5pv210 support to pinctrl-exynosMateusz Krawczuk2013-08-281-1/+1
| | | | | | | | | This patch implements pinctrl support and adds device tree bindings for s5pv210. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: palmas: PINCTRL_PALMAS needs to select PINMUXAxel Lin2013-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix below build error if !PINMUX. CC drivers/pinctrl/pinctrl-palmas.o drivers/pinctrl/pinctrl-palmas.c:741:21: error: variable 'palmas_pinmux_ops' has initializer but incomplete type drivers/pinctrl/pinctrl-palmas.c:742:2: error: unknown field 'get_functions_count' specified in initializer drivers/pinctrl/pinctrl-palmas.c:742:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:742:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:743:2: error: unknown field 'get_function_name' specified in initializer drivers/pinctrl/pinctrl-palmas.c:743:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:743:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:744:2: error: unknown field 'get_function_groups' specified in initializer drivers/pinctrl/pinctrl-palmas.c:744:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:744:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] drivers/pinctrl/pinctrl-palmas.c:745:2: error: unknown field 'enable' specified in initializer drivers/pinctrl/pinctrl-palmas.c:745:2: warning: excess elements in struct initializer [enabled by default] drivers/pinctrl/pinctrl-palmas.c:745:2: warning: (near initialization for 'palmas_pinmux_ops') [enabled by default] make[2]: *** [drivers/pinctrl/pinctrl-palmas.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: palmas: Fix device name in Kconfig textMark Brown2013-08-231-1/+1
| | | | | | | | | The device family is called Palmas so there should be a 's' on the end of the name. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: palmas: add pincontrol driverLaxman Dewangan2013-08-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | TI Palmas series Power Management IC have multiple pins which can be configured for different functionality. This pins can be configured for different function. Also their properties like pull up/down, open drain enable/disable are configurable. Add support for pincontrol driver Palmas series device like TPS65913, TPS80036. The driver supports to be register from DT only. Changes from V1: - Add generic property for pins and functions in pinconf-generic. - Add APIs to map the DT and subnode. - Move common utils APIs to the pinctrl-utils from this file. - Update the binding document accordingly. Changes from V2: - Add ack by Lee. - Correct the binding docs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl-baytrail: fix indentationsAndy Shevchenko2013-07-231-1/+1
| | | | | | | | | There are two minor issues with indentation in the code. This patch fixes them. No functional changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-for-v3.11-1' of ↵Linus Torvalds2013-07-031-0/+38
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
| * pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driverJames Hogan2013-06-241-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a pin control driver for the TZ1090's low power pins via the powerdown controller SOC_GPIO_CONTROL registers. These pins have individually controlled pull-up, and group controlled schmitt, slew-rate, drive-strength, and power-on-start (pos). The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the ir_mod_stable_out and ir_mod_power_out functions respectively. If no function is set they remain in GPIO mode. These muxes can be overridden by requesting them as GPIOs. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 21:16:54 +0100