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path: root/drivers/pinctrl/intel/pinctrl-icelake.c (follow)
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* pinctrl: icelake: Switch to use Intel pin control PM opsAndy Shevchenko2023-11-131-3/+2
| | | | | | | | | | The main driver conditionally exports the PM ops structure. Switch this driver to use it instead of customly wrapped one. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231030120734.2831419-11-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: Switch to use exported namespaceAndy Shevchenko2023-08-151-1/+1
| | | | | | | We already have a few symbols exported in the namespace. Let's do the same for others (except PM for now). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: icelake: Replace ICL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko2022-12-271-22/+13
| | | | | | | Use INTEL_COMMUNITY_GPPS() common macro instead custom ICL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Deduplicate COMMUNITY macro codeAndy Shevchenko2022-10-261-4/+4
| | | | | | | | Define a common COMMUNITY macro and supply a variant to it. This removes some verbosity in macros. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Add Ice Lake-N PCH pin controller supportAndy Shevchenko2022-02-231-8/+283
| | | | | | | | | This adds pinctrl/GPIO support for Intel Ice Lake-N PCH. The Ice Lake-N PCH GPIO is based on the same version of the Intel GPIO hardware than Intel Cannon Lake with different set of pins and ACPI ID. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Use generic flag for special GPIO base treatmentAndy Shevchenko2020-04-141-16/+14
| | | | | | | | Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Code formatting fixesAndy Shevchenko2018-11-081-1/+1
| | | | | | | | Remove comma from terminator line to allow compiler fail in case an entry has been put in a wrong place by any weird reason. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: icelake: Get rid of unneeded ->probe() stubAndy Shevchenko2018-11-081-7/+2
| | | | | | | | | | | The local ->probe() stub does nothing except calling a generic Intel pin control probe function. Thus, it's not needed and generic function may be called directly. Convert the driver accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
* pinctrl: intel: Move linux/pm.h to the local headerAndy Shevchenko2018-09-191-1/+1
| | | | | | | | | | | | We now using a common macro for PM operations in pin control drivers for Intel SoCs, and since that macro relies on the definition and macro from linux/pm.h header file, it's logical to include it directly in pinctrl-intel.h. Otherwise it's a bit fragile and requires a proper ordering of header inclusion in C files. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: icelake: Define PM ops via INTEL_PINCTRL_PM_OPS()Andy Shevchenko2018-08-311-4/+1
| | | | | | | | | | | Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: intel: Add Ice Lake PCH pin controller supportAndy Shevchenko2018-06-291-0/+436
This adds pinctrl/GPIO support for Intel Ice Lake PCH. The Ice Lake PCH GPIO is based on the same version of the Intel GPIO hardware than Intel Cannon Lake with different set of pins and ACPI ID. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>