| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
| |
Silences the following warnings:
drivers/pinctrl/pinctrl-ab8505.c:274:28: warning:
symbol 'ab8505_alternate_functions' was not declared. Should it be static?
drivers/pinctrl/pinctrl-ab8505.c:351:32: warning:
symbol 'ab8505_gpio_irq_cluster' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This fix allows to correctly select default and
alternate pin mode.
By default for all ABx500 family chip, pin default
mode is selected by clearing corresponding bit in
GPIOSELx register except for pins which support
alternate function, in this case, corresponding bit
must be set.
But, due to an unlogical hardware implementation,
for one particular pin (GPIO11) reverse setting
must be done. For that, update the alternate function
array by declaring that this pin supports alternate
function.
Reported-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| |
|
|
|
|
|
|
|
| |
Make it harder to do mistakes by introducing the actual
defined ABx500 IRQ number into the IRQ cluster definitions.
Deduct cluster offset from the GPIO offset to make each
cluster coherent.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.
The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:
GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */
if (offset >= cluster->start && offset <= cluster->end)
/* Valid GPIO for IRQ use */
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
|
Add AB8505 sub driver to the ABx5x family.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
